1PLATFORM_FLAVOR ?= ls1021atwr 2 3$(call force,CFG_GENERIC_BOOT,y) 4$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y) 5$(call force,CFG_GIC,y) 6$(call force,CFG_16550_UART,y) 7$(call force,CFG_PM_STUBS,y) 8 9$(call force,CFG_DRAM0_BASE,0x80000000) 10$(call force,CFG_TEE_OS_DRAM0_SIZE,0x4000000) 11 12ifeq ($(PLATFORM_FLAVOR),ls1021atwr) 13include core/arch/arm/cpu/cortex-a7.mk 14$(call force,CFG_TEE_CORE_NB_CORE,2) 15$(call force,CFG_DRAM0_SIZE,0x40000000) 16$(call force,CFG_CORE_CLUSTER_SHIFT,2) 17CFG_SHMEM_SIZE ?= 0x00100000 18CFG_BOOT_SYNC_CPU ?= y 19CFG_BOOT_SECONDARY_REQUEST ?= y 20endif 21 22ifeq ($(PLATFORM_FLAVOR),ls1021aqds) 23include core/arch/arm/cpu/cortex-a7.mk 24$(call force,CFG_TEE_CORE_NB_CORE,2) 25$(call force,CFG_DRAM0_SIZE,0x80000000) 26$(call force,CFG_CORE_CLUSTER_SHIFT,2) 27CFG_SHMEM_SIZE ?= 0x00100000 28CFG_BOOT_SYNC_CPU ?= y 29CFG_BOOT_SECONDARY_REQUEST ?= y 30endif 31 32ifeq ($(PLATFORM_FLAVOR),ls1012ardb) 33CFG_HW_UNQ_KEY_REQUEST ?= y 34include core/arch/arm/cpu/cortex-armv8-0.mk 35$(call force,CFG_TEE_CORE_NB_CORE,1) 36$(call force,CFG_DRAM0_SIZE,0x40000000) 37$(call force,CFG_CORE_CLUSTER_SHIFT,2) 38CFG_SHMEM_SIZE ?= 0x00200000 39endif 40 41ifeq ($(PLATFORM_FLAVOR),ls1012afrwy) 42CFG_HW_UNQ_KEY_REQUEST ?= y 43include core/arch/arm/cpu/cortex-armv8-0.mk 44$(call force,CFG_TEE_CORE_NB_CORE,1) 45$(call force,CFG_CORE_CLUSTER_SHIFT,2) 46CFG_DRAM0_SIZE ?= 0x20000000 47CFG_SHMEM_SIZE ?= 0x00200000 48endif 49 50ifeq ($(PLATFORM_FLAVOR),ls1043ardb) 51CFG_HW_UNQ_KEY_REQUEST ?= y 52include core/arch/arm/cpu/cortex-armv8-0.mk 53$(call force,CFG_TEE_CORE_NB_CORE,4) 54$(call force,CFG_DRAM0_SIZE,0x80000000) 55$(call force,CFG_CORE_CLUSTER_SHIFT,2) 56CFG_SHMEM_SIZE ?= 0x00200000 57endif 58 59ifeq ($(PLATFORM_FLAVOR),ls1046ardb) 60CFG_HW_UNQ_KEY_REQUEST ?= y 61include core/arch/arm/cpu/cortex-armv8-0.mk 62$(call force,CFG_TEE_CORE_NB_CORE,4) 63$(call force,CFG_DRAM0_SIZE,0x80000000) 64$(call force,CFG_CORE_CLUSTER_SHIFT,2) 65CFG_SHMEM_SIZE ?= 0x00200000 66endif 67 68ifeq ($(PLATFORM_FLAVOR),ls1088ardb) 69CFG_HW_UNQ_KEY_REQUEST ?= y 70include core/arch/arm/cpu/cortex-armv8-0.mk 71$(call force,CFG_TEE_CORE_NB_CORE,8) 72$(call force,CFG_DRAM0_SIZE,0x80000000) 73$(call force,CFG_CORE_CLUSTER_SHIFT,2) 74$(call force,CFG_ARM_GICV3,y) 75CFG_SHMEM_SIZE ?= 0x00200000 76endif 77 78ifeq ($(PLATFORM_FLAVOR),ls2088ardb) 79CFG_HW_UNQ_KEY_REQUEST ?= y 80include core/arch/arm/cpu/cortex-armv8-0.mk 81$(call force,CFG_TEE_CORE_NB_CORE,8) 82$(call force,CFG_DRAM0_SIZE,0x80000000) 83$(call force,CFG_CORE_CLUSTER_SHIFT,1) 84$(call force,CFG_ARM_GICV3,y) 85CFG_SHMEM_SIZE ?= 0x00200000 86endif 87 88ifeq ($(PLATFORM_FLAVOR),lx2160ardb) 89CFG_HW_UNQ_KEY_REQUEST ?= y 90include core/arch/arm/cpu/cortex-armv8-0.mk 91$(call force,CFG_TEE_CORE_NB_CORE,16) 92$(call force,CFG_DRAM0_SIZE,0x80000000) 93$(call force,CFG_CORE_CLUSTER_SHIFT,1) 94$(call force,CFG_ARM_GICV3,y) 95$(call force,CFG_PL011,y) 96CFG_SHMEM_SIZE ?= 0x00200000 97endif 98 99ifeq ($(platform-flavor-armv8),1) 100$(call force,CFG_WITH_ARM_TRUSTED_FW,y) 101CFG_TZDRAM_START ?= ((CFG_DRAM0_BASE + CFG_DRAM0_SIZE) - CFG_TEE_OS_DRAM0_SIZE) 102CFG_TZDRAM_SIZE ?= ( CFG_TEE_OS_DRAM0_SIZE - CFG_SHMEM_SIZE) 103#CFG_SHMEM_START (Non-Secure shared memory) needs to be 2MB aligned boundary for TZASC 380 configuration. 104CFG_SHMEM_START ?= ((CFG_DRAM0_BASE + CFG_DRAM0_SIZE) - CFG_SHMEM_SIZE) 105$(call force,CFG_ARM64_core,y) 106else 107#In ARMv7 platform CFG_SHMEM_SIZE is different to that of ARMv8 platforms. 108CFG_TZDRAM_START ?= ((CFG_DRAM0_BASE + CFG_DRAM0_SIZE) - CFG_TEE_OS_DRAM0_SIZE) 109CFG_TZDRAM_SIZE ?= ( CFG_TEE_OS_DRAM0_SIZE - (2*CFG_SHMEM_SIZE)) 110#CFG_SHMEM_START (Non-Secure shared memory) needs to be 2MB aligned boundary for TZASC 380 configuration. 111CFG_SHMEM_START ?= ((CFG_DRAM0_BASE + CFG_DRAM0_SIZE) - (2*CFG_SHMEM_SIZE)) 112endif 113 114#Keeping Number of TEE thread equal to number of cores on the SoC 115CFG_NUM_THREADS ?= CFG_TEE_CORE_NB_CORE 116ta-targets = ta_arm32 117 118ifeq ($(CFG_ARM64_core),y) 119$(call force,CFG_WITH_LPAE,y) 120ta-targets = ta_arm64 121else 122$(call force,CFG_ARM32_core,y) 123$(call force,CFG_SECONDARY_INIT_CNTFRQ,y) 124endif 125 126CFG_CRYPTO_SIZE_OPTIMIZATION ?= n 127CFG_WITH_STACK_CANARIES ?= y 128