144b182a5SSahil Malhotra /* SPDX-License-Identifier: BSD-2-Clause */ 244b182a5SSahil Malhotra /* 344b182a5SSahil Malhotra * Copyright 2024 NXP 444b182a5SSahil Malhotra */ 544b182a5SSahil Malhotra #ifndef __IMX95_H__ 644b182a5SSahil Malhotra #define __IMX95_H__ 744b182a5SSahil Malhotra 844b182a5SSahil Malhotra #define GICD_BASE 0x48000000 944b182a5SSahil Malhotra #define GICR_BASE 0x48060000 1044b182a5SSahil Malhotra 1144b182a5SSahil Malhotra #define UART1_BASE 0x44380000 1244b182a5SSahil Malhotra 13*358eab24SSahil Malhotra #define MU_BASE 0x47530000 14*358eab24SSahil Malhotra #define MU_SIZE 0x10000 15*358eab24SSahil Malhotra 1644b182a5SSahil Malhotra #endif /* __IMX95_H__ */ 17