1d5400731SClement Faure /* SPDX-License-Identifier: BSD-2-Clause */ 2d5400731SClement Faure /* 3*35e561d8SSahil Malhotra * Copyright 2022-2023, 2025 NXP 4d5400731SClement Faure */ 5d5400731SClement Faure #ifndef __IMX93_H__ 6d5400731SClement Faure #define __IMX93_H__ 7d5400731SClement Faure 8d5400731SClement Faure #define GICD_BASE 0x48000000 9d5400731SClement Faure #define GICR_BASE 0x48040000 10d5400731SClement Faure 11d5400731SClement Faure #define UART1_BASE 0x44380000 12*35e561d8SSahil Malhotra /* 13*35e561d8SSahil Malhotra * For Normal MU - Use MU_BASE as 0x47520000 14*35e561d8SSahil Malhotra * For Trust MU - Use MU_BASE as 0x47530000 15*35e561d8SSahil Malhotra */ 16*35e561d8SSahil Malhotra #define MU_BASE 0x47530000 178cd1171eSClement Faure #define MU_SIZE 0x10000 18d5400731SClement Faure 19*35e561d8SSahil Malhotra #define MU_TRUST_BASE 0x47530000 20*35e561d8SSahil Malhotra 21d5400731SClement Faure #endif /* __IMX93_H__ */ 22