1*9781fbd2SClement Faure /* SPDX-License-Identifier: BSD-2-Clause */ 2*9781fbd2SClement Faure /* 3*9781fbd2SClement Faure * Copyright 2021 NXP 4*9781fbd2SClement Faure */ 5*9781fbd2SClement Faure #ifndef __IMX8ULP_CRM_H__ 6*9781fbd2SClement Faure #define __IMX8ULP_CRM_H__ 7*9781fbd2SClement Faure 8*9781fbd2SClement Faure #include <util.h> 9*9781fbd2SClement Faure 10*9781fbd2SClement Faure #define PCC_CGC_BIT_SHIFT 30 11*9781fbd2SClement Faure #define PCC_ENABLE_CLOCK BIT32(PCC_CGC_BIT_SHIFT) 12*9781fbd2SClement Faure #define PCC_CAAM 0xB8 13*9781fbd2SClement Faure 14*9781fbd2SClement Faure #endif /* __IMX8ULP_CRM_H__ */ 15