10f68a8c3SClement Faure /* SPDX-License-Identifier: BSD-2-Clause */ 20f68a8c3SClement Faure /* 30f68a8c3SClement Faure * Copyright 2017-2019 NXP 40f68a8c3SClement Faure */ 5*e05236a9SClement Faure #ifndef __IMX7ULP_CRM_H__ 6*e05236a9SClement Faure #define __IMX7ULP_CRM_H__ 70f68a8c3SClement Faure 80f68a8c3SClement Faure #include <util.h> 90f68a8c3SClement Faure 100f68a8c3SClement Faure #define PCC_CGC_BIT_SHIFT 30 110f68a8c3SClement Faure 120f68a8c3SClement Faure #define PCC_ENABLE_CLOCK BIT32(PCC_CGC_BIT_SHIFT) 130f68a8c3SClement Faure #define PCC_DISABLE_CLOCK BIT32(0) 140f68a8c3SClement Faure 150f68a8c3SClement Faure #define PCC_CAAM 0x90 160f68a8c3SClement Faure 17*e05236a9SClement Faure #endif /* __IMX7ULP_CRM_H__ */ 18