1e05236a9SClement Faure /* SPDX-License-Identifier: BSD-2-Clause */ 2e05236a9SClement Faure /* 3e05236a9SClement Faure * Copyright 2017-2019 NXP 4e05236a9SClement Faure */ 5e05236a9SClement Faure 6e05236a9SClement Faure #ifndef __IMX7_CRM_H__ 7e05236a9SClement Faure #define __IMX7_CRM_H__ 8e05236a9SClement Faure 9e05236a9SClement Faure /* 10e05236a9SClement Faure * GPRx Registers 11e05236a9SClement Faure */ 12e05236a9SClement Faure #define CCM_GPR0 0x0 13e05236a9SClement Faure #define CCM_GPRx_OFFSET 0x10 14e05236a9SClement Faure #define CCM_GPRx(idx) (((idx) * CCM_GRPx_OFFSET) + CCM_GPR0) 15e05236a9SClement Faure #define CCM_GPRx_SET(idx) (CCM_GPRx(idx) + 0x4) 16e05236a9SClement Faure #define CCM_GPRx_CLR(idx) (CCM_GPRx(idx) + 0x8) 17e05236a9SClement Faure #define CCM_GPRx_TOG(idx) (CCM_GPRx(idx) + 0xC) 18e05236a9SClement Faure 19e05236a9SClement Faure /* 20e05236a9SClement Faure * PLL_CTRLx Registers (PLL Control) 21e05236a9SClement Faure */ 22e05236a9SClement Faure #define CCM_PLL_CTRL0 0x800 23e05236a9SClement Faure #define CCM_PLL_CTRLx_OFFSET 0x10 24e05236a9SClement Faure #define CCM_PLL_CTRLx(idx) (((idx) * CCM_PLL_CTRLx_OFFSET) + CCM_PLL_CTRL0) 25e05236a9SClement Faure #define CCM_PLL_CTRLx_SET(idx) (CCM_PLL_CTRLx(idx) + 0x4) 26e05236a9SClement Faure #define CCM_PLL_CTRLx_CLR(idx) (CCM_PLL_CTRLx(idx) + 0x8) 27e05236a9SClement Faure #define CCM_PLL_CTRLx_TOG(idx) (CCM_PLL_CTRLx(idx) + 0xC) 28e05236a9SClement Faure 29e05236a9SClement Faure /* 30e05236a9SClement Faure * CCGRx Registers (Clock Gating) 31e05236a9SClement Faure */ 32e05236a9SClement Faure #define CCM_CCGR0 0x4000 33e05236a9SClement Faure #define CCM_CCGRx_OFFSET 0x10 34e05236a9SClement Faure #define CCM_CCGRx(idx) (((idx) * CCM_CCGRx_OFFSET) + CCM_CCGR0) 35e05236a9SClement Faure #define CCM_CCGRx_SET(idx) (CCM_CCGRx(idx) + 0x4) 36e05236a9SClement Faure #define CCM_CCGRx_CLR(idx) (CCM_CCGRx(idx) + 0x8) 37e05236a9SClement Faure #define CCM_CCGRx_TOG(idx) (CCM_CCGRx(idx) + 0xC) 38e05236a9SClement Faure 39e05236a9SClement Faure #define BS_CCM_CCGRx_SETTING(idx) ((idx) * 4) 40e05236a9SClement Faure #define BM_CCM_CCGRx_SETTING(idx) \ 41e05236a9SClement Faure SHIFT_U32(0x3, BS_CCM_CCGRx_SETTING(idx)) 42e05236a9SClement Faure #define CCM_CCGRx_DISABLE(idx) \ 43e05236a9SClement Faure SHIFT_U32(0, BS_CCM_CCGRx_SETTING(idx)) 44e05236a9SClement Faure #define CCM_CCGRx_RUN(idx) \ 45e05236a9SClement Faure BIT32(BS_CCM_CCGRx_SETTING(idx)) 46e05236a9SClement Faure #define CCM_CCGRx_RUN_WAIT(idx) \ 47e05236a9SClement Faure SHIFT_U32(0x2, BS_CCM_CCGRx_SETTING(idx)) 48e05236a9SClement Faure #define CCM_CCGRx_ALWAYS_ON(idx) \ 49e05236a9SClement Faure SHIFT_U32(0x3, BS_CCM_CCGRx_SETTING(idx)) 50e05236a9SClement Faure 51e05236a9SClement Faure /* 52e05236a9SClement Faure * TARGET_ROOTx Registers (Target) 53e05236a9SClement Faure */ 54e05236a9SClement Faure #define CCM_TARGET_ROOT0 0x8000 55e05236a9SClement Faure #define CCM_TARGET_ROOTx_OFFSET 0x80 56e05236a9SClement Faure #define CCM_TARGET_ROOTx(idx) \ 57e05236a9SClement Faure (((idx) * CCM_TARGET_ROOTx_OFFSET) + CCM_TARGET_ROOT0) 58e05236a9SClement Faure #define CCM_TARGET_ROOTx_SET(idx) (CCM_TARGET_ROOTx(idx) + 0x4) 59e05236a9SClement Faure #define CCM_TARGET_ROOTx_CLR(idx) (CCM_TARGET_ROOTx(idx) + 0x8) 60e05236a9SClement Faure #define CCM_TARGET_ROOTx_TOG(idx) (CCM_TARGET_ROOTx(idx) + 0xC) 61e05236a9SClement Faure 62e05236a9SClement Faure /* 63e05236a9SClement Faure * MISC_ROOTx Registers (Miscellaneous) 64e05236a9SClement Faure */ 65e05236a9SClement Faure #define CCM_MISC_ROOT0 0x8010 66e05236a9SClement Faure #define CCM_MISC_ROOTx_OFFSET 0x80 67e05236a9SClement Faure #define CCM_MISC_ROOTx(idx) \ 68e05236a9SClement Faure (((idx) * CCM_MISC_ROOTx_OFFSET) + CCM_MISC_ROOT0) 69e05236a9SClement Faure #define CCM_MISC_ROOTx_SET(idx) (CCM_MISC_ROOTx(idx) + 0x4) 70e05236a9SClement Faure #define CCM_MISC_ROOTx_CLR(idx) (CCM_MISC_ROOTx(idx) + 0x8) 71e05236a9SClement Faure #define CCM_MISC_ROOTx_TOG(idx) (CCM_MISC_ROOTx(idx) + 0xC) 72e05236a9SClement Faure 73e05236a9SClement Faure /* 74e05236a9SClement Faure * POST_ROOTx Registers (Post Divider) 75e05236a9SClement Faure */ 76e05236a9SClement Faure #define CCM_POST_ROOT0 0x8020 77e05236a9SClement Faure #define CCM_POST_ROOTx_OFFSET 0x80 78e05236a9SClement Faure #define CCM_POST_ROOTx(idx) \ 79e05236a9SClement Faure (((idx) * CCM_POST_ROOTx_OFFSET) + CCM_POST_ROOT0) 80e05236a9SClement Faure #define CCM_POST_ROOTx_SET(idx) (CCM_POST_ROOTx(idx) + 0x4) 81e05236a9SClement Faure #define CCM_POST_ROOTx_CLR(idx) (CCM_POST_ROOTx(idx) + 0x8) 82e05236a9SClement Faure #define CCM_POST_ROOTx_TOG(idx) (CCM_POST_ROOTx(idx) + 0xC) 83e05236a9SClement Faure 84e05236a9SClement Faure /* 85e05236a9SClement Faure * PRE_ROOTx Registers (Pre Divider) 86e05236a9SClement Faure */ 87e05236a9SClement Faure #define CCM_PRE_ROOT0 0x8030 88e05236a9SClement Faure #define CCM_PRE_ROOTx_OFFSET 0x80 89e05236a9SClement Faure #define CCM_PRE_ROOTx(idx) \ 90e05236a9SClement Faure (((idx) * CCM_PRE_ROOTx_OFFSET) + CCM_PRE_ROOT0) 91e05236a9SClement Faure #define CCM_PRE_ROOTx_SET(idx) (CCM_PRE_ROOTx(idx) + 0x4) 92e05236a9SClement Faure #define CCM_PRE_ROOTx_CLR(idx) (CCM_PRE_ROOTx(idx) + 0x8) 93e05236a9SClement Faure #define CCM_PRE_ROOTx_TOG(idx) (CCM_PRE_ROOTx(idx) + 0xC) 94e05236a9SClement Faure 95e05236a9SClement Faure /* 96e05236a9SClement Faure * ACCESS_CTRL_ROOTx Registers (Access Control) 97e05236a9SClement Faure */ 98e05236a9SClement Faure #define CCM_ACCESS_CTRL_ROOT0 0x8030 99e05236a9SClement Faure #define CCM_ACCESS_CTRL_ROOTx_OFFSET 0x80 100e05236a9SClement Faure #define CCM_ACCESS_CTRL_ROOTx(idx) \ 101e05236a9SClement Faure (((idx) * CCM_ACCESS_CTRL_ROOTx_OFFSET) + CCM_ACCESS_CTRL_ROOT0) 102e05236a9SClement Faure #define CCM_ACCESS_CTRL_ROOTx_SET(idx) (CCM_ACCESS_CTRL_ROOTx(idx) + 0x4) 103e05236a9SClement Faure #define CCM_ACCESS_CTRL_ROOTx_CLR(idx) (CCM_ACCESS_CTRL_ROOTx(idx) + 0x8) 104e05236a9SClement Faure #define CCM_ACCESS_CTRL_ROOTx_TOG(idx) (CCM_ACCESS_CTRL_ROOTx(idx) + 0xC) 105e05236a9SClement Faure 106e05236a9SClement Faure /* 107e05236a9SClement Faure * Clock Domain ID 108e05236a9SClement Faure */ 109*e4ca953cSClement Faure #define CCM_CLOCK_DOMAIN_OCOTP 35 110e05236a9SClement Faure #define CCM_CLOCK_DOMAIN_CAAM 36 111e05236a9SClement Faure 112e05236a9SClement Faure #endif /* __IMX7_CRM_H__ */ 113