xref: /optee_os/core/arch/arm/plat-imx/conf.mk (revision df24e6517b6454cf906c16979ea0e7546c5c99d5) 
1PLATFORM_FLAVOR ?= mx6ulevk
2
3# Get SoC associated with the PLATFORM_FLAVOR
4mx6ul-flavorlist = \
5	mx6ulevk \
6	mx6ul9x9evk \
7	mx6ulccimx6ulsbcpro \
8
9mx6ull-flavorlist = \
10	mx6ullevk \
11
12mx6q-flavorlist = \
13	mx6qsabrelite \
14	mx6qsabreauto \
15	mx6qsabresd \
16	mx6qhmbedge \
17	mx6qapalis \
18
19mx6qp-flavorlist = \
20	mx6qpsabreauto \
21	mx6qpsabresd \
22
23mx6sl-flavorlist = \
24	mx6slevk
25
26mx6sll-flavorlist = \
27	mx6sllevk
28
29mx6sx-flavorlist = \
30	mx6sxsabreauto \
31	mx6sxsabresd \
32	mx6sxudooneofull \
33
34mx6d-flavorlist = \
35	mx6dhmbedge \
36	mx6dapalis \
37
38mx6dl-flavorlist = \
39	mx6dlsabreauto \
40	mx6dlsabresd \
41	mx6dlhmbedge \
42
43mx6s-flavorlist = \
44	mx6shmbedge \
45	mx6solosabresd \
46	mx6solosabreauto \
47
48mx7d-flavorlist = \
49	mx7dsabresd \
50	mx7dpico_mbl \
51	mx7dclsom \
52
53mx7s-flavorlist = \
54	mx7swarp7 \
55	mx7swarp7_mbl \
56
57mx7ulp-flavorlist = \
58	mx7ulpevk
59
60mx8mq-flavorlist = \
61	mx8mqevk
62
63mx8mm-flavorlist = \
64	mx8mmevk
65
66mx8mn-flavorlist = \
67	mx8mnevk
68
69mx8qm-flavorlist = \
70	mx8qmmek \
71
72mx8qx-flavorlist = \
73	mx8qxpmek \
74
75ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ul-flavorlist)))
76$(call force,CFG_MX6,y)
77$(call force,CFG_MX6UL,y)
78$(call force,CFG_TEE_CORE_NB_CORE,1)
79include core/arch/arm/cpu/cortex-a7.mk
80else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ull-flavorlist)))
81$(call force,CFG_MX6,y)
82$(call force,CFG_MX6ULL,y)
83$(call force,CFG_TEE_CORE_NB_CORE,1)
84$(call force,CFG_IMX_CAAM,n)
85$(call force,CFG_NXP_CAAM,n)
86include core/arch/arm/cpu/cortex-a7.mk
87else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6q-flavorlist)))
88$(call force,CFG_MX6,y)
89$(call force,CFG_MX6Q,y)
90$(call force,CFG_TEE_CORE_NB_CORE,4)
91else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6qp-flavorlist)))
92$(call force,CFG_MX6,y)
93$(call force,CFG_MX6QP,y)
94$(call force,CFG_TEE_CORE_NB_CORE,4)
95else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6d-flavorlist)))
96$(call force,CFG_MX6,y)
97$(call force,CFG_MX6D,y)
98$(call force,CFG_TEE_CORE_NB_CORE,2)
99else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6dl-flavorlist)))
100$(call force,CFG_MX6,y)
101$(call force,CFG_MX6DL,y)
102$(call force,CFG_TEE_CORE_NB_CORE,2)
103else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6s-flavorlist)))
104$(call force,CFG_MX6,y)
105$(call force,CFG_MX6S,y)
106$(call force,CFG_TEE_CORE_NB_CORE,1)
107else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sl-flavorlist)))
108$(call force,CFG_MX6,y)
109$(call force,CFG_MX6SL,y)
110$(call force,CFG_TEE_CORE_NB_CORE,1)
111$(call force,CFG_IMX_CAAM,n)
112$(call force,CFG_NXP_CAAM,n)
113else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sll-flavorlist)))
114$(call force,CFG_MX6,y)
115$(call force,CFG_MX6SLL,y)
116$(call force,CFG_TEE_CORE_NB_CORE,1)
117$(call force,CFG_IMX_CAAM,n)
118$(call force,CFG_NXP_CAAM,n)
119else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sx-flavorlist)))
120$(call force,CFG_MX6,y)
121$(call force,CFG_MX6SX,y)
122$(call force,CFG_TEE_CORE_NB_CORE,1)
123else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7s-flavorlist)))
124$(call force,CFG_MX7,y)
125$(call force,CFG_TEE_CORE_NB_CORE,1)
126include core/arch/arm/cpu/cortex-a7.mk
127else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7d-flavorlist)))
128$(call force,CFG_MX7,y)
129$(call force,CFG_TEE_CORE_NB_CORE,2)
130include core/arch/arm/cpu/cortex-a7.mk
131else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7ulp-flavorlist)))
132$(call force,CFG_MX7ULP,y)
133$(call force,CFG_TEE_CORE_NB_CORE,1)
134$(call force,CFG_TZC380,n)
135$(call force,CFG_CSU,n)
136$(call force,CFG_NXP_CAAM,n)
137include core/arch/arm/cpu/cortex-a7.mk
138else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mq-flavorlist)))
139$(call force,CFG_MX8MQ,y)
140$(call force,CFG_ARM64_core,y)
141CFG_IMX_UART ?= y
142CFG_DRAM_BASE ?= 0x40000000
143CFG_TEE_CORE_NB_CORE ?= 4
144else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mm-flavorlist)))
145$(call force,CFG_MX8MM,y)
146$(call force,CFG_ARM64_core,y)
147CFG_IMX_UART ?= y
148CFG_DRAM_BASE ?= 0x40000000
149CFG_TEE_CORE_NB_CORE ?= 4
150else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mn-flavorlist)))
151$(call force,CFG_MX8MN,y)
152$(call force,CFG_ARM64_core,y)
153CFG_IMX_UART ?= y
154CFG_DRAM_BASE ?= 0x40000000
155CFG_TEE_CORE_NB_CORE ?= 4
156else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8qm-flavorlist)))
157$(call force,CFG_MX8QM,y)
158$(call force,CFG_ARM64_core,y)
159$(call force,CFG_IMX_SNVS,n)
160CFG_IMX_LPUART ?= y
161CFG_DRAM_BASE ?= 0x80000000
162CFG_TEE_CORE_NB_CORE ?= 6
163$(call force,CFG_NXP_CAAM,n)
164else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8qx-flavorlist)))
165$(call force,CFG_MX8QX,y)
166$(call force,CFG_ARM64_core,y)
167CFG_IMX_LPUART ?= y
168CFG_DRAM_BASE ?= 0x80000000
169CFG_TEE_CORE_NB_CORE ?= 4
170$(call force,CFG_NXP_CAAM,n)
171else
172$(error Unsupported PLATFORM_FLAVOR "$(PLATFORM_FLAVOR)")
173endif
174
175ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dsabresd))
176CFG_DDR_SIZE ?= 0x40000000
177CFG_NS_ENTRY_ADDR ?= 0x80800000
178endif
179
180ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dclsom))
181CFG_DDR_SIZE ?= 0x40000000
182CFG_UART_BASE ?= UART1_BASE
183endif
184
185ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dpico_mbl))
186CFG_DDR_SIZE ?= 0x20000000
187CFG_NS_ENTRY_ADDR ?= 0x87800000
188CFG_DT_ADDR ?= 0x83100000
189CFG_UART_BASE ?= UART5_BASE
190CFG_BOOT_SECONDARY_REQUEST ?= n
191CFG_EXTERNAL_DTB_OVERLAY ?= y
192CFG_IMX_WDOG_EXT_RESET ?= y
193endif
194
195ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7))
196CFG_DDR_SIZE ?= 0x20000000
197CFG_NS_ENTRY_ADDR ?= 0x80800000
198CFG_BOOT_SECONDARY_REQUEST ?= n
199endif
200
201ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7_mbl))
202CFG_DDR_SIZE ?= 0x20000000
203CFG_NS_ENTRY_ADDR ?= 0x87800000
204CFG_DT_ADDR ?= 0x83100000
205CFG_BOOT_SECONDARY_REQUEST ?= n
206CFG_EXTERNAL_DTB_OVERLAY = y
207CFG_IMX_WDOG_EXT_RESET = y
208endif
209
210ifneq (,$(filter $(PLATFORM_FLAVOR),mx7ulpevk))
211CFG_DDR_SIZE ?= 0x40000000
212CFG_NS_ENTRY_ADDR ?= 0x60800000
213CFG_UART_BASE ?= UART4_BASE
214endif
215
216ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qpsabresd mx6qsabresd mx6dlsabresd \
217	mx6dlsabrelite mx6dhmbedge mx6dlhmbedge mx6solosabresd \
218	mx6dapalis mx6qapalis))
219CFG_DDR_SIZE ?= 0x40000000
220CFG_NS_ENTRY_ADDR ?= 0x12000000
221endif
222
223ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qpsabreauto mx6qsabreauto \
224	mx6dlsabreauto mx6solosabreauto))
225CFG_DDR_SIZE ?= 0x80000000
226CFG_NS_ENTRY_ADDR ?= 0x12000000
227endif
228
229ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qhmbedge))
230CFG_DDR_SIZE ?= 0x80000000
231CFG_UART_BASE ?= UART1_BASE
232endif
233
234ifneq (,$(filter $(PLATFORM_FLAVOR),mx6shmbedge))
235CFG_DDR_SIZE ?= 0x40000000
236CFG_NS_ENTRY_ADDR ?= 0x12000000
237endif
238
239ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qsabrelite mx6dlsabrelite))
240CFG_DDR_SIZE ?= 0x40000000
241CFG_NS_ENTRY_ADDR ?= 0x12000000
242CFG_UART_BASE ?= UART2_BASE
243endif
244
245ifneq (,$(filter $(PLATFORM_FLAVOR),mx6slevk))
246CFG_NS_ENTRY_ADDR ?= 0x80800000
247CFG_DDR_SIZE ?= 0x40000000
248endif
249
250ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sllevk))
251CFG_NS_ENTRY_ADDR ?= 0x80800000
252CFG_DDR_SIZE ?= 0x80000000
253endif
254
255ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sxsabreauto))
256CFG_DDR_SIZE ?= 0x80000000
257CFG_NS_ENTRY_ADDR ?= 0x80800000
258endif
259
260ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sxsabresd))
261CFG_DDR_SIZE ?= 0x40000000
262CFG_NS_ENTRY_ADDR ?= 0x80800000
263endif
264
265ifeq ($(PLATFORM_FLAVOR), mx6sxudooneofull)
266CFG_DDR_SIZE ?= 0x40000000
267CFG_UART_BASE ?= UART1_BASE
268endif
269
270ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulevk mx6ullevk))
271CFG_DDR_SIZE ?= 0x20000000
272CFG_NS_ENTRY_ADDR ?= 0x80800000
273endif
274
275ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulccimx6ulsbcpro))
276CFG_DDR_SIZE ?= 0x10000000
277CFG_NS_ENTRY_ADDR ?= 0x80800000
278CFG_UART_BASE ?= UART5_BASE
279endif
280
281ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ul9x9evk))
282CFG_DDR_SIZE ?= 0x10000000
283CFG_NS_ENTRY_ADDR ?= 0x80800000
284endif
285
286ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mqevk))
287CFG_DDR_SIZE ?= 0xc0000000
288CFG_UART_BASE ?= UART1_BASE
289endif
290
291ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mmevk))
292CFG_DDR_SIZE ?= 0x80000000
293CFG_UART_BASE ?= UART2_BASE
294endif
295
296ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mnevk))
297CFG_DDR_SIZE ?= 0x80000000
298CFG_UART_BASE ?= UART2_BASE
299endif
300
301ifneq (,$(filter $(PLATFORM_FLAVOR),mx8qxpmek mx8qmmek))
302CFG_DDR_SIZE ?= 0x80000000
303CFG_UART_BASE ?= UART0_BASE
304endif
305
306# i.MX6 Solo/SL/SoloX/DualLite/Dual/Quad specific config
307ifeq ($(filter y, $(CFG_MX6QP) $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S) \
308	$(CFG_MX6SL) $(CFG_MX6SLL) $(CFG_MX6SX)), y)
309include core/arch/arm/cpu/cortex-a9.mk
310
311$(call force,CFG_PL310,y)
312
313CFG_PL310_LOCKED ?= y
314CFG_ENABLE_SCTLR_RR ?= y
315CFG_SCU ?= y
316endif
317
318ifeq ($(filter y, $(CFG_MX6QP) $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S)), y)
319CFG_DRAM_BASE ?= 0x10000000
320endif
321
322ifneq (,$(filter y, $(CFG_MX6UL) $(CFG_MX6ULL) $(CFG_MX6SL) $(CFG_MX6SLL) \
323	$(CFG_MX6SX)))
324CFG_DRAM_BASE ?= 0x80000000
325endif
326
327ifeq ($(filter y, $(CFG_MX7)), y)
328CFG_INIT_CNTVOFF ?= y
329CFG_DRAM_BASE ?= 0x80000000
330endif
331
332ifeq ($(filter y, $(CFG_MX7ULP)), y)
333CFG_INIT_CNTVOFF ?= y
334CFG_DRAM_BASE ?= UL(0x60000000)
335$(call force,CFG_IMX_LPUART,y)
336$(call force,CFG_BOOT_SECONDARY_REQUEST,n)
337endif
338
339ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7) $(CFG_MX7ULP)))
340$(call force,CFG_GENERIC_BOOT,y)
341$(call force,CFG_GIC,y)
342$(call force,CFG_PM_STUBS,y)
343
344CFG_BOOT_SYNC_CPU ?= n
345CFG_BOOT_SECONDARY_REQUEST ?= y
346CFG_DT ?= y
347CFG_PAGEABLE_ADDR ?= 0
348CFG_PSCI_ARM32 ?= y
349CFG_SECURE_TIME_SOURCE_REE ?= y
350CFG_UART_BASE ?= UART1_BASE
351endif
352
353ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7)))
354$(call force,CFG_IMX_UART,y)
355CFG_CSU ?= y
356endif
357
358ifeq ($(filter y, $(CFG_PSCI_ARM32)), y)
359CFG_HWSUPP_MEM_PERM_WXN = n
360CFG_IMX_WDOG ?= y
361endif
362
363ifeq ($(CFG_ARM64_core),y)
364# arm-v8 platforms
365include core/arch/arm/cpu/cortex-armv8-0.mk
366$(call force,CFG_ARM_GICV3,y)
367$(call force,CFG_GENERIC_BOOT,y)
368$(call force,CFG_GIC,y)
369$(call force,CFG_WITH_LPAE,y)
370$(call force,CFG_WITH_ARM_TRUSTED_FW,y)
371$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
372
373CFG_CRYPTO_WITH_CE ?= y
374CFG_PM_STUBS ?= y
375
376supported-ta-targets = ta_arm64
377endif
378
379CFG_TZDRAM_START ?= ($(CFG_DRAM_BASE) - 0x02000000 + $(CFG_DDR_SIZE))
380CFG_TZDRAM_SIZE ?= 0x01e00000
381CFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE))
382CFG_SHMEM_SIZE ?= 0x00200000
383
384CFG_CRYPTO_SIZE_OPTIMIZATION ?= n
385CFG_WITH_STACK_CANARIES ?= y
386CFG_MMAP_REGIONS ?= 24
387
388# Almost all platforms include CAAM HW Modules, except the
389# ones forced to be disabled
390CFG_NXP_CAAM ?= n
391
392ifeq ($(CFG_NXP_CAAM),y)
393# As NXP CAAM Driver is enabled, disable the small local CAAM driver
394# used just to release Job Rings to Non-Secure world
395$(call force,CFG_IMX_CAAM,n)
396
397# If NXP CAAM Driver is supported, the Crypto Driver interfacing
398# it with generic crypto API can be enabled.
399CFG_CRYPTO_DRIVER ?= y
400# Crypto Driver Debug
401CFG_CRYPTO_DRIVER_DEBUG ?= n
402else
403$(call force,CFG_CRYPTO_DRIVER,n)
404$(call force,CFG_WITH_SOFTWARE_PRNG,y)
405
406ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7) $(CFG_MX7ULP)))
407CFG_IMX_CAAM ?= y
408endif
409endif
410
411# Cryptographic configuration
412include core/arch/arm/plat-imx/crypto_conf.mk
413