xref: /optee_os/core/arch/arm/plat-imx/conf.mk (revision b6ca7e5dd226f2c3691d798ab81d1cf35dfec33e) 
1PLATFORM_FLAVOR ?= mx6ulevk
2
3# Get SoC associated with the PLATFORM_FLAVOR
4mx6ul-flavorlist = \
5	mx6ulevk \
6	mx6ul9x9evk \
7	mx6ulccimx6ulsbcpro \
8	mx6ulccbv2 \
9
10mx6ull-flavorlist = \
11	mx6ullevk \
12	mx6ulzevk \
13
14mx6q-flavorlist = \
15	mx6qsabrelite \
16	mx6qsabreauto \
17	mx6qsabresd \
18	mx6qhmbedge \
19	mx6qapalis \
20
21mx6qp-flavorlist = \
22	mx6qpsabreauto \
23	mx6qpsabresd \
24
25mx6sl-flavorlist = \
26	mx6slevk
27
28mx6sll-flavorlist = \
29	mx6sllevk
30
31mx6sx-flavorlist = \
32	mx6sxsabreauto \
33	mx6sxsabresd \
34	mx6sxudooneofull \
35
36mx6d-flavorlist = \
37	mx6dhmbedge \
38	mx6dapalis \
39
40mx6dl-flavorlist = \
41	mx6dlsabreauto \
42	mx6dlsabresd \
43	mx6dlhmbedge \
44
45mx6s-flavorlist = \
46	mx6shmbedge \
47	mx6solosabresd \
48	mx6solosabreauto \
49
50mx7d-flavorlist = \
51	mx7dsabresd \
52	mx7dpico_mbl \
53	mx7dclsom \
54
55mx7s-flavorlist = \
56	mx7swarp7 \
57	mx7swarp7_mbl \
58
59mx7ulp-flavorlist = \
60	mx7ulpevk
61
62mx8mq-flavorlist = \
63	mx8mqevk
64
65mx8mm-flavorlist = \
66	mx8mmevk
67
68mx8mn-flavorlist = \
69	mx8mnevk
70
71mx8qm-flavorlist = \
72	mx8qmmek \
73
74mx8qx-flavorlist = \
75	mx8qxpmek \
76
77ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ul-flavorlist)))
78$(call force,CFG_MX6,y)
79$(call force,CFG_MX6UL,y)
80$(call force,CFG_TEE_CORE_NB_CORE,1)
81$(call force,CFG_TZC380,y)
82include core/arch/arm/cpu/cortex-a7.mk
83else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ull-flavorlist)))
84$(call force,CFG_MX6,y)
85$(call force,CFG_MX6ULL,y)
86$(call force,CFG_TEE_CORE_NB_CORE,1)
87$(call force,CFG_IMX_CAAM,n)
88$(call force,CFG_NXP_CAAM,n)
89$(call force,CFG_IMX_DCP,y)
90include core/arch/arm/cpu/cortex-a7.mk
91else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6q-flavorlist)))
92$(call force,CFG_MX6,y)
93$(call force,CFG_MX6Q,y)
94$(call force,CFG_TEE_CORE_NB_CORE,4)
95$(call force,CFG_TZC380,y)
96else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6qp-flavorlist)))
97$(call force,CFG_MX6,y)
98$(call force,CFG_MX6QP,y)
99$(call force,CFG_TEE_CORE_NB_CORE,4)
100else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6d-flavorlist)))
101$(call force,CFG_MX6,y)
102$(call force,CFG_MX6D,y)
103$(call force,CFG_TEE_CORE_NB_CORE,2)
104$(call force,CFG_TZC380,y)
105else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6dl-flavorlist)))
106$(call force,CFG_MX6,y)
107$(call force,CFG_MX6DL,y)
108$(call force,CFG_TEE_CORE_NB_CORE,2)
109$(call force,CFG_TZC380,y)
110else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6s-flavorlist)))
111$(call force,CFG_MX6,y)
112$(call force,CFG_MX6S,y)
113$(call force,CFG_TEE_CORE_NB_CORE,1)
114else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sl-flavorlist)))
115$(call force,CFG_MX6,y)
116$(call force,CFG_MX6SL,y)
117$(call force,CFG_TEE_CORE_NB_CORE,1)
118$(call force,CFG_IMX_CAAM,n)
119$(call force,CFG_NXP_CAAM,n)
120$(call force,CFG_IMX_DCP,y)
121else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sll-flavorlist)))
122$(call force,CFG_MX6,y)
123$(call force,CFG_MX6SLL,y)
124$(call force,CFG_TEE_CORE_NB_CORE,1)
125$(call force,CFG_IMX_CAAM,n)
126$(call force,CFG_NXP_CAAM,n)
127$(call force,CFG_IMX_DCP,y)
128else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sx-flavorlist)))
129$(call force,CFG_MX6,y)
130$(call force,CFG_MX6SX,y)
131$(call force,CFG_TEE_CORE_NB_CORE,1)
132else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7s-flavorlist)))
133$(call force,CFG_MX7,y)
134$(call force,CFG_TEE_CORE_NB_CORE,1)
135include core/arch/arm/cpu/cortex-a7.mk
136else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7d-flavorlist)))
137$(call force,CFG_MX7,y)
138$(call force,CFG_TEE_CORE_NB_CORE,2)
139include core/arch/arm/cpu/cortex-a7.mk
140else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7ulp-flavorlist)))
141$(call force,CFG_MX7ULP,y)
142$(call force,CFG_TEE_CORE_NB_CORE,1)
143$(call force,CFG_TZC380,n)
144$(call force,CFG_CSU,n)
145$(call force,CFG_NXP_CAAM,n)
146include core/arch/arm/cpu/cortex-a7.mk
147else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mq-flavorlist)))
148$(call force,CFG_MX8MQ,y)
149$(call force,CFG_ARM64_core,y)
150CFG_IMX_UART ?= y
151CFG_DRAM_BASE ?= 0x40000000
152CFG_TEE_CORE_NB_CORE ?= 4
153else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mm-flavorlist)))
154$(call force,CFG_MX8MM,y)
155$(call force,CFG_ARM64_core,y)
156CFG_IMX_UART ?= y
157CFG_DRAM_BASE ?= 0x40000000
158CFG_TEE_CORE_NB_CORE ?= 4
159else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mn-flavorlist)))
160$(call force,CFG_MX8MN,y)
161$(call force,CFG_ARM64_core,y)
162CFG_IMX_UART ?= y
163CFG_DRAM_BASE ?= 0x40000000
164CFG_TEE_CORE_NB_CORE ?= 4
165else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8qm-flavorlist)))
166$(call force,CFG_MX8QM,y)
167$(call force,CFG_ARM64_core,y)
168$(call force,CFG_IMX_SNVS,n)
169CFG_IMX_LPUART ?= y
170CFG_DRAM_BASE ?= 0x80000000
171CFG_TEE_CORE_NB_CORE ?= 6
172$(call force,CFG_NXP_CAAM,n)
173else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8qx-flavorlist)))
174$(call force,CFG_MX8QX,y)
175$(call force,CFG_ARM64_core,y)
176CFG_IMX_LPUART ?= y
177CFG_DRAM_BASE ?= 0x80000000
178CFG_TEE_CORE_NB_CORE ?= 4
179$(call force,CFG_NXP_CAAM,n)
180else
181$(error Unsupported PLATFORM_FLAVOR "$(PLATFORM_FLAVOR)")
182endif
183
184ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dsabresd))
185CFG_DDR_SIZE ?= 0x40000000
186CFG_NS_ENTRY_ADDR ?= 0x80800000
187endif
188
189ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dclsom))
190CFG_DDR_SIZE ?= 0x40000000
191CFG_UART_BASE ?= UART1_BASE
192endif
193
194ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dpico_mbl))
195CFG_DDR_SIZE ?= 0x20000000
196CFG_NS_ENTRY_ADDR ?= 0x87800000
197CFG_DT_ADDR ?= 0x83100000
198CFG_UART_BASE ?= UART5_BASE
199CFG_BOOT_SECONDARY_REQUEST ?= n
200CFG_EXTERNAL_DTB_OVERLAY ?= y
201CFG_IMX_WDOG_EXT_RESET ?= y
202endif
203
204ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7))
205CFG_DDR_SIZE ?= 0x20000000
206CFG_NS_ENTRY_ADDR ?= 0x80800000
207CFG_BOOT_SECONDARY_REQUEST ?= n
208endif
209
210ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7_mbl))
211CFG_DDR_SIZE ?= 0x20000000
212CFG_NS_ENTRY_ADDR ?= 0x87800000
213CFG_DT_ADDR ?= 0x83100000
214CFG_BOOT_SECONDARY_REQUEST ?= n
215CFG_EXTERNAL_DTB_OVERLAY = y
216CFG_IMX_WDOG_EXT_RESET = y
217endif
218
219ifneq (,$(filter $(PLATFORM_FLAVOR),mx7ulpevk))
220CFG_DDR_SIZE ?= 0x40000000
221CFG_NS_ENTRY_ADDR ?= 0x60800000
222CFG_UART_BASE ?= UART4_BASE
223endif
224
225ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qpsabresd mx6qsabresd mx6dlsabresd \
226	mx6dlsabrelite mx6dhmbedge mx6dlhmbedge mx6solosabresd \
227	mx6dapalis mx6qapalis))
228CFG_DDR_SIZE ?= 0x40000000
229CFG_NS_ENTRY_ADDR ?= 0x12000000
230endif
231
232ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qpsabreauto mx6qsabreauto \
233	mx6dlsabreauto mx6solosabreauto))
234CFG_DDR_SIZE ?= 0x80000000
235CFG_NS_ENTRY_ADDR ?= 0x12000000
236CFG_UART_BASE ?= UART4_BASE
237endif
238
239ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qhmbedge))
240CFG_DDR_SIZE ?= 0x80000000
241CFG_UART_BASE ?= UART1_BASE
242endif
243
244ifneq (,$(filter $(PLATFORM_FLAVOR),mx6shmbedge))
245CFG_DDR_SIZE ?= 0x40000000
246CFG_NS_ENTRY_ADDR ?= 0x12000000
247endif
248
249ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qsabrelite mx6dlsabrelite))
250CFG_DDR_SIZE ?= 0x40000000
251CFG_NS_ENTRY_ADDR ?= 0x12000000
252CFG_UART_BASE ?= UART2_BASE
253endif
254
255ifneq (,$(filter $(PLATFORM_FLAVOR),mx6slevk))
256CFG_NS_ENTRY_ADDR ?= 0x80800000
257CFG_DDR_SIZE ?= 0x40000000
258endif
259
260ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sllevk))
261CFG_NS_ENTRY_ADDR ?= 0x80800000
262CFG_DDR_SIZE ?= 0x80000000
263endif
264
265ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sxsabreauto))
266CFG_DDR_SIZE ?= 0x80000000
267CFG_NS_ENTRY_ADDR ?= 0x80800000
268endif
269
270ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sxsabresd))
271CFG_DDR_SIZE ?= 0x40000000
272CFG_NS_ENTRY_ADDR ?= 0x80800000
273endif
274
275ifeq ($(PLATFORM_FLAVOR), mx6sxudooneofull)
276CFG_DDR_SIZE ?= 0x40000000
277CFG_UART_BASE ?= UART1_BASE
278endif
279
280ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulevk mx6ullevk mx6ulzevk))
281CFG_DDR_SIZE ?= 0x20000000
282CFG_NS_ENTRY_ADDR ?= 0x80800000
283endif
284
285ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulccimx6ulsbcpro))
286CFG_DDR_SIZE ?= 0x10000000
287CFG_NS_ENTRY_ADDR ?= 0x80800000
288CFG_UART_BASE ?= UART5_BASE
289endif
290
291ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ul9x9evk))
292CFG_DDR_SIZE ?= 0x10000000
293CFG_NS_ENTRY_ADDR ?= 0x80800000
294endif
295
296ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulccbv2))
297CFG_DDR_SIZE ?= 0x10000000
298CFG_UART_BASE ?= UART7_BASE
299endif
300
301ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mqevk))
302CFG_DDR_SIZE ?= 0xc0000000
303CFG_UART_BASE ?= UART1_BASE
304endif
305
306ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mmevk))
307CFG_DDR_SIZE ?= 0x80000000
308CFG_UART_BASE ?= UART2_BASE
309endif
310
311ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mnevk))
312CFG_DDR_SIZE ?= 0x80000000
313CFG_UART_BASE ?= UART2_BASE
314endif
315
316ifneq (,$(filter $(PLATFORM_FLAVOR),mx8qxpmek mx8qmmek))
317CFG_DDR_SIZE ?= 0x80000000
318CFG_UART_BASE ?= UART0_BASE
319CFG_NSEC_DDR_1_BASE ?= 0x880000000UL
320CFG_NSEC_DDR_1_SIZE  ?= 0x380000000UL
321CFG_CORE_ARM64_PA_BITS ?= 40
322endif
323
324# i.MX6 Solo/SL/SoloX/DualLite/Dual/Quad specific config
325ifeq ($(filter y, $(CFG_MX6QP) $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S) \
326	$(CFG_MX6SL) $(CFG_MX6SLL) $(CFG_MX6SX)), y)
327include core/arch/arm/cpu/cortex-a9.mk
328
329$(call force,CFG_PL310,y)
330
331CFG_PL310_LOCKED ?= y
332CFG_ENABLE_SCTLR_RR ?= y
333CFG_SCU ?= y
334endif
335
336ifeq ($(filter y, $(CFG_MX6QP) $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S)), y)
337CFG_DRAM_BASE ?= 0x10000000
338endif
339
340ifneq (,$(filter y, $(CFG_MX6UL) $(CFG_MX6ULL) $(CFG_MX6SL) $(CFG_MX6SLL) \
341	$(CFG_MX6SX)))
342CFG_DRAM_BASE ?= 0x80000000
343endif
344
345ifeq ($(filter y, $(CFG_MX7)), y)
346CFG_INIT_CNTVOFF ?= y
347CFG_DRAM_BASE ?= 0x80000000
348endif
349
350ifeq ($(filter y, $(CFG_MX7ULP)), y)
351CFG_INIT_CNTVOFF ?= y
352CFG_DRAM_BASE ?= UL(0x60000000)
353$(call force,CFG_IMX_LPUART,y)
354$(call force,CFG_BOOT_SECONDARY_REQUEST,n)
355endif
356
357ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7) $(CFG_MX7ULP)))
358$(call force,CFG_GIC,y)
359
360CFG_BOOT_SECONDARY_REQUEST ?= y
361CFG_DT ?= y
362CFG_PAGEABLE_ADDR ?= 0
363CFG_PSCI_ARM32 ?= y
364CFG_SECURE_TIME_SOURCE_REE ?= y
365CFG_UART_BASE ?= UART1_BASE
366endif
367
368ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7)))
369$(call force,CFG_IMX_UART,y)
370ifeq ($(CFG_RPMB_FS),y)
371CFG_IMX_SNVS ?= y
372endif
373CFG_CSU ?= y
374endif
375
376ifeq ($(filter y, $(CFG_PSCI_ARM32)), y)
377CFG_HWSUPP_MEM_PERM_WXN = n
378CFG_IMX_WDOG ?= y
379endif
380
381ifeq ($(CFG_ARM64_core),y)
382# arm-v8 platforms
383include core/arch/arm/cpu/cortex-armv8-0.mk
384$(call force,CFG_ARM_GICV3,y)
385$(call force,CFG_GIC,y)
386$(call force,CFG_WITH_LPAE,y)
387$(call force,CFG_WITH_ARM_TRUSTED_FW,y)
388$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
389
390CFG_CRYPTO_WITH_CE ?= y
391
392supported-ta-targets = ta_arm64
393endif
394
395CFG_TZDRAM_START ?= ($(CFG_DRAM_BASE) - 0x02000000 + $(CFG_DDR_SIZE))
396CFG_TZDRAM_SIZE ?= 0x01e00000
397CFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE))
398CFG_SHMEM_SIZE ?= 0x00200000
399
400CFG_NSEC_DDR_0_BASE ?= $(CFG_DRAM_BASE)
401CFG_NSEC_DDR_0_SIZE ?= ($(CFG_DDR_SIZE) - 0x02000000)
402
403CFG_CRYPTO_SIZE_OPTIMIZATION ?= n
404CFG_MMAP_REGIONS ?= 24
405
406# Almost all platforms include CAAM HW Modules, except the
407# ones forced to be disabled
408CFG_NXP_CAAM ?= n
409
410ifeq ($(CFG_NXP_CAAM),y)
411# As NXP CAAM Driver is enabled, disable the small local CAAM driver
412# used just to release Job Rings to Non-Secure world
413$(call force,CFG_IMX_CAAM,n)
414else
415
416ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7) $(CFG_MX7ULP)))
417CFG_IMX_CAAM ?= y
418endif
419endif
420
421# Cryptographic configuration
422include core/arch/arm/plat-imx/crypto_conf.mk
423