xref: /optee_os/core/arch/arm/plat-imx/conf.mk (revision 77327d7a47019cf9f66972403d0de1c32fe4cdee) 
1PLATFORM_FLAVOR ?= mx6ulevk
2
3# Get SoC associated with the PLATFORM_FLAVOR
4mx6ul-flavorlist = \
5	mx6ulevk \
6
7mx6ull-flavorlist = \
8	mx6ullevk \
9
10mx6q-flavorlist = \
11	mx6qsabrelite \
12	mx6qsabresd \
13	mx6qhmbedge \
14
15mx6sx-flavorlist = \
16	mx6sxsabreauto \
17	mx6sxudooneofull \
18
19mx6d-flavorlist = \
20	mx6dhmbedge \
21
22mx6dl-flavorlist = \
23	mx6dlsabresd \
24	mx6dlhmbedge \
25
26mx6s-flavorlist = \
27	mx6shmbedge \
28
29mx7-flavorlist = \
30	mx7dsabresd \
31	mx7dpico_mbl \
32	mx7swarp7 \
33	mx7swarp7_mbl \
34	mx7dclsom \
35
36imx8mq-flavorlist = \
37	imx8mqevk
38
39imx8mm-flavorlist = \
40	imx8mmevk
41
42ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ul-flavorlist)))
43$(call force,CFG_MX6,y)
44$(call force,CFG_MX6UL,y)
45$(call force,CFG_TEE_CORE_NB_CORE,1)
46include core/arch/arm/cpu/cortex-a7.mk
47else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ull-flavorlist)))
48$(call force,CFG_MX6,y)
49$(call force,CFG_MX6ULL,y)
50$(call force,CFG_TEE_CORE_NB_CORE,1)
51include core/arch/arm/cpu/cortex-a7.mk
52else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6q-flavorlist)))
53$(call force,CFG_MX6,y)
54$(call force,CFG_MX6Q,y)
55$(call force,CFG_TEE_CORE_NB_CORE,4)
56else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6d-flavorlist)))
57$(call force,CFG_MX6,y)
58$(call force,CFG_MX6D,y)
59$(call force,CFG_TEE_CORE_NB_CORE,2)
60else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6dl-flavorlist)))
61$(call force,CFG_MX6,y)
62$(call force,CFG_MX6DL,y)
63$(call force,CFG_TEE_CORE_NB_CORE,2)
64else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6s-flavorlist)))
65$(call force,CFG_MX6,y)
66$(call force,CFG_MX6S,y)
67$(call force,CFG_TEE_CORE_NB_CORE,1)
68else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sx-flavorlist)))
69$(call force,CFG_MX6,y)
70$(call force,CFG_MX6SX,y)
71$(call force,CFG_TEE_CORE_NB_CORE,1)
72else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7-flavorlist)))
73$(call force,CFG_MX7,y)
74CFG_TEE_CORE_NB_CORE ?= 2
75include core/arch/arm/cpu/cortex-a7.mk
76else ifneq (,$(filter $(PLATFORM_FLAVOR),$(imx8mq-flavorlist)))
77$(call force,CFG_IMX8MQ,y)
78$(call force,CFG_ARM64_core,y)
79CFG_IMX_UART ?= y
80CFG_DRAM_BASE ?= 0x40000000
81CFG_TEE_CORE_NB_CORE ?= 4
82else ifneq (,$(filter $(PLATFORM_FLAVOR),$(imx8mm-flavorlist)))
83$(call force,CFG_IMX8MM,y)
84$(call force,CFG_ARM64_core,y)
85CFG_IMX_UART ?= y
86CFG_DRAM_BASE ?= 0x40000000
87CFG_TEE_CORE_NB_CORE ?= 4
88else
89$(error Unsupported PLATFORM_FLAVOR "$(PLATFORM_FLAVOR)")
90endif
91
92ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dsabresd))
93CFG_DDR_SIZE ?= 0x40000000
94CFG_NS_ENTRY_ADDR ?= 0x80800000
95$(call force,CFG_TEE_CORE_NB_CORE,2)
96endif
97
98ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dclsom))
99CFG_DDR_SIZE ?= 0x40000000
100CFG_UART_BASE ?= UART1_BASE
101endif
102
103ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dpico_mbl))
104CFG_DDR_SIZE ?= 0x20000000
105CFG_NS_ENTRY_ADDR ?= 0x87800000
106CFG_DT_ADDR ?= 0x83100000
107CFG_UART_BASE ?= UART5_BASE
108CFG_BOOT_SECONDARY_REQUEST ?= n
109CFG_EXTERNAL_DTB_OVERLAY ?= y
110CFG_IMX_WDOG_EXT_RESET ?= y
111$(call force,CFG_TEE_CORE_NB_CORE,2)
112endif
113
114ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7))
115CFG_DDR_SIZE ?= 0x20000000
116CFG_NS_ENTRY_ADDR ?= 0x80800000
117CFG_BOOT_SECONDARY_REQUEST ?= n
118$(call force,CFG_TEE_CORE_NB_CORE,1)
119endif
120
121ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7_mbl))
122CFG_DDR_SIZE ?= 0x20000000
123CFG_NS_ENTRY_ADDR ?= 0x87800000
124CFG_DT_ADDR ?= 0x83100000
125CFG_BOOT_SECONDARY_REQUEST ?= n
126CFG_EXTERNAL_DTB_OVERLAY = y
127CFG_IMX_WDOG_EXT_RESET = y
128$(call force,CFG_TEE_CORE_NB_CORE,1)
129endif
130
131ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qsabresd mx6dlsabresd \
132	mx6dlsabrelite mx6dhmbedge mx6dlhmbedge))
133CFG_DDR_SIZE ?= 0x40000000
134CFG_NS_ENTRY_ADDR ?= 0x12000000
135endif
136
137ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qhmbedge))
138CFG_DDR_SIZE ?= 0x80000000
139CFG_UART_BASE ?= UART1_BASE
140endif
141
142ifneq (,$(filter $(PLATFORM_FLAVOR),mx6shmbedge))
143CFG_DDR_SIZE ?= 0x40000000
144CFG_NS_ENTRY_ADDR ?= 0x12000000
145endif
146
147ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qsabrelite mx6dlsabrelite))
148CFG_DDR_SIZE ?= 0x40000000
149CFG_NS_ENTRY_ADDR ?= 0x12000000
150CFG_UART_BASE ?= UART2_BASE
151endif
152
153ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sxsabreauto))
154CFG_DDR_SIZE ?= 0x80000000
155CFG_NS_ENTRY_ADDR ?= 0x80800000
156endif
157
158ifeq ($(PLATFORM_FLAVOR), mx6sxudooneofull)
159CFG_DDR_SIZE ?= 0x40000000
160CFG_UART_BASE ?= UART1_BASE
161endif
162
163ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulevk mx6ullevk))
164CFG_DDR_SIZE ?= 0x20000000
165CFG_NS_ENTRY_ADDR ?= 0x80800000
166endif
167
168ifneq (,$(filter $(PLATFORM_FLAVOR),imx8mqevk))
169CFG_DDR_SIZE ?= 0xc0000000
170CFG_UART_BASE ?= UART1_BASE
171endif
172
173ifneq (,$(filter $(PLATFORM_FLAVOR),imx8mmevk))
174CFG_DDR_SIZE ?= 0x80000000
175CFG_UART_BASE ?= UART2_BASE
176endif
177
178# i.MX6 Solo/SoloX/DualLite/Dual/Quad specific config
179ifeq ($(filter y, $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S) \
180      $(CFG_MX6SX)), y)
181include core/arch/arm/cpu/cortex-a9.mk
182
183$(call force,CFG_PL310,y)
184
185CFG_PL310_LOCKED ?= y
186CFG_ENABLE_SCTLR_RR ?= y
187endif
188
189ifeq ($(filter y, $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S)), y)
190CFG_DRAM_BASE ?= 0x10000000
191endif
192
193ifneq (,$(filter y, $(CFG_MX6UL) $(CFG_MX6ULL) $(CFG_MX6SX)))
194CFG_DRAM_BASE ?= 0x80000000
195endif
196
197ifeq ($(filter y, $(CFG_MX7)), y)
198CFG_INIT_CNTVOFF ?= y
199CFG_DRAM_BASE ?= 0x80000000
200endif
201
202ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7)))
203$(call force,CFG_GENERIC_BOOT,y)
204$(call force,CFG_GIC,y)
205$(call force,CFG_IMX_UART,y)
206$(call force,CFG_PM_STUBS,y)
207$(call force,CFG_WITH_SOFTWARE_PRNG,y)
208
209CFG_BOOT_SYNC_CPU ?= n
210CFG_BOOT_SECONDARY_REQUEST ?= y
211CFG_DT ?= y
212CFG_PAGEABLE_ADDR ?= 0
213CFG_PSCI_ARM32 ?= y
214CFG_SECURE_TIME_SOURCE_REE ?= y
215CFG_UART_BASE ?= UART1_BASE
216endif
217
218ifeq ($(filter y, $(CFG_PSCI_ARM32)), y)
219CFG_HWSUPP_MEM_PERM_WXN = n
220CFG_IMX_WDOG ?= y
221endif
222
223ifeq ($(CFG_ARM64_core),y)
224# arm-v8 platforms
225include core/arch/arm/cpu/cortex-armv8-0.mk
226$(call force,CFG_ARM_GICV3,y)
227$(call force,CFG_GENERIC_BOOT,y)
228$(call force,CFG_GIC,y)
229$(call force,CFG_WITH_LPAE,y)
230$(call force,CFG_WITH_ARM_TRUSTED_FW,y)
231$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
232
233CFG_CRYPTO_WITH_CE ?= y
234CFG_PM_STUBS ?= y
235
236supported-ta-targets = ta_arm64
237endif
238
239CFG_TZDRAM_START ?= ($(CFG_DRAM_BASE) - 0x02000000 + $(CFG_DDR_SIZE))
240CFG_TZDRAM_SIZE ?= 0x01e00000
241CFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE))
242CFG_SHMEM_SIZE ?= 0x00200000
243
244CFG_CRYPTO_SIZE_OPTIMIZATION ?= n
245CFG_WITH_STACK_CANARIES ?= y
246CFG_MMAP_REGIONS ?= 24
247