xref: /optee_os/core/arch/arm/plat-imx/conf.mk (revision 2391d619a7d07dbc2526a2a6b8ba01a44589becb) 
1PLATFORM_FLAVOR ?= mx6ulevk
2
3# Get SoC associated with the PLATFORM_FLAVOR
4mx6ul-flavorlist = \
5	mx6ulevk \
6	mx6ul9x9evk \
7	mx6ulccimx6ulsbcpro \
8	mx6ulccbv2 \
9
10mx6ull-flavorlist = \
11	mx6ullevk \
12	mx6ulzevk \
13
14mx6q-flavorlist = \
15	mx6qsabrelite \
16	mx6qsabreauto \
17	mx6qsabresd \
18	mx6qhmbedge \
19	mx6qapalis \
20
21mx6qp-flavorlist = \
22	mx6qpsabreauto \
23	mx6qpsabresd \
24
25mx6sl-flavorlist = \
26	mx6slevk
27
28mx6sll-flavorlist = \
29	mx6sllevk
30
31mx6sx-flavorlist = \
32	mx6sxsabreauto \
33	mx6sxsabresd \
34	mx6sxudooneofull \
35
36mx6d-flavorlist = \
37	mx6dhmbedge \
38	mx6dapalis \
39
40mx6dl-flavorlist = \
41	mx6dlsabreauto \
42	mx6dlsabresd \
43	mx6dlhmbedge \
44
45mx6s-flavorlist = \
46	mx6shmbedge \
47	mx6solosabresd \
48	mx6solosabreauto \
49
50mx7d-flavorlist = \
51	mx7dsabresd \
52	mx7dpico_mbl \
53	mx7dclsom \
54
55mx7s-flavorlist = \
56	mx7swarp7 \
57	mx7swarp7_mbl \
58
59mx7ulp-flavorlist = \
60	mx7ulpevk
61
62mx8mq-flavorlist = \
63	mx8mqevk
64
65mx8mm-flavorlist = \
66	mx8mmevk \
67	mx8mm_cl_iot_gate
68
69mx8mn-flavorlist = \
70	mx8mnevk
71
72mx8mp-flavorlist = \
73	mx8mpevk
74
75mx8qm-flavorlist = \
76	mx8qmmek \
77
78mx8qx-flavorlist = \
79	mx8qxpmek \
80
81ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ul-flavorlist)))
82$(call force,CFG_MX6,y)
83$(call force,CFG_MX6UL,y)
84$(call force,CFG_TEE_CORE_NB_CORE,1)
85$(call force,CFG_TZC380,y)
86include core/arch/arm/cpu/cortex-a7.mk
87else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ull-flavorlist)))
88$(call force,CFG_MX6,y)
89$(call force,CFG_MX6ULL,y)
90$(call force,CFG_TEE_CORE_NB_CORE,1)
91$(call force,CFG_IMX_CAAM,n)
92$(call force,CFG_NXP_CAAM,n)
93$(call force,CFG_IMX_DCP,y)
94include core/arch/arm/cpu/cortex-a7.mk
95else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6q-flavorlist)))
96$(call force,CFG_MX6,y)
97$(call force,CFG_MX6Q,y)
98$(call force,CFG_TEE_CORE_NB_CORE,4)
99$(call force,CFG_TZC380,y)
100else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6qp-flavorlist)))
101$(call force,CFG_MX6,y)
102$(call force,CFG_MX6QP,y)
103$(call force,CFG_TEE_CORE_NB_CORE,4)
104else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6d-flavorlist)))
105$(call force,CFG_MX6,y)
106$(call force,CFG_MX6D,y)
107$(call force,CFG_TEE_CORE_NB_CORE,2)
108$(call force,CFG_TZC380,y)
109else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6dl-flavorlist)))
110$(call force,CFG_MX6,y)
111$(call force,CFG_MX6DL,y)
112$(call force,CFG_TEE_CORE_NB_CORE,2)
113$(call force,CFG_TZC380,y)
114else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6s-flavorlist)))
115$(call force,CFG_MX6,y)
116$(call force,CFG_MX6S,y)
117$(call force,CFG_TEE_CORE_NB_CORE,1)
118else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sl-flavorlist)))
119$(call force,CFG_MX6,y)
120$(call force,CFG_MX6SL,y)
121$(call force,CFG_TEE_CORE_NB_CORE,1)
122$(call force,CFG_IMX_CAAM,n)
123$(call force,CFG_NXP_CAAM,n)
124$(call force,CFG_IMX_DCP,y)
125else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sll-flavorlist)))
126$(call force,CFG_MX6,y)
127$(call force,CFG_MX6SLL,y)
128$(call force,CFG_TEE_CORE_NB_CORE,1)
129$(call force,CFG_IMX_CAAM,n)
130$(call force,CFG_NXP_CAAM,n)
131$(call force,CFG_IMX_DCP,y)
132else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sx-flavorlist)))
133$(call force,CFG_MX6,y)
134$(call force,CFG_MX6SX,y)
135$(call force,CFG_TEE_CORE_NB_CORE,1)
136else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7s-flavorlist)))
137$(call force,CFG_MX7,y)
138$(call force,CFG_TEE_CORE_NB_CORE,1)
139include core/arch/arm/cpu/cortex-a7.mk
140else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7d-flavorlist)))
141$(call force,CFG_MX7,y)
142$(call force,CFG_TEE_CORE_NB_CORE,2)
143include core/arch/arm/cpu/cortex-a7.mk
144else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7ulp-flavorlist)))
145$(call force,CFG_MX7ULP,y)
146$(call force,CFG_TEE_CORE_NB_CORE,1)
147$(call force,CFG_TZC380,n)
148$(call force,CFG_CSU,n)
149$(call force,CFG_NXP_CAAM,n)
150include core/arch/arm/cpu/cortex-a7.mk
151else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mq-flavorlist)))
152$(call force,CFG_MX8MQ,y)
153$(call force,CFG_MX8M,y)
154$(call force,CFG_ARM64_core,y)
155CFG_IMX_UART ?= y
156CFG_DRAM_BASE ?= 0x40000000
157CFG_TEE_CORE_NB_CORE ?= 4
158else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mm-flavorlist)))
159$(call force,CFG_MX8MM,y)
160$(call force,CFG_MX8M,y)
161$(call force,CFG_ARM64_core,y)
162CFG_IMX_UART ?= y
163CFG_DRAM_BASE ?= 0x40000000
164CFG_TEE_CORE_NB_CORE ?= 4
165else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mn-flavorlist)))
166$(call force,CFG_MX8MN,y)
167$(call force,CFG_MX8M,y)
168$(call force,CFG_ARM64_core,y)
169CFG_IMX_UART ?= y
170CFG_DRAM_BASE ?= 0x40000000
171CFG_TEE_CORE_NB_CORE ?= 4
172else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mp-flavorlist)))
173$(call force,CFG_MX8MP,y)
174$(call force,CFG_MX8M,y)
175$(call force,CFG_ARM64_core,y)
176CFG_IMX_UART ?= y
177CFG_DRAM_BASE ?= 0x40000000
178CFG_TEE_CORE_NB_CORE ?= 4
179else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8qm-flavorlist)))
180$(call force,CFG_MX8QM,y)
181$(call force,CFG_ARM64_core,y)
182$(call force,CFG_IMX_SNVS,n)
183CFG_IMX_LPUART ?= y
184CFG_DRAM_BASE ?= 0x80000000
185CFG_TEE_CORE_NB_CORE ?= 6
186$(call force,CFG_NXP_CAAM,n)
187else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8qx-flavorlist)))
188$(call force,CFG_MX8QX,y)
189$(call force,CFG_ARM64_core,y)
190CFG_IMX_LPUART ?= y
191CFG_DRAM_BASE ?= 0x80000000
192CFG_TEE_CORE_NB_CORE ?= 4
193$(call force,CFG_NXP_CAAM,n)
194else
195$(error Unsupported PLATFORM_FLAVOR "$(PLATFORM_FLAVOR)")
196endif
197
198ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dsabresd))
199CFG_DDR_SIZE ?= 0x40000000
200CFG_NS_ENTRY_ADDR ?= 0x80800000
201endif
202
203ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dclsom))
204CFG_DDR_SIZE ?= 0x40000000
205CFG_UART_BASE ?= UART1_BASE
206endif
207
208ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dpico_mbl))
209CFG_DDR_SIZE ?= 0x20000000
210CFG_NS_ENTRY_ADDR ?= 0x87800000
211CFG_DT_ADDR ?= 0x83100000
212CFG_UART_BASE ?= UART5_BASE
213CFG_BOOT_SECONDARY_REQUEST ?= n
214CFG_EXTERNAL_DTB_OVERLAY ?= y
215CFG_IMX_WDOG_EXT_RESET ?= y
216endif
217
218ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7))
219CFG_DDR_SIZE ?= 0x20000000
220CFG_NS_ENTRY_ADDR ?= 0x80800000
221CFG_BOOT_SECONDARY_REQUEST ?= n
222endif
223
224ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7_mbl))
225CFG_DDR_SIZE ?= 0x20000000
226CFG_NS_ENTRY_ADDR ?= 0x87800000
227CFG_DT_ADDR ?= 0x83100000
228CFG_BOOT_SECONDARY_REQUEST ?= n
229CFG_EXTERNAL_DTB_OVERLAY = y
230CFG_IMX_WDOG_EXT_RESET = y
231endif
232
233ifneq (,$(filter $(PLATFORM_FLAVOR),mx7ulpevk))
234CFG_DDR_SIZE ?= 0x40000000
235CFG_NS_ENTRY_ADDR ?= 0x60800000
236CFG_UART_BASE ?= UART4_BASE
237endif
238
239ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qpsabresd mx6qsabresd mx6dlsabresd \
240	mx6dlsabrelite mx6dhmbedge mx6dlhmbedge mx6solosabresd \
241	mx6dapalis mx6qapalis))
242CFG_DDR_SIZE ?= 0x40000000
243CFG_NS_ENTRY_ADDR ?= 0x12000000
244endif
245
246ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qpsabreauto mx6qsabreauto \
247	mx6dlsabreauto mx6solosabreauto))
248CFG_DDR_SIZE ?= 0x80000000
249CFG_NS_ENTRY_ADDR ?= 0x12000000
250CFG_UART_BASE ?= UART4_BASE
251endif
252
253ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qhmbedge))
254CFG_DDR_SIZE ?= 0x80000000
255CFG_UART_BASE ?= UART1_BASE
256endif
257
258ifneq (,$(filter $(PLATFORM_FLAVOR),mx6shmbedge))
259CFG_DDR_SIZE ?= 0x40000000
260CFG_NS_ENTRY_ADDR ?= 0x12000000
261endif
262
263ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qsabrelite mx6dlsabrelite))
264CFG_DDR_SIZE ?= 0x40000000
265CFG_NS_ENTRY_ADDR ?= 0x12000000
266CFG_UART_BASE ?= UART2_BASE
267endif
268
269ifneq (,$(filter $(PLATFORM_FLAVOR),mx6slevk))
270CFG_NS_ENTRY_ADDR ?= 0x80800000
271CFG_DDR_SIZE ?= 0x40000000
272endif
273
274ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sllevk))
275CFG_NS_ENTRY_ADDR ?= 0x80800000
276CFG_DDR_SIZE ?= 0x80000000
277endif
278
279ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sxsabreauto))
280CFG_DDR_SIZE ?= 0x80000000
281CFG_NS_ENTRY_ADDR ?= 0x80800000
282endif
283
284ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sxsabresd))
285CFG_DDR_SIZE ?= 0x40000000
286CFG_NS_ENTRY_ADDR ?= 0x80800000
287endif
288
289ifeq ($(PLATFORM_FLAVOR), mx6sxudooneofull)
290CFG_DDR_SIZE ?= 0x40000000
291CFG_UART_BASE ?= UART1_BASE
292endif
293
294ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulevk mx6ullevk mx6ulzevk))
295CFG_DDR_SIZE ?= 0x20000000
296CFG_NS_ENTRY_ADDR ?= 0x80800000
297endif
298
299ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulccimx6ulsbcpro))
300CFG_DDR_SIZE ?= 0x10000000
301CFG_NS_ENTRY_ADDR ?= 0x80800000
302CFG_UART_BASE ?= UART5_BASE
303endif
304
305ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ul9x9evk))
306CFG_DDR_SIZE ?= 0x10000000
307CFG_NS_ENTRY_ADDR ?= 0x80800000
308endif
309
310ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulccbv2))
311CFG_DDR_SIZE ?= 0x10000000
312CFG_UART_BASE ?= UART7_BASE
313endif
314
315ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mqevk))
316CFG_DDR_SIZE ?= 0xc0000000
317CFG_UART_BASE ?= UART1_BASE
318endif
319
320ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mmevk))
321CFG_DDR_SIZE ?= 0x80000000
322CFG_UART_BASE ?= UART2_BASE
323endif
324
325ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mm_cl_iot_gate))
326CFG_DDR_SIZE ?= 0x40000000
327CFG_UART_BASE ?= UART3_BASE
328CFG_NSEC_DDR_1_BASE ?= 0x80000000UL
329CFG_NSEC_DDR_1_SIZE ?= 0x40000000UL
330endif
331
332ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mnevk))
333CFG_DDR_SIZE ?= 0x80000000
334CFG_UART_BASE ?= UART2_BASE
335endif
336
337ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mpevk))
338CFG_DDR_SIZE ?= UL(0x180000000)
339CFG_UART_BASE ?= UART2_BASE
340$(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
341$(call force,CFG_CORE_ARM64_PA_BITS,36)
342endif
343
344ifneq (,$(filter $(PLATFORM_FLAVOR),mx8qxpmek mx8qmmek))
345CFG_DDR_SIZE ?= 0x80000000
346CFG_UART_BASE ?= UART0_BASE
347CFG_NSEC_DDR_1_BASE ?= 0x880000000UL
348CFG_NSEC_DDR_1_SIZE  ?= 0x380000000UL
349CFG_CORE_ARM64_PA_BITS ?= 40
350endif
351
352# i.MX6 Solo/SL/SoloX/DualLite/Dual/Quad specific config
353ifeq ($(filter y, $(CFG_MX6QP) $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S) \
354	$(CFG_MX6SL) $(CFG_MX6SLL) $(CFG_MX6SX)), y)
355include core/arch/arm/cpu/cortex-a9.mk
356
357$(call force,CFG_PL310,y)
358
359CFG_PL310_LOCKED ?= y
360CFG_ENABLE_SCTLR_RR ?= y
361CFG_SCU ?= y
362endif
363
364ifeq ($(filter y, $(CFG_MX6QP) $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S)), y)
365CFG_DRAM_BASE ?= 0x10000000
366endif
367
368ifneq (,$(filter y, $(CFG_MX6UL) $(CFG_MX6ULL) $(CFG_MX6SL) $(CFG_MX6SLL) \
369	$(CFG_MX6SX)))
370CFG_DRAM_BASE ?= 0x80000000
371endif
372
373ifeq ($(filter y, $(CFG_MX7)), y)
374CFG_INIT_CNTVOFF ?= y
375CFG_DRAM_BASE ?= 0x80000000
376endif
377
378ifeq ($(filter y, $(CFG_MX7ULP)), y)
379CFG_INIT_CNTVOFF ?= y
380CFG_DRAM_BASE ?= UL(0x60000000)
381$(call force,CFG_IMX_LPUART,y)
382$(call force,CFG_BOOT_SECONDARY_REQUEST,n)
383endif
384
385ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7) $(CFG_MX7ULP)))
386$(call force,CFG_GIC,y)
387
388CFG_BOOT_SECONDARY_REQUEST ?= y
389CFG_DT ?= y
390CFG_DTB_MAX_SIZE ?= 0x20000
391CFG_PAGEABLE_ADDR ?= 0
392CFG_PSCI_ARM32 ?= y
393CFG_SECURE_TIME_SOURCE_REE ?= y
394CFG_UART_BASE ?= UART1_BASE
395endif
396
397ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7) $(CFG_MX8MM)))
398$(call force,CFG_IMX_UART,y)
399ifeq ($(CFG_RPMB_FS),y)
400CFG_IMX_SNVS ?= y
401endif
402endif
403
404ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7)))
405CFG_CSU ?= y
406endif
407
408ifeq ($(filter y, $(CFG_PSCI_ARM32)), y)
409CFG_HWSUPP_MEM_PERM_WXN = n
410CFG_IMX_WDOG ?= y
411endif
412
413ifeq ($(CFG_ARM64_core),y)
414# arm-v8 platforms
415include core/arch/arm/cpu/cortex-armv8-0.mk
416$(call force,CFG_ARM_GICV3,y)
417$(call force,CFG_GIC,y)
418$(call force,CFG_WITH_LPAE,y)
419$(call force,CFG_WITH_ARM_TRUSTED_FW,y)
420$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
421
422CFG_CRYPTO_WITH_CE ?= y
423
424supported-ta-targets = ta_arm64
425endif
426
427CFG_TZDRAM_START ?= ($(CFG_DRAM_BASE) - 0x02000000 + $(CFG_DDR_SIZE))
428CFG_TZDRAM_SIZE ?= 0x01e00000
429CFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE))
430CFG_SHMEM_SIZE ?= 0x00200000
431
432CFG_NSEC_DDR_0_BASE ?= $(CFG_DRAM_BASE)
433CFG_NSEC_DDR_0_SIZE ?= ($(CFG_DDR_SIZE) - 0x02000000)
434
435CFG_CRYPTO_SIZE_OPTIMIZATION ?= n
436CFG_MMAP_REGIONS ?= 24
437
438# Almost all platforms include CAAM HW Modules, except the
439# ones forced to be disabled
440CFG_NXP_CAAM ?= n
441
442ifeq ($(CFG_NXP_CAAM),y)
443# As NXP CAAM Driver is enabled, disable the small local CAAM driver
444# used just to release Job Rings to Non-Secure world
445$(call force,CFG_IMX_CAAM,n)
446else
447
448ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7) $(CFG_MX7ULP)))
449CFG_IMX_CAAM ?= y
450endif
451endif
452
453# Cryptographic configuration
454include core/arch/arm/plat-imx/crypto_conf.mk
455