1 // SPDX-License-Identifier: BSD-2-Clause 2 /* 3 * Copyright (c) 2019, HiSilicon Technologies Co., Ltd. 4 */ 5 6 #include <console.h> 7 #include <drivers/gic.h> 8 #include <drivers/pl011.h> 9 #include <kernel/generic_boot.h> 10 #include <kernel/panic.h> 11 #include <kernel/pm_stubs.h> 12 #include <mm/tee_pager.h> 13 #include <mm/core_memprot.h> 14 #include <platform_config.h> 15 #include <stdint.h> 16 #include <tee/entry_std.h> 17 #include <tee/entry_fast.h> 18 19 static void main_fiq(void); 20 21 static const struct thread_handlers handlers = { 22 .std_smc = tee_entry_std, 23 .fast_smc = tee_entry_fast, 24 .nintr = main_fiq, 25 .cpu_on = pm_panic, 26 .cpu_off = pm_panic, 27 .cpu_suspend = pm_panic, 28 .cpu_resume = pm_panic, 29 .system_off = pm_panic, 30 .system_reset = pm_panic, 31 }; 32 33 static struct pl011_data console_data; 34 register_phys_mem(MEM_AREA_IO_NSEC, CONSOLE_UART_BASE, PL011_REG_SIZE); 35 #ifdef BOOTSRAM_BASE 36 register_phys_mem(MEM_AREA_IO_SEC, BOOTSRAM_BASE, BOOTSRAM_SIZE); 37 #endif 38 #ifdef CPU_CRG_BASE 39 register_phys_mem(MEM_AREA_IO_SEC, CPU_CRG_BASE, CPU_CRG_SIZE); 40 #endif 41 #ifdef SYS_CTRL_BASE 42 register_phys_mem(MEM_AREA_IO_SEC, SYS_CTRL_BASE, SYS_CTRL_SIZE); 43 #endif 44 45 const struct thread_handlers *generic_boot_get_handlers(void) 46 { 47 return &handlers; 48 } 49 50 static void main_fiq(void) 51 { 52 panic(); 53 } 54 55 void console_init(void) 56 { 57 pl011_init(&console_data, CONSOLE_UART_BASE, 58 CONSOLE_UART_CLK_IN_HZ, CONSOLE_BAUDRATE); 59 register_serial_console(&console_data.chip); 60 } 61