1 /* 2 * Copyright (c) 2016, Linaro Ltd and Contributors. All rights reserved. 3 * Copyright (c) 2016, Hisilicon Ltd and Contributors. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * 8 * Redistributions of source code must retain the above copyright notice, this 9 * list of conditions and the following disclaimer. 10 * 11 * Redistributions in binary form must reproduce the above copyright notice, 12 * this list of conditions and the following disclaimer in the documentation 13 * and/or other materials provided with the distribution. 14 * 15 * Neither the name of ARM nor the names of its contributors may be used 16 * to endorse or promote products derived from this software without specific 17 * prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #ifndef __HIKEY_PERIPHERALS_H__ 33 #define __HIKEY_PERIPHERALS_H__ 34 35 #include <types_ext.h> 36 37 #define PMUSSI_BASE 0xF8000000 38 #define PERI_BASE 0xF7030000 39 #define PMX0_BASE 0xF7010000 40 #define PMX1_BASE 0xF7010800 41 #define GPIO6_BASE 0xF7022000 42 #define SPI_BASE 0xF7106000 43 44 #define PMUSSI_REG_SIZE 0x1000 45 #define PERI_BASE_REG_SIZE 0x2000 46 #define PMX0_REG_SIZE 0x27c 47 #define PMX1_REG_SIZE 0x28c 48 49 /* register offsets */ 50 #define PMUSSI_LDO21_REG_ADJ SHIFT_U32(0x86, 2) 51 #define PMUSSI_ENA_LDO17_22 SHIFT_U32(0x2F, 2) 52 53 #define PERI_SC_PERIPH_RSTDIS3 0x334 54 #define PERI_SC_PERIPH_RSTSTAT3 0x338 55 #define PERI_SC_PERIPH_CLKEN3 0x230 56 #define PERI_SC_PERIPH_CLKSTAT3 0x238 57 58 #define PMX0_IOMG104 0x1a0 59 #define PMX0_IOMG105 0x1a4 60 #define PMX0_IOMG106 0x1a8 61 #define PMX0_IOMG107 0x1ac 62 63 #define PMX1_IOCG104 0x1b0 64 #define PMX1_IOCG105 0x1b4 65 #define PMX1_IOCG106 0x1b8 66 #define PMX1_IOCG107 0x1bc 67 /* end register offsets */ 68 69 #define PMUSSI_LDO21_REG_VL_MASK 0x7 70 #define PMUSSI_LDO21_REG_VL_1V8 0x3 71 #define PMUSSI_ENA_LDO21 BIT(4) 72 73 #define PERI_RST3_SSP BIT(9) 74 #define PERI_CLK3_SSP BIT(9) 75 76 #define PINMUX_GPIO 0 77 #define PINMUX_SPI 1 78 79 #define PINCFG_NOPULL 0 80 #define PINCFG_PULLUP 1 81 #define PINCFG_PULLDN 2 82 83 #define GPIO6_2 50 84 #define SPI_CLK_HZ 150000000 /* 150mhz */ 85 #define SPI_500_KHZ 500000 86 #define SPI_10_KHZ 10000 87 88 #ifdef CFG_SPI 89 void spi_init(void); 90 #ifdef CFG_SPI_TEST 91 void spi_test(void); 92 #endif /* CFG_SPI_TEST */ 93 #endif /* CFG_SPI */ 94 95 #endif /* __HIKEY_PERIPHERALS_H__ */ 96