xref: /optee_os/core/arch/arm/plat-d02/main.c (revision a50cb361d9e5735f197ccc87beb0d24af8315369)
1 /*
2  * Copyright (c) 2015, Linaro Limited
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions are met:
7  *
8  * 1. Redistributions of source code must retain the above copyright notice,
9  * this list of conditions and the following disclaimer.
10  *
11  * 2. Redistributions in binary form must reproduce the above copyright notice,
12  * this list of conditions and the following disclaimer in the documentation
13  * and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
16  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
19  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
20  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
21  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
22  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
24  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25  * POSSIBILITY OF SUCH DAMAGE.
26  */
27 
28 #include <console.h>
29 #include <drivers/hi16xx_uart.h>
30 #include <kernel/generic_boot.h>
31 #include <kernel/panic.h>
32 #include <kernel/pm_stubs.h>
33 #include <mm/tee_pager.h>
34 #include <mm/core_memprot.h>
35 #include <platform_config.h>
36 #include <stdint.h>
37 #include <tee/entry_std.h>
38 #include <tee/entry_fast.h>
39 
40 static void main_fiq(void);
41 
42 static const struct thread_handlers handlers = {
43 	.std_smc = tee_entry_std,
44 	.fast_smc = tee_entry_fast,
45 	.fiq = main_fiq,
46 	.cpu_on = cpu_on_handler,
47 	.cpu_off = pm_do_nothing,
48 	.cpu_suspend = pm_do_nothing,
49 	.cpu_resume = pm_do_nothing,
50 	.system_off = pm_do_nothing,
51 	.system_reset = pm_do_nothing,
52 };
53 
54 register_phys_mem(MEM_AREA_IO_NSEC, CONSOLE_UART_BASE, HI16XX_UART_REG_SIZE);
55 
56 const struct thread_handlers *generic_boot_get_handlers(void)
57 {
58 	return &handlers;
59 }
60 
61 static void main_fiq(void)
62 {
63 	panic();
64 }
65 
66 static vaddr_t console_base(void)
67 {
68 	static void *va;
69 
70 	if (cpu_mmu_enabled()) {
71 		if (!va)
72 			va = phys_to_virt(CONSOLE_UART_BASE, MEM_AREA_IO_NSEC);
73 		return (vaddr_t)va;
74 	}
75 	return CONSOLE_UART_BASE;
76 }
77 
78 void console_init(void)
79 {
80 	hi16xx_uart_init(console_base(), CONSOLE_UART_CLK_IN_HZ,
81 			 CONSOLE_BAUDRATE);
82 }
83 
84 void console_putc(int ch)
85 {
86 	vaddr_t base = console_base();
87 
88 	if (ch == '\n')
89 		hi16xx_uart_putc('\r', base);
90 	hi16xx_uart_putc(ch, base);
91 }
92 
93 void console_flush(void)
94 {
95 	hi16xx_uart_flush(console_base());
96 }
97