xref: /optee_os/core/arch/arm/kernel/unwind_arm32.c (revision 5a913ee74d3c71af2a2860ce8a4e7aeab2916f9b)
1 // SPDX-License-Identifier: BSD-2-Clause
2 /*
3  * Copyright 2015 Linaro Limited
4  * Copyright 2013-2014 Andrew Turner.
5  * Copyright 2013-2014 Ian Lepore.
6  * Copyright 2013-2014 Rui Paulo.
7  * Copyright 2013 Eitan Adler.
8  * All rights reserved.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions are
12  * met:
13  *
14  *  1. Redistributions of source code must retain the above copyright
15  *     notice, this list of conditions and the following disclaimer.
16  *  2. Redistributions in binary form must reproduce the above copyright
17  *     notice, this list of conditions and the following disclaimer in the
18  *     documentation and/or other materials provided with the distribution.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE
24  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
27  * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
28  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
29  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
30  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31  */
32 
33 #include <arm.h>
34 #include <kernel/linker.h>
35 #include <kernel/misc.h>
36 #include <kernel/tee_misc.h>
37 #include <kernel/unwind.h>
38 #include <string.h>
39 #include <tee_api_types.h>
40 #include <tee/tee_svc.h>
41 #include <trace.h>
42 #include <util.h>
43 
44 #include "unwind_private.h"
45 
46 /* The register names */
47 #define	FP	11
48 #define	SP	13
49 #define	LR	14
50 #define	PC	15
51 
52 /*
53  * Definitions for the instruction interpreter.
54  *
55  * The ARM EABI specifies how to perform the frame unwinding in the
56  * Exception Handling ABI for the ARM Architecture document. To perform
57  * the unwind we need to know the initial frame pointer, stack pointer,
58  * link register and program counter. We then find the entry within the
59  * index table that points to the function the program counter is within.
60  * This gives us either a list of three instructions to process, a 31-bit
61  * relative offset to a table of instructions, or a value telling us
62  * we can't unwind any further.
63  *
64  * When we have the instructions to process we need to decode them
65  * following table 4 in section 9.3. This describes a collection of bit
66  * patterns to encode that steps to take to update the stack pointer and
67  * link register to the correct values at the start of the function.
68  */
69 
70 /* A special case when we are unable to unwind past this function */
71 #define	EXIDX_CANTUNWIND	1
72 
73 /*
74  * Entry types.
75  * These are the only entry types that have been seen in the kernel.
76  */
77 #define	ENTRY_MASK	0xff000000
78 #define	ENTRY_ARM_SU16	0x80000000
79 #define	ENTRY_ARM_LU16	0x81000000
80 
81 /* Instruction masks. */
82 #define	INSN_VSP_MASK		0xc0
83 #define	INSN_VSP_SIZE_MASK	0x3f
84 #define	INSN_STD_MASK		0xf0
85 #define	INSN_STD_DATA_MASK	0x0f
86 #define	INSN_POP_TYPE_MASK	0x08
87 #define	INSN_POP_COUNT_MASK	0x07
88 #define	INSN_VSP_LARGE_INC_MASK	0xff
89 
90 /* Instruction definitions */
91 #define	INSN_VSP_INC		0x00
92 #define	INSN_VSP_DEC		0x40
93 #define	INSN_POP_MASKED		0x80
94 #define	INSN_VSP_REG		0x90
95 #define	INSN_POP_COUNT		0xa0
96 #define	INSN_FINISH		0xb0
97 #define	INSN_POP_REGS		0xb1
98 #define	INSN_VSP_LARGE_INC	0xb2
99 
100 /* An item in the exception index table */
101 struct unwind_idx {
102 	uint32_t offset;
103 	uint32_t insn;
104 };
105 
106 /* Expand a 31-bit signed value to a 32-bit signed value */
107 static int32_t expand_prel31(uint32_t prel31)
108 {
109 	return prel31 | SHIFT_U32(prel31 & BIT32(30), 1);
110 }
111 
112 /*
113  * Perform a binary search of the index table to find the function
114  * with the largest address that doesn't exceed addr.
115  */
116 static struct unwind_idx *find_index(uint32_t addr, vaddr_t exidx,
117 				     size_t exidx_sz)
118 {
119 	vaddr_t idx_start, idx_end;
120 	unsigned int min, mid, max;
121 	struct unwind_idx *start;
122 	struct unwind_idx *item;
123 	int32_t prel31_addr;
124 	vaddr_t func_addr;
125 
126 	start = (struct unwind_idx *)exidx;
127 	idx_start = exidx;
128 	idx_end = exidx + exidx_sz;
129 
130 	min = 0;
131 	max = (idx_end - idx_start) / sizeof(struct unwind_idx);
132 
133 	while (min != max) {
134 		mid = min + (max - min + 1) / 2;
135 
136 		item = &start[mid];
137 
138 		prel31_addr = expand_prel31(item->offset);
139 		func_addr = (vaddr_t)&item->offset + prel31_addr;
140 
141 		if (func_addr <= addr) {
142 			min = mid;
143 		} else {
144 			max = mid - 1;
145 		}
146 	}
147 
148 	return &start[min];
149 }
150 
151 /* Reads the next byte from the instruction list */
152 static bool unwind_exec_read_byte(struct unwind_state_arm32 *state,
153 				  uint32_t *ret_insn)
154 {
155 	uint32_t insn;
156 
157 	memcpy(&insn, (void *)state->insn, sizeof(insn));
158 
159 	/* Read the unwind instruction */
160 	*ret_insn = (insn >> (state->byte * 8)) & 0xff;
161 
162 	/* Update the location of the next instruction */
163 	if (state->byte == 0) {
164 		state->byte = 3;
165 		state->insn += sizeof(uint32_t);
166 		state->entries--;
167 	} else
168 		state->byte--;
169 
170 	return true;
171 }
172 
173 static bool pop_vsp(uint32_t *reg, vaddr_t *vsp,
174 		    vaddr_t stack, size_t stack_size)
175 {
176 	if (!core_is_buffer_inside(*vsp, sizeof(*reg), stack, stack_size))
177 		return false;
178 
179 	memcpy(reg, (void *)*vsp, sizeof(*reg));
180 	(*vsp) += sizeof(*reg);
181 	return true;
182 }
183 
184 /* Executes the next instruction on the list */
185 static bool unwind_exec_insn(struct unwind_state_arm32 *state,
186 			     vaddr_t stack, size_t stack_size)
187 {
188 	uint32_t insn;
189 	vaddr_t vsp = state->registers[SP];
190 	int update_vsp = 0;
191 
192 	/* Read the next instruction */
193 	if (!unwind_exec_read_byte(state, &insn))
194 		return false;
195 
196 	if ((insn & INSN_VSP_MASK) == INSN_VSP_INC) {
197 		state->registers[SP] += ((insn & INSN_VSP_SIZE_MASK) << 2) + 4;
198 
199 	} else if ((insn & INSN_VSP_MASK) == INSN_VSP_DEC) {
200 		state->registers[SP] -= ((insn & INSN_VSP_SIZE_MASK) << 2) + 4;
201 
202 	} else if ((insn & INSN_STD_MASK) == INSN_POP_MASKED) {
203 		uint32_t mask;
204 		unsigned int reg;
205 
206 		/* Load the mask */
207 		if (!unwind_exec_read_byte(state, &mask))
208 			return false;
209 		mask |= (insn & INSN_STD_DATA_MASK) << 8;
210 
211 		/* We have a refuse to unwind instruction */
212 		if (mask == 0)
213 			return false;
214 
215 		/* Update SP */
216 		update_vsp = 1;
217 
218 		/* Load the registers */
219 		for (reg = 4; mask && reg < 16; mask >>= 1, reg++) {
220 			if (mask & 1) {
221 				if (!pop_vsp(&state->registers[reg], &vsp,
222 					     stack, stack_size))
223 					return false;
224 				state->update_mask |= 1 << reg;
225 
226 				/* If we have updated SP kep its value */
227 				if (reg == SP)
228 					update_vsp = 0;
229 			}
230 		}
231 
232 	} else if ((insn & INSN_STD_MASK) == INSN_VSP_REG &&
233 	    ((insn & INSN_STD_DATA_MASK) != 13) &&
234 	    ((insn & INSN_STD_DATA_MASK) != 15)) {
235 		/* sp = register */
236 		state->registers[SP] =
237 		    state->registers[insn & INSN_STD_DATA_MASK];
238 
239 	} else if ((insn & INSN_STD_MASK) == INSN_POP_COUNT) {
240 		unsigned int count, reg;
241 
242 		/* Read how many registers to load */
243 		count = insn & INSN_POP_COUNT_MASK;
244 
245 		/* Update sp */
246 		update_vsp = 1;
247 
248 		/* Pop the registers */
249 		for (reg = 4; reg <= 4 + count; reg++) {
250 			if (!pop_vsp(&state->registers[reg], &vsp,
251 				     stack, stack_size))
252 				return false;
253 			state->update_mask |= 1 << reg;
254 		}
255 
256 		/* Check if we are in the pop r14 version */
257 		if ((insn & INSN_POP_TYPE_MASK) != 0) {
258 			if (!pop_vsp(&state->registers[14], &vsp,
259 				     stack, stack_size))
260 				return false;
261 		}
262 
263 	} else if (insn == INSN_FINISH) {
264 		/* Stop processing */
265 		state->entries = 0;
266 
267 	} else if (insn == INSN_POP_REGS) {
268 		uint32_t mask;
269 		unsigned int reg;
270 
271 		if (!unwind_exec_read_byte(state, &mask))
272 			return false;
273 		if (mask == 0 || (mask & 0xf0) != 0)
274 			return false;
275 
276 		/* Update SP */
277 		update_vsp = 1;
278 
279 		/* Load the registers */
280 		for (reg = 0; mask && reg < 4; mask >>= 1, reg++) {
281 			if (mask & 1) {
282 				if (!pop_vsp(&state->registers[reg], &vsp,
283 					     stack, stack_size))
284 					return false;
285 				state->update_mask |= 1 << reg;
286 			}
287 		}
288 
289 	} else if ((insn & INSN_VSP_LARGE_INC_MASK) == INSN_VSP_LARGE_INC) {
290 		uint32_t uleb128;
291 
292 		/* Read the increment value */
293 		if (!unwind_exec_read_byte(state, &uleb128))
294 			return false;
295 
296 		state->registers[SP] += 0x204 + (uleb128 << 2);
297 
298 	} else {
299 		/* We hit a new instruction that needs to be implemented */
300 		DMSG("Unhandled instruction %.2x", insn);
301 		return false;
302 	}
303 
304 	if (update_vsp)
305 		state->registers[SP] = vsp;
306 
307 	return true;
308 }
309 
310 /* Performs the unwind of a function */
311 static bool unwind_tab(struct unwind_state_arm32 *state,
312 		       vaddr_t stack, size_t stack_size)
313 {
314 	uint32_t entry;
315 	uint32_t insn;
316 
317 	/* Set PC to a known value */
318 	state->registers[PC] = 0;
319 
320 	memcpy(&insn, (void *)state->insn, sizeof(insn));
321 
322 	/* Read the personality */
323 	entry = insn & ENTRY_MASK;
324 
325 	if (entry == ENTRY_ARM_SU16) {
326 		state->byte = 2;
327 		state->entries = 1;
328 	} else if (entry == ENTRY_ARM_LU16) {
329 		state->byte = 1;
330 		state->entries = ((insn >> 16) & 0xFF) + 1;
331 	} else {
332 		DMSG("Unknown entry: %x", entry);
333 		return true;
334 	}
335 
336 	while (state->entries > 0) {
337 		if (!unwind_exec_insn(state, stack, stack_size))
338 			return true;
339 	}
340 
341 	/*
342 	 * The program counter was not updated, load it from the link register.
343 	 */
344 	if (state->registers[PC] == 0) {
345 		state->registers[PC] = state->registers[LR];
346 
347 		/*
348 		 * If the program counter changed, flag it in the update mask.
349 		 */
350 		if (state->start_pc != state->registers[PC])
351 			state->update_mask |= 1 << PC;
352 	}
353 
354 	return false;
355 }
356 
357 bool unwind_stack_arm32(struct unwind_state_arm32 *state, vaddr_t exidx,
358 			size_t exidx_sz, vaddr_t stack, size_t stack_size)
359 {
360 	struct unwind_idx *index;
361 	bool finished;
362 
363 	if (!exidx_sz)
364 		return false;
365 
366 	/* Reset the mask of updated registers */
367 	state->update_mask = 0;
368 
369 	/* The pc value is correct and will be overwritten, save it */
370 	state->start_pc = state->registers[PC];
371 
372 	/* Find the item to run */
373 	index = find_index(state->start_pc, exidx, exidx_sz);
374 
375 	finished = false;
376 	if (index->insn != EXIDX_CANTUNWIND) {
377 		if (index->insn & (1U << 31)) {
378 			/* The data is within the instruction */
379 			state->insn = (vaddr_t)&index->insn;
380 		} else {
381 			/* A prel31 offset to the unwind table */
382 			state->insn = (vaddr_t)&index->insn +
383 				      expand_prel31(index->insn);
384 		}
385 
386 		/* Run the unwind function */
387 		finished = unwind_tab(state, stack, stack_size);
388 	}
389 
390 	/* This is the top of the stack, finish */
391 	if (index->insn == EXIDX_CANTUNWIND)
392 		finished = true;
393 
394 	return !finished;
395 }
396 
397 static uint32_t offset_prel31(uint32_t addr, int32_t offset)
398 {
399 	return (addr + offset) & 0x7FFFFFFFUL;
400 }
401 
402 TEE_Result relocate_exidx(void *exidx, size_t exidx_sz, int32_t offset)
403 {
404 	size_t num_items = exidx_sz / sizeof(struct unwind_idx);
405 	struct unwind_idx *start = (struct unwind_idx *)exidx;
406 	size_t n;
407 
408 	for (n = 0; n < num_items; n++) {
409 		struct unwind_idx *item = &start[n];
410 
411 		if (item->offset & BIT32(31))
412 			return TEE_ERROR_BAD_FORMAT;
413 
414 		/* Offset to the start of the function has to be adjusted */
415 		item->offset = offset_prel31(item->offset, offset);
416 
417 		if (item->insn == EXIDX_CANTUNWIND)
418 			continue;
419 		if (item->insn & BIT32(31)) {
420 			/* insn is a table entry itself */
421 			continue;
422 		}
423 		/*
424 		 * insn is an offset to an entry in .ARM.extab so it has to be
425 		 * adjusted
426 		 */
427 		item->insn = offset_prel31(item->insn, offset);
428 	}
429 	return TEE_SUCCESS;
430 }
431 
432 #if (TRACE_LEVEL > 0)
433 
434 void print_stack_arm32(int level, struct unwind_state_arm32 *state,
435 		       vaddr_t exidx, size_t exidx_sz,
436 		       vaddr_t stack, size_t stack_size)
437 {
438 	trace_printf_helper_raw(level, true, "Call stack:");
439 	do {
440 		trace_printf_helper_raw(level, true, " 0x%08" PRIx32,
441 					state->registers[PC]);
442 	} while (unwind_stack_arm32(state, exidx, exidx_sz, stack, stack_size));
443 }
444 
445 #endif
446 
447 #if defined(ARM32) && (TRACE_LEVEL > 0)
448 
449 void print_kernel_stack(int level)
450 {
451 	struct unwind_state_arm32 state;
452 	uaddr_t exidx = (vaddr_t)__exidx_start;
453 	size_t exidx_sz = (vaddr_t)__exidx_end - (vaddr_t)__exidx_start;
454 	vaddr_t stack = thread_stack_start();
455 	size_t stack_size = thread_stack_size();
456 
457 	memset(&state, 0, sizeof(state));
458 	/* r7: Thumb-style frame pointer */
459 	state.registers[7] = read_r7();
460 	/* r11: ARM-style frame pointer */
461 	state.registers[FP] = read_fp();
462 	state.registers[SP] = read_sp();
463 	state.registers[LR] = read_lr();
464 	state.registers[PC] = (uint32_t)print_kernel_stack;
465 
466 	print_stack_arm32(level, &state, exidx, exidx_sz, stack, stack_size);
467 }
468 
469 #endif
470 
471 #if defined(ARM32)
472 vaddr_t *unw_get_kernel_stack(void)
473 {
474 	size_t n = 0;
475 	size_t size = 0;
476 	size_t exidx_sz = 0;
477 	vaddr_t *tmp = NULL;
478 	vaddr_t *addr = NULL;
479 	struct unwind_state_arm32 state = { };
480 	uaddr_t exidx = (vaddr_t)__exidx_start;
481 	vaddr_t stack = thread_stack_start();
482 	size_t stack_size = thread_stack_size();
483 
484 	if (SUB_OVERFLOW((vaddr_t)__exidx_end, (vaddr_t)__exidx_start,
485 			 &exidx_sz))
486 		return NULL;
487 
488 	/* r7: Thumb-style frame pointer */
489 	state.registers[7] = read_r7();
490 	/* r11: ARM-style frame pointer */
491 	state.registers[FP] = read_fp();
492 	state.registers[SP] = read_sp();
493 	state.registers[LR] = read_lr();
494 	state.registers[PC] = (uint32_t)unw_get_kernel_stack;
495 
496 	while (unwind_stack_arm32(&state, exidx, exidx_sz, stack, stack_size)) {
497 		tmp = unw_grow(addr, &size, (n + 1) * sizeof(vaddr_t));
498 		if (!tmp)
499 			goto err;
500 		addr = tmp;
501 		addr[n] = state.registers[PC];
502 		n++;
503 	}
504 
505 	if (addr) {
506 		tmp = unw_grow(addr, &size, (n + 1) * sizeof(vaddr_t));
507 		if (!tmp)
508 			goto err;
509 		addr = tmp;
510 		addr[n] = 0;
511 	}
512 
513 	return addr;
514 err:
515 	EMSG("Out of memory");
516 	free(addr);
517 	return NULL;
518 }
519 #endif
520