1 // SPDX-License-Identifier: BSD-2-Clause 2 /* 3 * Copyright (c) 2020-2021, Linaro Limited. 4 * Copyright (c) 2019-2021, Arm Limited. All rights reserved. 5 */ 6 7 #include <assert.h> 8 #include <ffa.h> 9 #include <io.h> 10 #include <initcall.h> 11 #include <kernel/interrupt.h> 12 #include <kernel/panic.h> 13 #include <kernel/secure_partition.h> 14 #include <kernel/spinlock.h> 15 #include <kernel/spmc_sp_handler.h> 16 #include <kernel/tee_misc.h> 17 #include <kernel/thread.h> 18 #include <kernel/thread_spmc.h> 19 #include <mm/core_mmu.h> 20 #include <mm/mobj.h> 21 #include <optee_ffa.h> 22 #include <optee_msg.h> 23 #include <optee_rpc_cmd.h> 24 #include <string.h> 25 #include <sys/queue.h> 26 #include <tee/entry_std.h> 27 #include <tee/uuid.h> 28 #include <util.h> 29 30 #include "thread_private.h" 31 32 #if defined(CFG_CORE_SEL1_SPMC) 33 struct mem_share_state { 34 struct mobj_ffa *mf; 35 unsigned int page_count; 36 unsigned int region_count; 37 unsigned int current_page_idx; 38 }; 39 40 struct mem_frag_state { 41 struct mem_share_state share; 42 tee_mm_entry_t *mm; 43 unsigned int frag_offset; 44 SLIST_ENTRY(mem_frag_state) link; 45 }; 46 #endif 47 48 /* Initialized in spmc_init() below */ 49 static uint16_t my_endpoint_id; 50 51 /* 52 * If struct ffa_rxtx::size is 0 RX/TX buffers are not mapped or initialized. 53 * 54 * struct ffa_rxtx::spin_lock protects the variables below from concurrent 55 * access this includes the use of content of struct ffa_rxtx::rx and 56 * @frag_state_head. 57 * 58 * struct ffa_rxtx::tx_buf_is_mine is true when we may write to struct 59 * ffa_rxtx::tx and false when it is owned by normal world. 60 * 61 * Note that we can't prevent normal world from updating the content of 62 * these buffers so we must always be careful when reading. while we hold 63 * the lock. 64 */ 65 66 #ifdef CFG_CORE_SEL2_SPMC 67 static uint8_t __rx_buf[SMALL_PAGE_SIZE] __aligned(SMALL_PAGE_SIZE); 68 static uint8_t __tx_buf[SMALL_PAGE_SIZE] __aligned(SMALL_PAGE_SIZE); 69 static struct ffa_rxtx nw_rxtx = { .rx = __rx_buf, .tx = __tx_buf }; 70 #else 71 static struct ffa_rxtx nw_rxtx; 72 73 static bool is_nw_buf(struct ffa_rxtx *rxtx) 74 { 75 return rxtx == &nw_rxtx; 76 } 77 78 static SLIST_HEAD(mem_frag_state_head, mem_frag_state) frag_state_head = 79 SLIST_HEAD_INITIALIZER(&frag_state_head); 80 #endif 81 82 static uint32_t swap_src_dst(uint32_t src_dst) 83 { 84 return (src_dst >> 16) | (src_dst << 16); 85 } 86 87 void spmc_set_args(struct thread_smc_args *args, uint32_t fid, uint32_t src_dst, 88 uint32_t w2, uint32_t w3, uint32_t w4, uint32_t w5) 89 { 90 *args = (struct thread_smc_args){ .a0 = fid, 91 .a1 = src_dst, 92 .a2 = w2, 93 .a3 = w3, 94 .a4 = w4, 95 .a5 = w5, }; 96 } 97 98 #if defined(CFG_CORE_SEL1_SPMC) 99 void spmc_handle_version(struct thread_smc_args *args) 100 { 101 /* 102 * We currently only support one version, 1.0 so let's keep it 103 * simple. 104 */ 105 spmc_set_args(args, 106 MAKE_FFA_VERSION(FFA_VERSION_MAJOR, FFA_VERSION_MINOR), 107 FFA_PARAM_MBZ, FFA_PARAM_MBZ, FFA_PARAM_MBZ, 108 FFA_PARAM_MBZ, FFA_PARAM_MBZ); 109 } 110 111 static void handle_features(struct thread_smc_args *args) 112 { 113 uint32_t ret_fid = 0; 114 uint32_t ret_w2 = FFA_PARAM_MBZ; 115 116 switch (args->a1) { 117 #ifdef ARM64 118 case FFA_RXTX_MAP_64: 119 #endif 120 case FFA_RXTX_MAP_32: 121 ret_fid = FFA_SUCCESS_32; 122 ret_w2 = 0; /* 4kB Minimum buffer size and alignment boundary */ 123 break; 124 #ifdef ARM64 125 case FFA_MEM_SHARE_64: 126 #endif 127 case FFA_MEM_SHARE_32: 128 ret_fid = FFA_SUCCESS_32; 129 /* 130 * Partition manager supports transmission of a memory 131 * transaction descriptor in a buffer dynamically allocated 132 * by the endpoint. 133 */ 134 ret_w2 = BIT(0); 135 break; 136 137 case FFA_ERROR: 138 case FFA_VERSION: 139 case FFA_SUCCESS_32: 140 #ifdef ARM64 141 case FFA_SUCCESS_64: 142 #endif 143 case FFA_MEM_FRAG_TX: 144 case FFA_MEM_RECLAIM: 145 case FFA_MSG_SEND_DIRECT_REQ_32: 146 case FFA_INTERRUPT: 147 case FFA_PARTITION_INFO_GET: 148 case FFA_RX_RELEASE: 149 ret_fid = FFA_SUCCESS_32; 150 break; 151 default: 152 ret_fid = FFA_ERROR; 153 ret_w2 = FFA_NOT_SUPPORTED; 154 break; 155 } 156 157 spmc_set_args(args, ret_fid, FFA_PARAM_MBZ, ret_w2, FFA_PARAM_MBZ, 158 FFA_PARAM_MBZ, FFA_PARAM_MBZ); 159 } 160 161 static int map_buf(paddr_t pa, unsigned int sz, void **va_ret) 162 { 163 tee_mm_entry_t *mm = NULL; 164 165 if (!core_pbuf_is(CORE_MEM_NON_SEC, pa, sz)) 166 return FFA_INVALID_PARAMETERS; 167 168 mm = tee_mm_alloc(&tee_mm_shm, sz); 169 if (!mm) 170 return FFA_NO_MEMORY; 171 172 if (core_mmu_map_contiguous_pages(tee_mm_get_smem(mm), pa, 173 sz / SMALL_PAGE_SIZE, 174 MEM_AREA_NSEC_SHM)) { 175 tee_mm_free(mm); 176 return FFA_INVALID_PARAMETERS; 177 } 178 179 *va_ret = (void *)tee_mm_get_smem(mm); 180 return 0; 181 } 182 183 static void unmap_buf(void *va, size_t sz) 184 { 185 tee_mm_entry_t *mm = tee_mm_find(&tee_mm_shm, (vaddr_t)va); 186 187 assert(mm); 188 core_mmu_unmap_pages(tee_mm_get_smem(mm), sz / SMALL_PAGE_SIZE); 189 tee_mm_free(mm); 190 } 191 192 void spmc_handle_rxtx_map(struct thread_smc_args *args, struct ffa_rxtx *rxtx) 193 { 194 int rc = 0; 195 uint32_t ret_fid = FFA_ERROR; 196 unsigned int sz = 0; 197 paddr_t rx_pa = 0; 198 paddr_t tx_pa = 0; 199 void *rx = NULL; 200 void *tx = NULL; 201 202 cpu_spin_lock(&rxtx->spinlock); 203 204 if (args->a3 & GENMASK_64(63, 6)) { 205 rc = FFA_INVALID_PARAMETERS; 206 goto out; 207 } 208 209 sz = args->a3 * SMALL_PAGE_SIZE; 210 if (!sz) { 211 rc = FFA_INVALID_PARAMETERS; 212 goto out; 213 } 214 /* TX/RX are swapped compared to the caller */ 215 tx_pa = args->a2; 216 rx_pa = args->a1; 217 218 if (rxtx->size) { 219 rc = FFA_DENIED; 220 goto out; 221 } 222 223 /* 224 * If the buffer comes from a SP the address is virtual and already 225 * mapped. 226 */ 227 if (is_nw_buf(rxtx)) { 228 rc = map_buf(tx_pa, sz, &tx); 229 if (rc) 230 goto out; 231 rc = map_buf(rx_pa, sz, &rx); 232 if (rc) { 233 unmap_buf(tx, sz); 234 goto out; 235 } 236 rxtx->tx = tx; 237 rxtx->rx = rx; 238 } else { 239 if ((tx_pa & SMALL_PAGE_MASK) || (rx_pa & SMALL_PAGE_MASK)) { 240 rc = FFA_INVALID_PARAMETERS; 241 goto out; 242 } 243 244 if (!virt_to_phys((void *)tx_pa) || 245 !virt_to_phys((void *)rx_pa)) { 246 rc = FFA_INVALID_PARAMETERS; 247 goto out; 248 } 249 250 rxtx->tx = (void *)tx_pa; 251 rxtx->rx = (void *)rx_pa; 252 } 253 254 rxtx->size = sz; 255 rxtx->tx_is_mine = true; 256 ret_fid = FFA_SUCCESS_32; 257 DMSG("Mapped tx %#"PRIxPA" size %#x @ %p", tx_pa, sz, tx); 258 DMSG("Mapped rx %#"PRIxPA" size %#x @ %p", rx_pa, sz, rx); 259 out: 260 cpu_spin_unlock(&rxtx->spinlock); 261 spmc_set_args(args, ret_fid, FFA_PARAM_MBZ, rc, FFA_PARAM_MBZ, 262 FFA_PARAM_MBZ, FFA_PARAM_MBZ); 263 } 264 265 void spmc_handle_rxtx_unmap(struct thread_smc_args *args, struct ffa_rxtx *rxtx) 266 { 267 uint32_t ret_fid = FFA_ERROR; 268 int rc = FFA_INVALID_PARAMETERS; 269 270 cpu_spin_lock(&rxtx->spinlock); 271 272 if (!rxtx->size) 273 goto out; 274 275 /* We don't unmap the SP memory as the SP might still use it */ 276 if (is_nw_buf(rxtx)) { 277 unmap_buf(rxtx->rx, rxtx->size); 278 unmap_buf(rxtx->tx, rxtx->size); 279 } 280 rxtx->size = 0; 281 rxtx->rx = NULL; 282 rxtx->tx = NULL; 283 ret_fid = FFA_SUCCESS_32; 284 rc = 0; 285 out: 286 cpu_spin_unlock(&rxtx->spinlock); 287 spmc_set_args(args, ret_fid, FFA_PARAM_MBZ, rc, FFA_PARAM_MBZ, 288 FFA_PARAM_MBZ, FFA_PARAM_MBZ); 289 } 290 291 void spmc_handle_rx_release(struct thread_smc_args *args, struct ffa_rxtx *rxtx) 292 { 293 uint32_t ret_fid = 0; 294 int rc = 0; 295 296 cpu_spin_lock(&rxtx->spinlock); 297 /* The senders RX is our TX */ 298 if (!rxtx->size || rxtx->tx_is_mine) { 299 ret_fid = FFA_ERROR; 300 rc = FFA_DENIED; 301 } else { 302 ret_fid = FFA_SUCCESS_32; 303 rc = 0; 304 rxtx->tx_is_mine = true; 305 } 306 cpu_spin_unlock(&rxtx->spinlock); 307 308 spmc_set_args(args, ret_fid, FFA_PARAM_MBZ, rc, FFA_PARAM_MBZ, 309 FFA_PARAM_MBZ, FFA_PARAM_MBZ); 310 } 311 312 static bool is_nil_uuid(uint32_t w0, uint32_t w1, uint32_t w2, uint32_t w3) 313 { 314 return !w0 && !w1 && !w2 && !w3; 315 } 316 317 static bool is_my_uuid(uint32_t w0, uint32_t w1, uint32_t w2, uint32_t w3) 318 { 319 /* 320 * This depends on which UUID we have been assigned. 321 * TODO add a generic mechanism to obtain our UUID. 322 * 323 * The test below is for the hard coded UUID 324 * 486178e0-e7f8-11e3-bc5e-0002a5d5c51b 325 */ 326 return w0 == 0xe0786148 && w1 == 0xe311f8e7 && 327 w2 == 0x02005ebc && w3 == 0x1bc5d5a5; 328 } 329 330 void spmc_fill_partition_entry(struct ffa_partition_info *fpi, 331 uint16_t endpoint_id, uint16_t execution_context) 332 { 333 fpi->id = endpoint_id; 334 /* Number of execution contexts implemented by this partition */ 335 fpi->execution_context = execution_context; 336 337 fpi->partition_properties = FFA_PARTITION_DIRECT_REQ_RECV_SUPPORT | 338 FFA_PARTITION_DIRECT_REQ_SEND_SUPPORT; 339 } 340 341 static uint32_t handle_partition_info_get_all(size_t *elem_count, 342 struct ffa_rxtx *rxtx) 343 { 344 struct ffa_partition_info *fpi = rxtx->tx; 345 346 /* Add OP-TEE SP */ 347 spmc_fill_partition_entry(fpi, my_endpoint_id, CFG_TEE_CORE_NB_CORE); 348 rxtx->tx_is_mine = false; 349 *elem_count = 1; 350 fpi++; 351 352 if (IS_ENABLED(CFG_SECURE_PARTITION)) { 353 size_t count = (rxtx->size / sizeof(*fpi)) - 1; 354 355 if (sp_partition_info_get_all(fpi, &count)) 356 return FFA_NO_MEMORY; 357 *elem_count += count; 358 } 359 360 return FFA_OK; 361 } 362 363 void spmc_handle_partition_info_get(struct thread_smc_args *args, 364 struct ffa_rxtx *rxtx) 365 { 366 uint32_t ret_fid = FFA_ERROR; 367 uint32_t rc = 0; 368 uint32_t endpoint_id = my_endpoint_id; 369 struct ffa_partition_info *fpi = NULL; 370 371 cpu_spin_lock(&rxtx->spinlock); 372 373 if (!rxtx->size || !rxtx->tx_is_mine) { 374 if (rxtx->size) 375 rc = FFA_BUSY; 376 else 377 rc = FFA_DENIED; /* TX buffer not setup yet */ 378 goto out; 379 } 380 381 fpi = rxtx->tx; 382 383 if (rxtx->size < sizeof(*fpi)) { 384 ret_fid = FFA_ERROR; 385 rc = FFA_NO_MEMORY; 386 goto out; 387 } 388 389 if (is_nil_uuid(args->a1, args->a2, args->a3, args->a4)) { 390 size_t elem_count = 0; 391 392 ret_fid = handle_partition_info_get_all(&elem_count, rxtx); 393 394 if (ret_fid) { 395 rc = ret_fid; 396 ret_fid = FFA_ERROR; 397 } else { 398 ret_fid = FFA_SUCCESS_32; 399 rc = elem_count; 400 } 401 402 goto out; 403 } 404 405 if (is_my_uuid(args->a1, args->a2, args->a3, args->a4)) { 406 spmc_fill_partition_entry(fpi, endpoint_id, 407 CFG_TEE_CORE_NB_CORE); 408 } else if (IS_ENABLED(CFG_SECURE_PARTITION)) { 409 uint32_t uuid_array[4] = { 0 }; 410 TEE_UUID uuid = { }; 411 TEE_Result res = TEE_SUCCESS; 412 413 uuid_array[0] = args->a1; 414 uuid_array[1] = args->a2; 415 uuid_array[2] = args->a3; 416 uuid_array[3] = args->a4; 417 tee_uuid_from_octets(&uuid, (uint8_t *)uuid_array); 418 419 res = sp_find_session_id(&uuid, &endpoint_id); 420 if (res != TEE_SUCCESS) { 421 ret_fid = FFA_ERROR; 422 rc = FFA_INVALID_PARAMETERS; 423 goto out; 424 } 425 spmc_fill_partition_entry(fpi, endpoint_id, 1); 426 } else { 427 ret_fid = FFA_ERROR; 428 rc = FFA_INVALID_PARAMETERS; 429 goto out; 430 } 431 432 ret_fid = FFA_SUCCESS_32; 433 rxtx->tx_is_mine = false; 434 rc = 1; 435 436 out: 437 spmc_set_args(args, ret_fid, FFA_PARAM_MBZ, rc, FFA_PARAM_MBZ, 438 FFA_PARAM_MBZ, FFA_PARAM_MBZ); 439 cpu_spin_unlock(&rxtx->spinlock); 440 } 441 #endif /*CFG_CORE_SEL1_SPMC*/ 442 443 static void handle_yielding_call(struct thread_smc_args *args) 444 { 445 TEE_Result res = 0; 446 447 thread_check_canaries(); 448 449 if (args->a3 == OPTEE_FFA_YIELDING_CALL_RESUME) { 450 /* Note connection to struct thread_rpc_arg::ret */ 451 thread_resume_from_rpc(args->a7, args->a4, args->a5, args->a6, 452 0); 453 res = TEE_ERROR_BAD_PARAMETERS; 454 } else { 455 thread_alloc_and_run(args->a1, args->a3, args->a4, args->a5, 456 args->a6, args->a7); 457 res = TEE_ERROR_BUSY; 458 } 459 spmc_set_args(args, FFA_MSG_SEND_DIRECT_RESP_32, 460 swap_src_dst(args->a1), 0, res, 0, 0); 461 } 462 463 static uint32_t handle_unregister_shm(uint32_t a4, uint32_t a5) 464 { 465 uint64_t cookie = reg_pair_to_64(a5, a4); 466 uint32_t res = 0; 467 468 res = mobj_ffa_unregister_by_cookie(cookie); 469 switch (res) { 470 case TEE_SUCCESS: 471 case TEE_ERROR_ITEM_NOT_FOUND: 472 return 0; 473 case TEE_ERROR_BUSY: 474 EMSG("res %#"PRIx32, res); 475 return FFA_BUSY; 476 default: 477 EMSG("res %#"PRIx32, res); 478 return FFA_INVALID_PARAMETERS; 479 } 480 } 481 482 static void handle_blocking_call(struct thread_smc_args *args) 483 { 484 switch (args->a3) { 485 case OPTEE_FFA_GET_API_VERSION: 486 spmc_set_args(args, FFA_MSG_SEND_DIRECT_RESP_32, 487 swap_src_dst(args->a1), 0, 488 OPTEE_FFA_VERSION_MAJOR, OPTEE_FFA_VERSION_MINOR, 489 0); 490 break; 491 case OPTEE_FFA_GET_OS_VERSION: 492 spmc_set_args(args, FFA_MSG_SEND_DIRECT_RESP_32, 493 swap_src_dst(args->a1), 0, 494 CFG_OPTEE_REVISION_MAJOR, 495 CFG_OPTEE_REVISION_MINOR, TEE_IMPL_GIT_SHA1); 496 break; 497 case OPTEE_FFA_EXCHANGE_CAPABILITIES: 498 spmc_set_args(args, FFA_MSG_SEND_DIRECT_RESP_32, 499 swap_src_dst(args->a1), 0, 0, 500 THREAD_RPC_MAX_NUM_PARAMS, 0); 501 break; 502 case OPTEE_FFA_UNREGISTER_SHM: 503 spmc_set_args(args, FFA_MSG_SEND_DIRECT_RESP_32, 504 swap_src_dst(args->a1), 0, 505 handle_unregister_shm(args->a4, args->a5), 0, 0); 506 break; 507 default: 508 EMSG("Unhandled blocking service ID %#"PRIx32, 509 (uint32_t)args->a3); 510 panic(); 511 } 512 } 513 514 #if defined(CFG_CORE_SEL1_SPMC) 515 static int get_acc_perms(struct ffa_mem_access *mem_acc, 516 unsigned int num_mem_accs, uint8_t *acc_perms, 517 unsigned int *region_offs) 518 { 519 unsigned int n = 0; 520 521 for (n = 0; n < num_mem_accs; n++) { 522 struct ffa_mem_access_perm *descr = &mem_acc[n].access_perm; 523 524 if (READ_ONCE(descr->endpoint_id) == my_endpoint_id) { 525 *acc_perms = READ_ONCE(descr->perm); 526 *region_offs = READ_ONCE(mem_acc[n].region_offs); 527 return 0; 528 } 529 } 530 531 return FFA_INVALID_PARAMETERS; 532 } 533 534 static int mem_share_init(void *buf, size_t blen, unsigned int *page_count, 535 unsigned int *region_count, size_t *addr_range_offs) 536 { 537 const uint8_t exp_mem_reg_attr = FFA_NORMAL_MEM_REG_ATTR; 538 const uint8_t exp_mem_acc_perm = FFA_MEM_ACC_RW; 539 struct ffa_mem_region *region_descr = NULL; 540 struct ffa_mem_transaction *descr = NULL; 541 unsigned int num_mem_accs = 0; 542 uint8_t mem_acc_perm = 0; 543 unsigned int region_descr_offs = 0; 544 size_t n = 0; 545 546 if (!IS_ALIGNED_WITH_TYPE(buf, struct ffa_mem_transaction) || 547 blen < sizeof(struct ffa_mem_transaction)) 548 return FFA_INVALID_PARAMETERS; 549 550 descr = buf; 551 552 /* Check that the endpoint memory access descriptor array fits */ 553 num_mem_accs = READ_ONCE(descr->mem_access_count); 554 if (MUL_OVERFLOW(sizeof(struct ffa_mem_access), num_mem_accs, &n) || 555 ADD_OVERFLOW(sizeof(*descr), n, &n) || n > blen) 556 return FFA_INVALID_PARAMETERS; 557 558 if (READ_ONCE(descr->mem_reg_attr) != exp_mem_reg_attr) 559 return FFA_INVALID_PARAMETERS; 560 561 /* Check that the access permissions matches what's expected */ 562 if (get_acc_perms(descr->mem_access_array, 563 num_mem_accs, &mem_acc_perm, ®ion_descr_offs) || 564 mem_acc_perm != exp_mem_acc_perm) 565 return FFA_INVALID_PARAMETERS; 566 567 /* Check that the Composite memory region descriptor fits */ 568 if (ADD_OVERFLOW(region_descr_offs, sizeof(*region_descr), &n) || 569 n > blen) 570 return FFA_INVALID_PARAMETERS; 571 572 if (!IS_ALIGNED_WITH_TYPE((vaddr_t)descr + region_descr_offs, 573 struct ffa_mem_region)) 574 return FFA_INVALID_PARAMETERS; 575 576 region_descr = (struct ffa_mem_region *)((vaddr_t)descr + 577 region_descr_offs); 578 *page_count = READ_ONCE(region_descr->total_page_count); 579 *region_count = READ_ONCE(region_descr->address_range_count); 580 *addr_range_offs = n; 581 return 0; 582 } 583 584 static int add_mem_share_helper(struct mem_share_state *s, void *buf, 585 size_t flen) 586 { 587 unsigned int region_count = flen / sizeof(struct ffa_address_range); 588 struct ffa_address_range *arange = NULL; 589 unsigned int n = 0; 590 591 if (region_count > s->region_count) 592 region_count = s->region_count; 593 594 if (!IS_ALIGNED_WITH_TYPE(buf, struct ffa_address_range)) 595 return FFA_INVALID_PARAMETERS; 596 arange = buf; 597 598 for (n = 0; n < region_count; n++) { 599 unsigned int page_count = READ_ONCE(arange[n].page_count); 600 uint64_t addr = READ_ONCE(arange[n].address); 601 602 if (mobj_ffa_add_pages_at(s->mf, &s->current_page_idx, 603 addr, page_count)) 604 return FFA_INVALID_PARAMETERS; 605 } 606 607 s->region_count -= region_count; 608 if (s->region_count) 609 return region_count * sizeof(*arange); 610 611 if (s->current_page_idx != s->page_count) 612 return FFA_INVALID_PARAMETERS; 613 614 return 0; 615 } 616 617 static int add_mem_share_frag(struct mem_frag_state *s, void *buf, size_t flen) 618 { 619 int rc = 0; 620 621 rc = add_mem_share_helper(&s->share, buf, flen); 622 if (rc >= 0) { 623 if (!ADD_OVERFLOW(s->frag_offset, rc, &s->frag_offset)) { 624 if (s->share.region_count) 625 return s->frag_offset; 626 /* We're done, return the number of consumed bytes */ 627 rc = s->frag_offset; 628 } else { 629 rc = FFA_INVALID_PARAMETERS; 630 } 631 } 632 633 SLIST_REMOVE(&frag_state_head, s, mem_frag_state, link); 634 if (rc < 0) 635 mobj_ffa_sel1_spmc_delete(s->share.mf); 636 else 637 mobj_ffa_push_to_inactive(s->share.mf); 638 free(s); 639 640 return rc; 641 } 642 643 static int add_mem_share(tee_mm_entry_t *mm, void *buf, size_t blen, 644 size_t flen, uint64_t *global_handle) 645 { 646 int rc = 0; 647 struct mem_share_state share = { }; 648 size_t addr_range_offs = 0; 649 size_t n = 0; 650 651 if (flen > blen) 652 return FFA_INVALID_PARAMETERS; 653 654 rc = mem_share_init(buf, flen, &share.page_count, &share.region_count, 655 &addr_range_offs); 656 if (rc) 657 return rc; 658 659 if (MUL_OVERFLOW(share.region_count, 660 sizeof(struct ffa_address_range), &n) || 661 ADD_OVERFLOW(n, addr_range_offs, &n) || n > blen) 662 return FFA_INVALID_PARAMETERS; 663 664 share.mf = mobj_ffa_sel1_spmc_new(share.page_count); 665 if (!share.mf) 666 return FFA_NO_MEMORY; 667 668 if (flen != blen) { 669 struct mem_frag_state *s = calloc(sizeof(*s), 1); 670 671 if (!s) { 672 rc = FFA_NO_MEMORY; 673 goto err; 674 } 675 s->share = share; 676 s->mm = mm; 677 s->frag_offset = addr_range_offs; 678 679 SLIST_INSERT_HEAD(&frag_state_head, s, link); 680 rc = add_mem_share_frag(s, (char *)buf + addr_range_offs, 681 flen - addr_range_offs); 682 683 if (rc >= 0) 684 *global_handle = mobj_ffa_get_cookie(share.mf); 685 686 return rc; 687 } 688 689 rc = add_mem_share_helper(&share, (char *)buf + addr_range_offs, 690 flen - addr_range_offs); 691 if (rc) { 692 /* 693 * Number of consumed bytes may be returned instead of 0 for 694 * done. 695 */ 696 rc = FFA_INVALID_PARAMETERS; 697 goto err; 698 } 699 700 *global_handle = mobj_ffa_push_to_inactive(share.mf); 701 702 return 0; 703 err: 704 mobj_ffa_sel1_spmc_delete(share.mf); 705 return rc; 706 } 707 708 static int handle_mem_share_tmem(paddr_t pbuf, size_t blen, size_t flen, 709 unsigned int page_count, 710 uint64_t *global_handle, struct ffa_rxtx *rxtx) 711 { 712 int rc = 0; 713 size_t len = 0; 714 tee_mm_entry_t *mm = NULL; 715 vaddr_t offs = pbuf & SMALL_PAGE_MASK; 716 717 if (MUL_OVERFLOW(page_count, SMALL_PAGE_SIZE, &len)) 718 return FFA_INVALID_PARAMETERS; 719 if (!core_pbuf_is(CORE_MEM_NON_SEC, pbuf, len)) 720 return FFA_INVALID_PARAMETERS; 721 722 /* 723 * Check that the length reported in blen is covered by len even 724 * if the offset is taken into account. 725 */ 726 if (len < blen || len - offs < blen) 727 return FFA_INVALID_PARAMETERS; 728 729 mm = tee_mm_alloc(&tee_mm_shm, len); 730 if (!mm) 731 return FFA_NO_MEMORY; 732 733 if (core_mmu_map_contiguous_pages(tee_mm_get_smem(mm), pbuf, 734 page_count, MEM_AREA_NSEC_SHM)) { 735 rc = FFA_INVALID_PARAMETERS; 736 goto out; 737 } 738 739 cpu_spin_lock(&rxtx->spinlock); 740 rc = add_mem_share(mm, (void *)(tee_mm_get_smem(mm) + offs), blen, flen, 741 global_handle); 742 cpu_spin_unlock(&rxtx->spinlock); 743 if (rc > 0) 744 return rc; 745 746 core_mmu_unmap_pages(tee_mm_get_smem(mm), page_count); 747 out: 748 tee_mm_free(mm); 749 return rc; 750 } 751 752 static int handle_mem_share_rxbuf(size_t blen, size_t flen, 753 uint64_t *global_handle, 754 struct ffa_rxtx *rxtx) 755 { 756 int rc = FFA_DENIED; 757 758 cpu_spin_lock(&rxtx->spinlock); 759 760 if (rxtx->rx && flen <= rxtx->size) 761 rc = add_mem_share(NULL, rxtx->rx, blen, flen, global_handle); 762 763 cpu_spin_unlock(&rxtx->spinlock); 764 765 return rc; 766 } 767 768 static void handle_mem_share(struct thread_smc_args *args, 769 struct ffa_rxtx *rxtx) 770 { 771 uint32_t ret_w1 = 0; 772 uint32_t ret_w2 = FFA_INVALID_PARAMETERS; 773 uint32_t ret_w3 = 0; 774 uint32_t ret_fid = FFA_ERROR; 775 uint64_t global_handle = 0; 776 int rc = 0; 777 778 /* Check that the MBZs are indeed 0 */ 779 if (args->a5 || args->a6 || args->a7) 780 goto out; 781 782 if (!args->a3) { 783 /* 784 * The memory transaction descriptor is passed via our rx 785 * buffer. 786 */ 787 if (args->a4) 788 goto out; 789 rc = handle_mem_share_rxbuf(args->a1, args->a2, &global_handle, 790 rxtx); 791 } else { 792 rc = handle_mem_share_tmem(args->a3, args->a1, args->a2, 793 args->a4, &global_handle, rxtx); 794 } 795 if (rc < 0) { 796 ret_w2 = rc; 797 goto out; 798 } 799 if (rc > 0) { 800 ret_fid = FFA_MEM_FRAG_RX; 801 ret_w3 = rc; 802 reg_pair_from_64(global_handle, &ret_w2, &ret_w1); 803 } 804 ret_fid = FFA_SUCCESS_32; 805 reg_pair_from_64(global_handle, &ret_w3, &ret_w2); 806 out: 807 spmc_set_args(args, ret_fid, ret_w1, ret_w2, ret_w3, 0, 0); 808 } 809 810 static struct mem_frag_state *get_frag_state(uint64_t global_handle) 811 { 812 struct mem_frag_state *s = NULL; 813 814 SLIST_FOREACH(s, &frag_state_head, link) 815 if (mobj_ffa_get_cookie(s->share.mf) == global_handle) 816 return s; 817 818 return NULL; 819 } 820 821 static void handle_mem_frag_tx(struct thread_smc_args *args, 822 struct ffa_rxtx *rxtx) 823 { 824 int rc = 0; 825 uint64_t global_handle = reg_pair_to_64(READ_ONCE(args->a2), 826 READ_ONCE(args->a1)); 827 size_t flen = READ_ONCE(args->a3); 828 struct mem_frag_state *s = NULL; 829 tee_mm_entry_t *mm = NULL; 830 unsigned int page_count = 0; 831 void *buf = NULL; 832 uint32_t ret_w1 = 0; 833 uint32_t ret_w2 = 0; 834 uint32_t ret_w3 = 0; 835 uint32_t ret_fid = 0; 836 837 /* 838 * Currently we're only doing this for fragmented FFA_MEM_SHARE_* 839 * requests. 840 */ 841 842 cpu_spin_lock(&rxtx->spinlock); 843 844 s = get_frag_state(global_handle); 845 if (!s) { 846 rc = FFA_INVALID_PARAMETERS; 847 goto out; 848 } 849 850 mm = s->mm; 851 if (mm) { 852 if (flen > tee_mm_get_bytes(mm)) { 853 rc = FFA_INVALID_PARAMETERS; 854 goto out; 855 } 856 page_count = s->share.page_count; 857 buf = (void *)tee_mm_get_smem(mm); 858 } else { 859 if (flen > rxtx->size) { 860 rc = FFA_INVALID_PARAMETERS; 861 goto out; 862 } 863 buf = rxtx->rx; 864 } 865 866 rc = add_mem_share_frag(s, buf, flen); 867 out: 868 cpu_spin_unlock(&rxtx->spinlock); 869 870 if (rc <= 0 && mm) { 871 core_mmu_unmap_pages(tee_mm_get_smem(mm), page_count); 872 tee_mm_free(mm); 873 } 874 875 if (rc < 0) { 876 ret_fid = FFA_ERROR; 877 ret_w2 = rc; 878 } else if (rc > 0) { 879 ret_fid = FFA_MEM_FRAG_RX; 880 ret_w3 = rc; 881 reg_pair_from_64(global_handle, &ret_w2, &ret_w1); 882 } else { 883 ret_fid = FFA_SUCCESS_32; 884 reg_pair_from_64(global_handle, &ret_w3, &ret_w2); 885 } 886 887 spmc_set_args(args, ret_fid, ret_w1, ret_w2, ret_w3, 0, 0); 888 } 889 890 static void handle_mem_reclaim(struct thread_smc_args *args) 891 { 892 uint32_t ret_val = FFA_INVALID_PARAMETERS; 893 uint32_t ret_fid = FFA_ERROR; 894 uint64_t cookie = 0; 895 896 if (args->a3 || args->a4 || args->a5 || args->a6 || args->a7) 897 goto out; 898 899 cookie = reg_pair_to_64(args->a2, args->a1); 900 switch (mobj_ffa_sel1_spmc_reclaim(cookie)) { 901 case TEE_SUCCESS: 902 ret_fid = FFA_SUCCESS_32; 903 ret_val = 0; 904 break; 905 case TEE_ERROR_ITEM_NOT_FOUND: 906 DMSG("cookie %#"PRIx64" not found", cookie); 907 ret_val = FFA_INVALID_PARAMETERS; 908 break; 909 default: 910 DMSG("cookie %#"PRIx64" busy", cookie); 911 ret_val = FFA_DENIED; 912 break; 913 } 914 out: 915 spmc_set_args(args, ret_fid, ret_val, 0, 0, 0, 0); 916 } 917 #endif 918 919 /* Only called from assembly */ 920 void thread_spmc_msg_recv(struct thread_smc_args *args); 921 void thread_spmc_msg_recv(struct thread_smc_args *args) 922 { 923 assert((thread_get_exceptions() & THREAD_EXCP_ALL) == THREAD_EXCP_ALL); 924 switch (args->a0) { 925 #if defined(CFG_CORE_SEL1_SPMC) 926 case FFA_VERSION: 927 spmc_handle_version(args); 928 break; 929 case FFA_FEATURES: 930 handle_features(args); 931 break; 932 #ifdef ARM64 933 case FFA_RXTX_MAP_64: 934 #endif 935 case FFA_RXTX_MAP_32: 936 spmc_handle_rxtx_map(args, &nw_rxtx); 937 break; 938 case FFA_RXTX_UNMAP: 939 spmc_handle_rxtx_unmap(args, &nw_rxtx); 940 break; 941 case FFA_RX_RELEASE: 942 spmc_handle_rx_release(args, &nw_rxtx); 943 break; 944 case FFA_PARTITION_INFO_GET: 945 spmc_handle_partition_info_get(args, &nw_rxtx); 946 break; 947 #endif /*CFG_CORE_SEL1_SPMC*/ 948 case FFA_INTERRUPT: 949 itr_core_handler(); 950 spmc_set_args(args, FFA_SUCCESS_32, args->a1, 0, 0, 0, 0); 951 break; 952 case FFA_MSG_SEND_DIRECT_REQ_32: 953 if (IS_ENABLED(CFG_SECURE_PARTITION) && 954 FFA_DST(args->a1) != my_endpoint_id) { 955 spmc_sp_start_thread(args); 956 break; 957 } 958 959 if (args->a3 & BIT32(OPTEE_FFA_YIELDING_CALL_BIT)) 960 handle_yielding_call(args); 961 else 962 handle_blocking_call(args); 963 break; 964 #if defined(CFG_CORE_SEL1_SPMC) 965 #ifdef ARM64 966 case FFA_MEM_SHARE_64: 967 #endif 968 case FFA_MEM_SHARE_32: 969 handle_mem_share(args, &nw_rxtx); 970 break; 971 case FFA_MEM_RECLAIM: 972 handle_mem_reclaim(args); 973 break; 974 case FFA_MEM_FRAG_TX: 975 handle_mem_frag_tx(args, &nw_rxtx); 976 break; 977 #endif /*CFG_CORE_SEL1_SPMC*/ 978 default: 979 EMSG("Unhandled FFA function ID %#"PRIx32, (uint32_t)args->a0); 980 spmc_set_args(args, FFA_ERROR, FFA_PARAM_MBZ, FFA_NOT_SUPPORTED, 981 FFA_PARAM_MBZ, FFA_PARAM_MBZ, FFA_PARAM_MBZ); 982 } 983 } 984 985 static uint32_t yielding_call_with_arg(uint64_t cookie, uint32_t offset) 986 { 987 size_t sz_rpc = OPTEE_MSG_GET_ARG_SIZE(THREAD_RPC_MAX_NUM_PARAMS); 988 struct thread_ctx *thr = threads + thread_get_id(); 989 uint32_t rv = TEE_ERROR_BAD_PARAMETERS; 990 struct optee_msg_arg *arg = NULL; 991 struct mobj *mobj = NULL; 992 uint32_t num_params = 0; 993 size_t sz = 0; 994 995 mobj = mobj_ffa_get_by_cookie(cookie, 0); 996 if (!mobj) { 997 EMSG("Can't find cookie %#"PRIx64, cookie); 998 return TEE_ERROR_BAD_PARAMETERS; 999 } 1000 1001 rv = mobj_inc_map(mobj); 1002 if (rv) 1003 goto out_put_mobj; 1004 1005 rv = TEE_ERROR_BAD_PARAMETERS; 1006 arg = mobj_get_va(mobj, offset); 1007 if (!arg) 1008 goto out_dec_map; 1009 1010 if (!mobj_get_va(mobj, sizeof(*arg))) 1011 goto out_dec_map; 1012 1013 num_params = READ_ONCE(arg->num_params); 1014 if (num_params > OPTEE_MSG_MAX_NUM_PARAMS) 1015 goto out_dec_map; 1016 1017 sz = OPTEE_MSG_GET_ARG_SIZE(num_params); 1018 thr->rpc_arg = mobj_get_va(mobj, offset + sz); 1019 if (!thr->rpc_arg || !mobj_get_va(mobj, offset + sz + sz_rpc)) 1020 goto out_dec_map; 1021 1022 rv = tee_entry_std(arg, num_params); 1023 1024 thread_rpc_shm_cache_clear(&thr->shm_cache); 1025 thr->rpc_arg = NULL; 1026 1027 out_dec_map: 1028 mobj_dec_map(mobj); 1029 out_put_mobj: 1030 mobj_put(mobj); 1031 return rv; 1032 } 1033 1034 /* 1035 * Helper routine for the assembly function thread_std_smc_entry() 1036 * 1037 * Note: this function is weak just to make it possible to exclude it from 1038 * the unpaged area. 1039 */ 1040 uint32_t __weak __thread_std_smc_entry(uint32_t a0, uint32_t a1, 1041 uint32_t a2, uint32_t a3, 1042 uint32_t a4, uint32_t a5 __unused) 1043 { 1044 /* 1045 * Arguments are supplied from handle_yielding_call() as: 1046 * a0 <- w1 1047 * a1 <- w3 1048 * a2 <- w4 1049 * a3 <- w5 1050 * a4 <- w6 1051 * a5 <- w7 1052 */ 1053 thread_get_tsd()->rpc_target_info = swap_src_dst(a0); 1054 if (a1 == OPTEE_FFA_YIELDING_CALL_WITH_ARG) 1055 return yielding_call_with_arg(reg_pair_to_64(a3, a2), a4); 1056 return FFA_DENIED; 1057 } 1058 1059 static bool set_fmem(struct optee_msg_param *param, struct thread_param *tpm) 1060 { 1061 uint64_t offs = tpm->u.memref.offs; 1062 1063 param->attr = tpm->attr - THREAD_PARAM_ATTR_MEMREF_IN + 1064 OPTEE_MSG_ATTR_TYPE_FMEM_INPUT; 1065 1066 param->u.fmem.offs_low = offs; 1067 param->u.fmem.offs_high = offs >> 32; 1068 if (param->u.fmem.offs_high != offs >> 32) 1069 return false; 1070 1071 param->u.fmem.size = tpm->u.memref.size; 1072 if (tpm->u.memref.mobj) { 1073 uint64_t cookie = mobj_get_cookie(tpm->u.memref.mobj); 1074 1075 /* If a mobj is passed it better be one with a valid cookie. */ 1076 if (cookie == OPTEE_MSG_FMEM_INVALID_GLOBAL_ID) 1077 return false; 1078 param->u.fmem.global_id = cookie; 1079 } else { 1080 param->u.fmem.global_id = OPTEE_MSG_FMEM_INVALID_GLOBAL_ID; 1081 } 1082 1083 return true; 1084 } 1085 1086 static uint32_t get_rpc_arg(uint32_t cmd, size_t num_params, 1087 struct thread_param *params, 1088 struct optee_msg_arg **arg_ret) 1089 { 1090 size_t sz = OPTEE_MSG_GET_ARG_SIZE(THREAD_RPC_MAX_NUM_PARAMS); 1091 struct thread_ctx *thr = threads + thread_get_id(); 1092 struct optee_msg_arg *arg = thr->rpc_arg; 1093 1094 if (num_params > THREAD_RPC_MAX_NUM_PARAMS) 1095 return TEE_ERROR_BAD_PARAMETERS; 1096 1097 if (!arg) { 1098 EMSG("rpc_arg not set"); 1099 return TEE_ERROR_GENERIC; 1100 } 1101 1102 memset(arg, 0, sz); 1103 arg->cmd = cmd; 1104 arg->num_params = num_params; 1105 arg->ret = TEE_ERROR_GENERIC; /* in case value isn't updated */ 1106 1107 for (size_t n = 0; n < num_params; n++) { 1108 switch (params[n].attr) { 1109 case THREAD_PARAM_ATTR_NONE: 1110 arg->params[n].attr = OPTEE_MSG_ATTR_TYPE_NONE; 1111 break; 1112 case THREAD_PARAM_ATTR_VALUE_IN: 1113 case THREAD_PARAM_ATTR_VALUE_OUT: 1114 case THREAD_PARAM_ATTR_VALUE_INOUT: 1115 arg->params[n].attr = params[n].attr - 1116 THREAD_PARAM_ATTR_VALUE_IN + 1117 OPTEE_MSG_ATTR_TYPE_VALUE_INPUT; 1118 arg->params[n].u.value.a = params[n].u.value.a; 1119 arg->params[n].u.value.b = params[n].u.value.b; 1120 arg->params[n].u.value.c = params[n].u.value.c; 1121 break; 1122 case THREAD_PARAM_ATTR_MEMREF_IN: 1123 case THREAD_PARAM_ATTR_MEMREF_OUT: 1124 case THREAD_PARAM_ATTR_MEMREF_INOUT: 1125 if (!set_fmem(arg->params + n, params + n)) 1126 return TEE_ERROR_BAD_PARAMETERS; 1127 break; 1128 default: 1129 return TEE_ERROR_BAD_PARAMETERS; 1130 } 1131 } 1132 1133 if (arg_ret) 1134 *arg_ret = arg; 1135 1136 return TEE_SUCCESS; 1137 } 1138 1139 static uint32_t get_rpc_arg_res(struct optee_msg_arg *arg, size_t num_params, 1140 struct thread_param *params) 1141 { 1142 for (size_t n = 0; n < num_params; n++) { 1143 switch (params[n].attr) { 1144 case THREAD_PARAM_ATTR_VALUE_OUT: 1145 case THREAD_PARAM_ATTR_VALUE_INOUT: 1146 params[n].u.value.a = arg->params[n].u.value.a; 1147 params[n].u.value.b = arg->params[n].u.value.b; 1148 params[n].u.value.c = arg->params[n].u.value.c; 1149 break; 1150 case THREAD_PARAM_ATTR_MEMREF_OUT: 1151 case THREAD_PARAM_ATTR_MEMREF_INOUT: 1152 params[n].u.memref.size = arg->params[n].u.fmem.size; 1153 break; 1154 default: 1155 break; 1156 } 1157 } 1158 1159 return arg->ret; 1160 } 1161 1162 uint32_t thread_rpc_cmd(uint32_t cmd, size_t num_params, 1163 struct thread_param *params) 1164 { 1165 struct thread_rpc_arg rpc_arg = { .call = { 1166 .w1 = thread_get_tsd()->rpc_target_info, 1167 .w4 = OPTEE_FFA_YIELDING_CALL_RETURN_RPC_CMD, 1168 }, 1169 }; 1170 struct optee_msg_arg *arg = NULL; 1171 uint32_t ret = 0; 1172 1173 ret = get_rpc_arg(cmd, num_params, params, &arg); 1174 if (ret) 1175 return ret; 1176 1177 thread_rpc(&rpc_arg); 1178 1179 return get_rpc_arg_res(arg, num_params, params); 1180 } 1181 1182 static void thread_rpc_free(unsigned int bt, uint64_t cookie, struct mobj *mobj) 1183 { 1184 struct thread_rpc_arg rpc_arg = { .call = { 1185 .w1 = thread_get_tsd()->rpc_target_info, 1186 .w4 = OPTEE_FFA_YIELDING_CALL_RETURN_RPC_CMD, 1187 }, 1188 }; 1189 struct thread_param param = THREAD_PARAM_VALUE(IN, bt, cookie, 0); 1190 uint32_t res2 = 0; 1191 uint32_t res = 0; 1192 1193 DMSG("freeing cookie %#"PRIx64, cookie); 1194 1195 res = get_rpc_arg(OPTEE_RPC_CMD_SHM_FREE, 1, ¶m, NULL); 1196 1197 mobj_put(mobj); 1198 res2 = mobj_ffa_unregister_by_cookie(cookie); 1199 if (res2) 1200 DMSG("mobj_ffa_unregister_by_cookie(%#"PRIx64"): %#"PRIx32, 1201 cookie, res2); 1202 if (!res) 1203 thread_rpc(&rpc_arg); 1204 } 1205 1206 static struct mobj *thread_rpc_alloc(size_t size, size_t align, unsigned int bt) 1207 { 1208 struct thread_rpc_arg rpc_arg = { .call = { 1209 .w1 = thread_get_tsd()->rpc_target_info, 1210 .w4 = OPTEE_FFA_YIELDING_CALL_RETURN_RPC_CMD, 1211 }, 1212 }; 1213 struct thread_param param = THREAD_PARAM_VALUE(IN, bt, size, align); 1214 struct optee_msg_arg *arg = NULL; 1215 unsigned int internal_offset = 0; 1216 struct mobj *mobj = NULL; 1217 uint64_t cookie = 0; 1218 1219 if (get_rpc_arg(OPTEE_RPC_CMD_SHM_ALLOC, 1, ¶m, &arg)) 1220 return NULL; 1221 1222 thread_rpc(&rpc_arg); 1223 1224 if (arg->num_params != 1 || 1225 arg->params->attr != OPTEE_MSG_ATTR_TYPE_FMEM_OUTPUT) 1226 return NULL; 1227 1228 internal_offset = READ_ONCE(arg->params->u.fmem.internal_offs); 1229 cookie = READ_ONCE(arg->params->u.fmem.global_id); 1230 mobj = mobj_ffa_get_by_cookie(cookie, internal_offset); 1231 if (!mobj) { 1232 DMSG("mobj_ffa_get_by_cookie(%#"PRIx64", %#x): failed", 1233 cookie, internal_offset); 1234 return NULL; 1235 } 1236 1237 assert(mobj_is_nonsec(mobj)); 1238 1239 if (mobj_inc_map(mobj)) { 1240 DMSG("mobj_inc_map(%#"PRIx64"): failed", cookie); 1241 mobj_put(mobj); 1242 return NULL; 1243 } 1244 1245 return mobj; 1246 } 1247 1248 struct mobj *thread_rpc_alloc_payload(size_t size) 1249 { 1250 return thread_rpc_alloc(size, 8, OPTEE_RPC_SHM_TYPE_APPL); 1251 } 1252 1253 struct mobj *thread_rpc_alloc_kernel_payload(size_t size) 1254 { 1255 return thread_rpc_alloc(size, 8, OPTEE_RPC_SHM_TYPE_KERNEL); 1256 } 1257 1258 void thread_rpc_free_kernel_payload(struct mobj *mobj) 1259 { 1260 thread_rpc_free(OPTEE_RPC_SHM_TYPE_KERNEL, mobj_get_cookie(mobj), mobj); 1261 } 1262 1263 void thread_rpc_free_payload(struct mobj *mobj) 1264 { 1265 thread_rpc_free(OPTEE_RPC_SHM_TYPE_APPL, mobj_get_cookie(mobj), 1266 mobj); 1267 } 1268 1269 struct mobj *thread_rpc_alloc_global_payload(size_t size) 1270 { 1271 return thread_rpc_alloc(size, 8, OPTEE_RPC_SHM_TYPE_GLOBAL); 1272 } 1273 1274 void thread_rpc_free_global_payload(struct mobj *mobj) 1275 { 1276 thread_rpc_free(OPTEE_RPC_SHM_TYPE_GLOBAL, mobj_get_cookie(mobj), 1277 mobj); 1278 } 1279 1280 #ifdef CFG_CORE_SEL2_SPMC 1281 static bool is_ffa_success(uint32_t fid) 1282 { 1283 #ifdef ARM64 1284 if (fid == FFA_SUCCESS_64) 1285 return true; 1286 #endif 1287 return fid == FFA_SUCCESS_32; 1288 } 1289 1290 static void spmc_rxtx_map(struct ffa_rxtx *rxtx) 1291 { 1292 struct thread_smc_args args = { 1293 #ifdef ARM64 1294 .a0 = FFA_RXTX_MAP_64, 1295 #else 1296 .a0 = FFA_RXTX_MAP_32, 1297 #endif 1298 .a1 = (vaddr_t)rxtx->tx, 1299 .a2 = (vaddr_t)rxtx->rx, 1300 .a3 = 1, 1301 }; 1302 1303 thread_smccc(&args); 1304 if (!is_ffa_success(args.a0)) { 1305 if (args.a0 == FFA_ERROR) 1306 EMSG("rxtx map failed with error %ld", args.a2); 1307 else 1308 EMSG("rxtx map failed"); 1309 panic(); 1310 } 1311 } 1312 1313 static uint16_t spmc_get_id(void) 1314 { 1315 struct thread_smc_args args = { 1316 .a0 = FFA_ID_GET, 1317 }; 1318 1319 thread_smccc(&args); 1320 if (!is_ffa_success(args.a0)) { 1321 if (args.a0 == FFA_ERROR) 1322 EMSG("Get id failed with error %ld", args.a2); 1323 else 1324 EMSG("Get id failed"); 1325 panic(); 1326 } 1327 1328 return args.a2; 1329 } 1330 1331 static struct ffa_mem_transaction *spmc_retrieve_req(uint64_t cookie) 1332 { 1333 struct ffa_mem_transaction *trans_descr = nw_rxtx.tx; 1334 struct ffa_mem_access *acc_descr_array = NULL; 1335 struct ffa_mem_access_perm *perm_descr = NULL; 1336 size_t size = sizeof(*trans_descr) + 1337 1 * sizeof(struct ffa_mem_access); 1338 struct thread_smc_args args = { 1339 .a0 = FFA_MEM_RETRIEVE_REQ_32, 1340 .a1 = size, /* Total Length */ 1341 .a2 = size, /* Frag Length == Total length */ 1342 .a3 = 0, /* Address, Using TX -> MBZ */ 1343 .a4 = 0, /* Using TX -> MBZ */ 1344 }; 1345 1346 memset(trans_descr, 0, size); 1347 trans_descr->sender_id = thread_get_tsd()->rpc_target_info; 1348 trans_descr->mem_reg_attr = FFA_NORMAL_MEM_REG_ATTR; 1349 trans_descr->global_handle = cookie; 1350 trans_descr->flags = FFA_MEMORY_REGION_FLAG_TIME_SLICE | 1351 FFA_MEMORY_REGION_TRANSACTION_TYPE_SHARE | 1352 FFA_MEMORY_REGION_FLAG_ANY_ALIGNMENT; 1353 trans_descr->mem_access_count = 1; 1354 acc_descr_array = trans_descr->mem_access_array; 1355 acc_descr_array->region_offs = 0; 1356 acc_descr_array->reserved = 0; 1357 perm_descr = &acc_descr_array->access_perm; 1358 perm_descr->endpoint_id = my_endpoint_id; 1359 perm_descr->perm = FFA_MEM_ACC_RW; 1360 perm_descr->flags = FFA_MEMORY_REGION_FLAG_TIME_SLICE; 1361 1362 thread_smccc(&args); 1363 if (args.a0 != FFA_MEM_RETRIEVE_RESP) { 1364 if (args.a0 == FFA_ERROR) 1365 EMSG("Failed to fetch cookie %#"PRIx64" error code %d", 1366 cookie, (int)args.a2); 1367 else 1368 EMSG("Failed to fetch cookie %#"PRIx64" a0 %#"PRIx64, 1369 cookie, args.a0); 1370 return NULL; 1371 } 1372 1373 return nw_rxtx.rx; 1374 } 1375 1376 void thread_spmc_relinquish(uint64_t cookie) 1377 { 1378 struct ffa_mem_relinquish *relinquish_desc = nw_rxtx.tx; 1379 struct thread_smc_args args = { 1380 .a0 = FFA_MEM_RELINQUISH, 1381 }; 1382 1383 memset(relinquish_desc, 0, sizeof(*relinquish_desc)); 1384 relinquish_desc->handle = cookie; 1385 relinquish_desc->flags = 0; 1386 relinquish_desc->endpoint_count = 1; 1387 relinquish_desc->endpoint_id_array[0] = my_endpoint_id; 1388 thread_smccc(&args); 1389 if (!is_ffa_success(args.a0)) 1390 EMSG("Failed to relinquish cookie %#"PRIx64, cookie); 1391 } 1392 1393 static int set_pages(struct ffa_address_range *regions, 1394 unsigned int num_regions, unsigned int num_pages, 1395 struct mobj_ffa *mf) 1396 { 1397 unsigned int n = 0; 1398 unsigned int idx = 0; 1399 1400 for (n = 0; n < num_regions; n++) { 1401 unsigned int page_count = READ_ONCE(regions[n].page_count); 1402 uint64_t addr = READ_ONCE(regions[n].address); 1403 1404 if (mobj_ffa_add_pages_at(mf, &idx, addr, page_count)) 1405 return FFA_INVALID_PARAMETERS; 1406 } 1407 1408 if (idx != num_pages) 1409 return FFA_INVALID_PARAMETERS; 1410 1411 return 0; 1412 } 1413 1414 struct mobj_ffa *thread_spmc_populate_mobj_from_rx(uint64_t cookie) 1415 { 1416 struct mobj_ffa *ret = NULL; 1417 struct ffa_mem_transaction *retrieve_desc = NULL; 1418 struct ffa_mem_access *descr_array = NULL; 1419 struct ffa_mem_region *descr = NULL; 1420 struct mobj_ffa *mf = NULL; 1421 unsigned int num_pages = 0; 1422 unsigned int offs = 0; 1423 struct thread_smc_args ffa_rx_release_args = { 1424 .a0 = FFA_RX_RELEASE 1425 }; 1426 1427 /* 1428 * OP-TEE is only supporting a single mem_region while the 1429 * specification allows for more than one. 1430 */ 1431 retrieve_desc = spmc_retrieve_req(cookie); 1432 if (!retrieve_desc) { 1433 EMSG("Failed to retrieve cookie from rx buffer %#"PRIx64, 1434 cookie); 1435 return NULL; 1436 } 1437 1438 descr_array = retrieve_desc->mem_access_array; 1439 offs = READ_ONCE(descr_array->region_offs); 1440 descr = (struct ffa_mem_region *)((vaddr_t)retrieve_desc + offs); 1441 1442 num_pages = READ_ONCE(descr->total_page_count); 1443 mf = mobj_ffa_sel2_spmc_new(cookie, num_pages); 1444 if (!mf) 1445 goto out; 1446 1447 if (set_pages(descr->address_range_array, 1448 READ_ONCE(descr->address_range_count), num_pages, mf)) { 1449 mobj_ffa_sel2_spmc_delete(mf); 1450 goto out; 1451 } 1452 1453 ret = mf; 1454 1455 out: 1456 /* Release RX buffer after the mem retrieve request. */ 1457 thread_smccc(&ffa_rx_release_args); 1458 1459 return ret; 1460 } 1461 1462 static TEE_Result spmc_init(void) 1463 { 1464 spmc_rxtx_map(&nw_rxtx); 1465 my_endpoint_id = spmc_get_id(); 1466 DMSG("My endpoint ID %#x", my_endpoint_id); 1467 1468 return TEE_SUCCESS; 1469 } 1470 #endif /*CFG_CORE_SEL2_SPMC*/ 1471 1472 #if defined(CFG_CORE_SEL1_SPMC) 1473 static TEE_Result spmc_init(void) 1474 { 1475 my_endpoint_id = SPMC_ENDPOINT_ID; 1476 DMSG("My endpoint ID %#x", my_endpoint_id); 1477 1478 return TEE_SUCCESS; 1479 } 1480 #endif /*CFG_CORE_SEL1_SPMC*/ 1481 1482 service_init(spmc_init); 1483