xref: /optee_os/core/arch/arm/kernel/thread.c (revision f6e2b9e2d1a270542c6f6f5e36ed4e36abe18256)
1 // SPDX-License-Identifier: BSD-2-Clause
2 /*
3  * Copyright (c) 2016-2021, Linaro Limited
4  * Copyright (c) 2014, STMicroelectronics International N.V.
5  * Copyright (c) 2020-2021, Arm Limited
6  */
7 
8 #include <platform_config.h>
9 
10 #include <arm.h>
11 #include <assert.h>
12 #include <config.h>
13 #include <io.h>
14 #include <keep.h>
15 #include <kernel/asan.h>
16 #include <kernel/boot.h>
17 #include <kernel/linker.h>
18 #include <kernel/lockdep.h>
19 #include <kernel/misc.h>
20 #include <kernel/panic.h>
21 #include <kernel/spinlock.h>
22 #include <kernel/spmc_sp_handler.h>
23 #include <kernel/tee_ta_manager.h>
24 #include <kernel/thread_defs.h>
25 #include <kernel/thread.h>
26 #include <kernel/user_mode_ctx_struct.h>
27 #include <kernel/virtualization.h>
28 #include <mm/core_memprot.h>
29 #include <mm/mobj.h>
30 #include <mm/tee_mm.h>
31 #include <mm/tee_pager.h>
32 #include <mm/vm.h>
33 #include <smccc.h>
34 #include <sm/sm.h>
35 #include <trace.h>
36 #include <util.h>
37 
38 #include "thread_private.h"
39 
40 struct thread_ctx threads[CFG_NUM_THREADS];
41 
42 struct thread_core_local thread_core_local[CFG_TEE_CORE_NB_CORE] __nex_bss;
43 
44 /*
45  * Stacks
46  *
47  * [Lower addresses on the left]
48  *
49  * [ STACK_CANARY_SIZE/2 | STACK_CHECK_EXTRA | STACK_XXX_SIZE | STACK_CANARY_SIZE/2 ]
50  * ^                     ^                   ^                ^
51  * stack_xxx[n]          "hard" top          "soft" top       bottom
52  */
53 
54 #ifdef CFG_WITH_ARM_TRUSTED_FW
55 #define STACK_TMP_OFFS		0
56 #else
57 #define STACK_TMP_OFFS		SM_STACK_TMP_RESERVE_SIZE
58 #endif
59 
60 #ifdef ARM32
61 #ifdef CFG_CORE_SANITIZE_KADDRESS
62 #define STACK_TMP_SIZE		(3072 + STACK_TMP_OFFS)
63 #else
64 #define STACK_TMP_SIZE		(2048 + STACK_TMP_OFFS)
65 #endif
66 #define STACK_THREAD_SIZE	8192
67 
68 #if defined(CFG_CORE_SANITIZE_KADDRESS) || defined(__clang__) || \
69 	!defined(CFG_CRYPTO_WITH_CE)
70 #define STACK_ABT_SIZE		3072
71 #else
72 #define STACK_ABT_SIZE		2048
73 #endif
74 
75 #endif /*ARM32*/
76 
77 #ifdef ARM64
78 #if defined(__clang__) && !defined(__OPTIMIZE_SIZE__)
79 #define STACK_TMP_SIZE		(4096 + STACK_TMP_OFFS)
80 #else
81 #define STACK_TMP_SIZE		(2048 + STACK_TMP_OFFS)
82 #endif
83 #define STACK_THREAD_SIZE	8192
84 
85 #if TRACE_LEVEL > 0
86 #define STACK_ABT_SIZE		3072
87 #else
88 #define STACK_ABT_SIZE		1024
89 #endif
90 #endif /*ARM64*/
91 
92 #ifdef CFG_WITH_STACK_CANARIES
93 #ifdef ARM32
94 #define STACK_CANARY_SIZE	(4 * sizeof(uint32_t))
95 #endif
96 #ifdef ARM64
97 #define STACK_CANARY_SIZE	(8 * sizeof(uint32_t))
98 #endif
99 #define START_CANARY_VALUE	0xdededede
100 #define END_CANARY_VALUE	0xabababab
101 #define GET_START_CANARY(name, stack_num) name[stack_num][0]
102 #define GET_END_CANARY(name, stack_num) \
103 	name[stack_num][sizeof(name[stack_num]) / sizeof(uint32_t) - 1]
104 #else
105 #define STACK_CANARY_SIZE	0
106 #endif
107 
108 #ifdef CFG_CORE_DEBUG_CHECK_STACKS
109 /*
110  * Extra space added to each stack in order to reliably detect and dump stack
111  * overflows. Should cover the maximum expected overflow size caused by any C
112  * function (say, 512 bytes; no function should have that much local variables),
113  * plus the maximum stack space needed by __cyg_profile_func_exit(): about 1 KB,
114  * a large part of which is used to print the call stack. Total: 1.5 KB.
115  */
116 #define STACK_CHECK_EXTRA	1536
117 #else
118 #define STACK_CHECK_EXTRA	0
119 #endif
120 
121 #define DECLARE_STACK(name, num_stacks, stack_size, linkage) \
122 linkage uint32_t name[num_stacks] \
123 		[ROUNDUP(stack_size + STACK_CANARY_SIZE + STACK_CHECK_EXTRA, \
124 			 STACK_ALIGNMENT) / sizeof(uint32_t)] \
125 		__attribute__((section(".nozi_stack." # name), \
126 			       aligned(STACK_ALIGNMENT)))
127 
128 #define GET_STACK(stack) ((vaddr_t)(stack) + STACK_SIZE(stack))
129 
130 DECLARE_STACK(stack_tmp, CFG_TEE_CORE_NB_CORE,
131 	      STACK_TMP_SIZE + CFG_STACK_TMP_EXTRA, static);
132 DECLARE_STACK(stack_abt, CFG_TEE_CORE_NB_CORE, STACK_ABT_SIZE, static);
133 #ifndef CFG_WITH_PAGER
134 DECLARE_STACK(stack_thread, CFG_NUM_THREADS,
135 	      STACK_THREAD_SIZE + CFG_STACK_THREAD_EXTRA, static);
136 #endif
137 
138 #define GET_STACK_TOP_HARD(stack, n) \
139 	((vaddr_t)&(stack)[n] + STACK_CANARY_SIZE / 2)
140 #define GET_STACK_TOP_SOFT(stack, n) \
141 	(GET_STACK_TOP_HARD(stack, n) + STACK_CHECK_EXTRA)
142 #define GET_STACK_BOTTOM(stack, n) ((vaddr_t)&(stack)[n] + sizeof(stack[n]) - \
143 				    STACK_CANARY_SIZE / 2)
144 
145 const void *stack_tmp_export __section(".identity_map.stack_tmp_export") =
146 	(void *)(GET_STACK_BOTTOM(stack_tmp, 0) - STACK_TMP_OFFS);
147 const uint32_t stack_tmp_stride __section(".identity_map.stack_tmp_stride") =
148 	sizeof(stack_tmp[0]);
149 
150 /*
151  * These stack setup info are required by secondary boot cores before they
152  * each locally enable the pager (the mmu). Hence kept in pager sections.
153  */
154 DECLARE_KEEP_PAGER(stack_tmp_export);
155 DECLARE_KEEP_PAGER(stack_tmp_stride);
156 
157 #ifdef CFG_CORE_UNMAP_CORE_AT_EL0
158 static vaddr_t thread_user_kcode_va __nex_bss;
159 long thread_user_kcode_offset __nex_bss;
160 static size_t thread_user_kcode_size __nex_bss;
161 #endif
162 
163 #if defined(CFG_CORE_UNMAP_CORE_AT_EL0) && \
164 	defined(CFG_CORE_WORKAROUND_SPECTRE_BP_SEC) && defined(ARM64)
165 long thread_user_kdata_sp_offset __nex_bss;
166 static uint8_t thread_user_kdata_page[
167 	ROUNDUP(sizeof(thread_core_local), SMALL_PAGE_SIZE)]
168 	__aligned(SMALL_PAGE_SIZE)
169 #ifndef CFG_VIRTUALIZATION
170 	__section(".nozi.kdata_page");
171 #else
172 	__section(".nex_nozi.kdata_page");
173 #endif
174 #endif
175 
176 static unsigned int thread_global_lock __nex_bss = SPINLOCK_UNLOCK;
177 
178 static void init_canaries(void)
179 {
180 #ifdef CFG_WITH_STACK_CANARIES
181 	size_t n;
182 #define INIT_CANARY(name)						\
183 	for (n = 0; n < ARRAY_SIZE(name); n++) {			\
184 		uint32_t *start_canary = &GET_START_CANARY(name, n);	\
185 		uint32_t *end_canary = &GET_END_CANARY(name, n);	\
186 									\
187 		*start_canary = START_CANARY_VALUE;			\
188 		*end_canary = END_CANARY_VALUE;				\
189 	}
190 
191 	INIT_CANARY(stack_tmp);
192 	INIT_CANARY(stack_abt);
193 #if !defined(CFG_WITH_PAGER) && !defined(CFG_VIRTUALIZATION)
194 	INIT_CANARY(stack_thread);
195 #endif
196 #endif/*CFG_WITH_STACK_CANARIES*/
197 }
198 
199 #define CANARY_DIED(stack, loc, n, addr) \
200 	do { \
201 		EMSG_RAW("Dead canary at %s of '%s[%zu]' (%p)", #loc, #stack, \
202 			 n, (void *)addr); \
203 		panic(); \
204 	} while (0)
205 
206 void thread_check_canaries(void)
207 {
208 #ifdef CFG_WITH_STACK_CANARIES
209 	uint32_t *canary = NULL;
210 	size_t n = 0;
211 
212 	for (n = 0; n < ARRAY_SIZE(stack_tmp); n++) {
213 		canary = &GET_START_CANARY(stack_tmp, n);
214 		if (*canary != START_CANARY_VALUE)
215 			CANARY_DIED(stack_tmp, start, n, canary);
216 		canary = &GET_END_CANARY(stack_tmp, n);
217 		if (*canary != END_CANARY_VALUE)
218 			CANARY_DIED(stack_tmp, end, n, canary);
219 	}
220 
221 	for (n = 0; n < ARRAY_SIZE(stack_abt); n++) {
222 		canary = &GET_START_CANARY(stack_abt, n);
223 		if (*canary != START_CANARY_VALUE)
224 			CANARY_DIED(stack_abt, start, n, canary);
225 		canary = &GET_END_CANARY(stack_abt, n);
226 		if (*canary != END_CANARY_VALUE)
227 			CANARY_DIED(stack_abt, end, n, canary);
228 
229 	}
230 #if !defined(CFG_WITH_PAGER) && !defined(CFG_VIRTUALIZATION)
231 	for (n = 0; n < ARRAY_SIZE(stack_thread); n++) {
232 		canary = &GET_START_CANARY(stack_thread, n);
233 		if (*canary != START_CANARY_VALUE)
234 			CANARY_DIED(stack_thread, start, n, canary);
235 		canary = &GET_END_CANARY(stack_thread, n);
236 		if (*canary != END_CANARY_VALUE)
237 			CANARY_DIED(stack_thread, end, n, canary);
238 	}
239 #endif
240 #endif/*CFG_WITH_STACK_CANARIES*/
241 }
242 
243 void thread_lock_global(void)
244 {
245 	cpu_spin_lock(&thread_global_lock);
246 }
247 
248 void thread_unlock_global(void)
249 {
250 	cpu_spin_unlock(&thread_global_lock);
251 }
252 
253 #ifdef ARM32
254 uint32_t __nostackcheck thread_get_exceptions(void)
255 {
256 	uint32_t cpsr = read_cpsr();
257 
258 	return (cpsr >> CPSR_F_SHIFT) & THREAD_EXCP_ALL;
259 }
260 
261 void __nostackcheck thread_set_exceptions(uint32_t exceptions)
262 {
263 	uint32_t cpsr = read_cpsr();
264 
265 	/* Foreign interrupts must not be unmasked while holding a spinlock */
266 	if (!(exceptions & THREAD_EXCP_FOREIGN_INTR))
267 		assert_have_no_spinlock();
268 
269 	cpsr &= ~(THREAD_EXCP_ALL << CPSR_F_SHIFT);
270 	cpsr |= ((exceptions & THREAD_EXCP_ALL) << CPSR_F_SHIFT);
271 
272 	barrier();
273 	write_cpsr(cpsr);
274 	barrier();
275 }
276 #endif /*ARM32*/
277 
278 #ifdef ARM64
279 uint32_t __nostackcheck thread_get_exceptions(void)
280 {
281 	uint32_t daif = read_daif();
282 
283 	return (daif >> DAIF_F_SHIFT) & THREAD_EXCP_ALL;
284 }
285 
286 void __nostackcheck thread_set_exceptions(uint32_t exceptions)
287 {
288 	uint32_t daif = read_daif();
289 
290 	/* Foreign interrupts must not be unmasked while holding a spinlock */
291 	if (!(exceptions & THREAD_EXCP_FOREIGN_INTR))
292 		assert_have_no_spinlock();
293 
294 	daif &= ~(THREAD_EXCP_ALL << DAIF_F_SHIFT);
295 	daif |= ((exceptions & THREAD_EXCP_ALL) << DAIF_F_SHIFT);
296 
297 	barrier();
298 	write_daif(daif);
299 	barrier();
300 }
301 #endif /*ARM64*/
302 
303 uint32_t __nostackcheck thread_mask_exceptions(uint32_t exceptions)
304 {
305 	uint32_t state = thread_get_exceptions();
306 
307 	thread_set_exceptions(state | (exceptions & THREAD_EXCP_ALL));
308 	return state;
309 }
310 
311 void __nostackcheck thread_unmask_exceptions(uint32_t state)
312 {
313 	thread_set_exceptions(state & THREAD_EXCP_ALL);
314 }
315 
316 
317 static struct thread_core_local * __nostackcheck
318 get_core_local(unsigned int pos)
319 {
320 	/*
321 	 * Foreign interrupts must be disabled before playing with core_local
322 	 * since we otherwise may be rescheduled to a different core in the
323 	 * middle of this function.
324 	 */
325 	assert(thread_get_exceptions() & THREAD_EXCP_FOREIGN_INTR);
326 
327 	assert(pos < CFG_TEE_CORE_NB_CORE);
328 	return &thread_core_local[pos];
329 }
330 
331 struct thread_core_local * __nostackcheck thread_get_core_local(void)
332 {
333 	unsigned int pos = get_core_pos();
334 
335 	return get_core_local(pos);
336 }
337 
338 #ifdef CFG_CORE_DEBUG_CHECK_STACKS
339 static void print_stack_limits(void)
340 {
341 	size_t n = 0;
342 	vaddr_t __maybe_unused start = 0;
343 	vaddr_t __maybe_unused end = 0;
344 
345 	for (n = 0; n < CFG_TEE_CORE_NB_CORE; n++) {
346 		start = GET_STACK_TOP_SOFT(stack_tmp, n);
347 		end = GET_STACK_BOTTOM(stack_tmp, n);
348 		DMSG("tmp [%zu] 0x%" PRIxVA "..0x%" PRIxVA, n, start, end);
349 	}
350 	for (n = 0; n < CFG_TEE_CORE_NB_CORE; n++) {
351 		start = GET_STACK_TOP_SOFT(stack_abt, n);
352 		end = GET_STACK_BOTTOM(stack_abt, n);
353 		DMSG("abt [%zu] 0x%" PRIxVA "..0x%" PRIxVA, n, start, end);
354 	}
355 	for (n = 0; n < CFG_NUM_THREADS; n++) {
356 		end = threads[n].stack_va_end;
357 		start = end - STACK_THREAD_SIZE;
358 		DMSG("thr [%zu] 0x%" PRIxVA "..0x%" PRIxVA, n, start, end);
359 	}
360 }
361 
362 static void check_stack_limits(void)
363 {
364 	vaddr_t stack_start = 0;
365 	vaddr_t stack_end = 0;
366 	/* Any value in the current stack frame will do */
367 	vaddr_t current_sp = (vaddr_t)&stack_start;
368 
369 	if (!get_stack_soft_limits(&stack_start, &stack_end))
370 		panic("Unknown stack limits");
371 	if (current_sp < stack_start || current_sp > stack_end) {
372 		DMSG("Stack pointer out of range (0x%" PRIxVA ")", current_sp);
373 		print_stack_limits();
374 		panic();
375 	}
376 }
377 
378 static bool * __nostackcheck get_stackcheck_recursion_flag(void)
379 {
380 	uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR);
381 	unsigned int pos = get_core_pos();
382 	struct thread_core_local *l = get_core_local(pos);
383 	int ct = l->curr_thread;
384 	bool *p = NULL;
385 
386 	if (l->flags & (THREAD_CLF_ABORT | THREAD_CLF_TMP))
387 		p = &l->stackcheck_recursion;
388 	else if (!l->flags)
389 		p = &threads[ct].tsd.stackcheck_recursion;
390 
391 	thread_unmask_exceptions(exceptions);
392 	return p;
393 }
394 
395 void __cyg_profile_func_enter(void *this_fn, void *call_site);
396 void __nostackcheck __cyg_profile_func_enter(void *this_fn __unused,
397 					     void *call_site __unused)
398 {
399 	bool *p = get_stackcheck_recursion_flag();
400 
401 	assert(p);
402 	if (*p)
403 		return;
404 	*p = true;
405 	check_stack_limits();
406 	*p = false;
407 }
408 
409 void __cyg_profile_func_exit(void *this_fn, void *call_site);
410 void __nostackcheck __cyg_profile_func_exit(void *this_fn __unused,
411 					    void *call_site __unused)
412 {
413 }
414 #else
415 static void print_stack_limits(void)
416 {
417 }
418 #endif
419 
420 static void thread_lazy_save_ns_vfp(void)
421 {
422 #ifdef CFG_WITH_VFP
423 	struct thread_ctx *thr = threads + thread_get_id();
424 
425 	thr->vfp_state.ns_saved = false;
426 	vfp_lazy_save_state_init(&thr->vfp_state.ns);
427 #endif /*CFG_WITH_VFP*/
428 }
429 
430 static void thread_lazy_restore_ns_vfp(void)
431 {
432 #ifdef CFG_WITH_VFP
433 	struct thread_ctx *thr = threads + thread_get_id();
434 	struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp;
435 
436 	assert(!thr->vfp_state.sec_lazy_saved && !thr->vfp_state.sec_saved);
437 
438 	if (tuv && tuv->lazy_saved && !tuv->saved) {
439 		vfp_lazy_save_state_final(&tuv->vfp, false /*!force_save*/);
440 		tuv->saved = true;
441 	}
442 
443 	vfp_lazy_restore_state(&thr->vfp_state.ns, thr->vfp_state.ns_saved);
444 	thr->vfp_state.ns_saved = false;
445 #endif /*CFG_WITH_VFP*/
446 }
447 
448 #ifdef ARM32
449 static void init_regs(struct thread_ctx *thread, uint32_t a0, uint32_t a1,
450 		      uint32_t a2, uint32_t a3, uint32_t a4, uint32_t a5,
451 		      uint32_t a6, uint32_t a7, void *pc)
452 {
453 	thread->regs.pc = (uint32_t)pc;
454 
455 	/*
456 	 * Stdcalls starts in SVC mode with masked foreign interrupts, masked
457 	 * Asynchronous abort and unmasked native interrupts.
458 	 */
459 	thread->regs.cpsr = read_cpsr() & ARM32_CPSR_E;
460 	thread->regs.cpsr |= CPSR_MODE_SVC | CPSR_A |
461 			(THREAD_EXCP_FOREIGN_INTR << ARM32_CPSR_F_SHIFT);
462 	/* Enable thumb mode if it's a thumb instruction */
463 	if (thread->regs.pc & 1)
464 		thread->regs.cpsr |= CPSR_T;
465 	/* Reinitialize stack pointer */
466 	thread->regs.svc_sp = thread->stack_va_end;
467 
468 	/*
469 	 * Copy arguments into context. This will make the
470 	 * arguments appear in r0-r7 when thread is started.
471 	 */
472 	thread->regs.r0 = a0;
473 	thread->regs.r1 = a1;
474 	thread->regs.r2 = a2;
475 	thread->regs.r3 = a3;
476 	thread->regs.r4 = a4;
477 	thread->regs.r5 = a5;
478 	thread->regs.r6 = a6;
479 	thread->regs.r7 = a7;
480 }
481 #endif /*ARM32*/
482 
483 #ifdef ARM64
484 static void init_regs(struct thread_ctx *thread, uint32_t a0, uint32_t a1,
485 		      uint32_t a2, uint32_t a3, uint32_t a4, uint32_t a5,
486 		      uint32_t a6, uint32_t a7, void *pc)
487 {
488 	thread->regs.pc = (uint64_t)pc;
489 
490 	/*
491 	 * Stdcalls starts in SVC mode with masked foreign interrupts, masked
492 	 * Asynchronous abort and unmasked native interrupts.
493 	 */
494 	thread->regs.cpsr = SPSR_64(SPSR_64_MODE_EL1, SPSR_64_MODE_SP_EL0,
495 				THREAD_EXCP_FOREIGN_INTR | DAIFBIT_ABT);
496 	/* Reinitialize stack pointer */
497 	thread->regs.sp = thread->stack_va_end;
498 
499 	/*
500 	 * Copy arguments into context. This will make the
501 	 * arguments appear in x0-x7 when thread is started.
502 	 */
503 	thread->regs.x[0] = a0;
504 	thread->regs.x[1] = a1;
505 	thread->regs.x[2] = a2;
506 	thread->regs.x[3] = a3;
507 	thread->regs.x[4] = a4;
508 	thread->regs.x[5] = a5;
509 	thread->regs.x[6] = a6;
510 	thread->regs.x[7] = a7;
511 
512 	/* Set up frame pointer as per the Aarch64 AAPCS */
513 	thread->regs.x[29] = 0;
514 }
515 #endif /*ARM64*/
516 
517 void thread_init_boot_thread(void)
518 {
519 	struct thread_core_local *l = thread_get_core_local();
520 
521 	thread_init_threads();
522 
523 	l->curr_thread = 0;
524 	threads[0].state = THREAD_STATE_ACTIVE;
525 }
526 
527 void __nostackcheck thread_clr_boot_thread(void)
528 {
529 	struct thread_core_local *l = thread_get_core_local();
530 
531 	assert(l->curr_thread >= 0 && l->curr_thread < CFG_NUM_THREADS);
532 	assert(threads[l->curr_thread].state == THREAD_STATE_ACTIVE);
533 	threads[l->curr_thread].state = THREAD_STATE_FREE;
534 	l->curr_thread = THREAD_ID_INVALID;
535 }
536 
537 static void __thread_alloc_and_run(uint32_t a0, uint32_t a1, uint32_t a2,
538 				   uint32_t a3, uint32_t a4, uint32_t a5,
539 				   uint32_t a6, uint32_t a7,
540 				   void *pc)
541 {
542 	size_t n;
543 	struct thread_core_local *l = thread_get_core_local();
544 	bool found_thread = false;
545 
546 	assert(l->curr_thread == THREAD_ID_INVALID);
547 
548 	thread_lock_global();
549 
550 	for (n = 0; n < CFG_NUM_THREADS; n++) {
551 		if (threads[n].state == THREAD_STATE_FREE) {
552 			threads[n].state = THREAD_STATE_ACTIVE;
553 			found_thread = true;
554 			break;
555 		}
556 	}
557 
558 	thread_unlock_global();
559 
560 	if (!found_thread)
561 		return;
562 
563 	l->curr_thread = n;
564 
565 	threads[n].flags = 0;
566 	init_regs(threads + n, a0, a1, a2, a3, a4, a5, a6, a7, pc);
567 
568 	thread_lazy_save_ns_vfp();
569 
570 	l->flags &= ~THREAD_CLF_TMP;
571 	thread_resume(&threads[n].regs);
572 	/*NOTREACHED*/
573 	panic();
574 }
575 
576 void thread_alloc_and_run(uint32_t a0, uint32_t a1, uint32_t a2, uint32_t a3)
577 {
578 	__thread_alloc_and_run(a0, a1, a2, a3, 0, 0, 0, 0,
579 			       thread_std_smc_entry);
580 }
581 
582 #ifdef CFG_SECURE_PARTITION
583 void thread_sp_alloc_and_run(struct thread_smc_args *args __maybe_unused)
584 {
585 	__thread_alloc_and_run(args->a0, args->a1, args->a2, args->a3, args->a4,
586 			       args->a5, args->a6, args->a7,
587 			       spmc_sp_thread_entry);
588 }
589 #endif
590 
591 #ifdef ARM32
592 static void copy_a0_to_a3(struct thread_ctx_regs *regs, uint32_t a0,
593 			  uint32_t a1, uint32_t a2, uint32_t a3)
594 {
595 	/*
596 	 * Update returned values from RPC, values will appear in
597 	 * r0-r3 when thread is resumed.
598 	 */
599 	regs->r0 = a0;
600 	regs->r1 = a1;
601 	regs->r2 = a2;
602 	regs->r3 = a3;
603 }
604 #endif /*ARM32*/
605 
606 #ifdef ARM64
607 static void copy_a0_to_a3(struct thread_ctx_regs *regs, uint32_t a0,
608 			  uint32_t a1, uint32_t a2, uint32_t a3)
609 {
610 	/*
611 	 * Update returned values from RPC, values will appear in
612 	 * x0-x3 when thread is resumed.
613 	 */
614 	regs->x[0] = a0;
615 	regs->x[1] = a1;
616 	regs->x[2] = a2;
617 	regs->x[3] = a3;
618 }
619 #endif /*ARM64*/
620 
621 #ifdef ARM32
622 static bool is_from_user(uint32_t cpsr)
623 {
624 	return (cpsr & ARM32_CPSR_MODE_MASK) == ARM32_CPSR_MODE_USR;
625 }
626 #endif
627 
628 #ifdef ARM64
629 static bool is_from_user(uint32_t cpsr)
630 {
631 	if (cpsr & (SPSR_MODE_RW_32 << SPSR_MODE_RW_SHIFT))
632 		return true;
633 	if (((cpsr >> SPSR_64_MODE_EL_SHIFT) & SPSR_64_MODE_EL_MASK) ==
634 	     SPSR_64_MODE_EL0)
635 		return true;
636 	return false;
637 }
638 #endif
639 
640 #ifdef CFG_SYSCALL_FTRACE
641 static void __noprof ftrace_suspend(void)
642 {
643 	struct ts_session *s = TAILQ_FIRST(&thread_get_tsd()->sess_stack);
644 
645 	if (s && s->fbuf)
646 		s->fbuf->syscall_trace_suspended = true;
647 }
648 
649 static void __noprof ftrace_resume(void)
650 {
651 	struct ts_session *s = TAILQ_FIRST(&thread_get_tsd()->sess_stack);
652 
653 	if (s && s->fbuf)
654 		s->fbuf->syscall_trace_suspended = false;
655 }
656 #else
657 static void __noprof ftrace_suspend(void)
658 {
659 }
660 
661 static void __noprof ftrace_resume(void)
662 {
663 }
664 #endif
665 
666 static bool is_user_mode(struct thread_ctx_regs *regs)
667 {
668 	return is_from_user((uint32_t)regs->cpsr);
669 }
670 
671 void thread_resume_from_rpc(uint32_t thread_id, uint32_t a0, uint32_t a1,
672 			    uint32_t a2, uint32_t a3)
673 {
674 	size_t n = thread_id;
675 	struct thread_core_local *l = thread_get_core_local();
676 	bool found_thread = false;
677 
678 	assert(l->curr_thread == THREAD_ID_INVALID);
679 
680 	thread_lock_global();
681 
682 	if (n < CFG_NUM_THREADS && threads[n].state == THREAD_STATE_SUSPENDED) {
683 		threads[n].state = THREAD_STATE_ACTIVE;
684 		found_thread = true;
685 	}
686 
687 	thread_unlock_global();
688 
689 	if (!found_thread)
690 		return;
691 
692 	l->curr_thread = n;
693 
694 	if (threads[n].have_user_map) {
695 		core_mmu_set_user_map(&threads[n].user_map);
696 		if (threads[n].flags & THREAD_FLAGS_EXIT_ON_FOREIGN_INTR)
697 			tee_ta_ftrace_update_times_resume();
698 	}
699 
700 	if (is_user_mode(&threads[n].regs))
701 		tee_ta_update_session_utime_resume();
702 
703 	/*
704 	 * Return from RPC to request service of a foreign interrupt must not
705 	 * get parameters from non-secure world.
706 	 */
707 	if (threads[n].flags & THREAD_FLAGS_COPY_ARGS_ON_RETURN) {
708 		copy_a0_to_a3(&threads[n].regs, a0, a1, a2, a3);
709 		threads[n].flags &= ~THREAD_FLAGS_COPY_ARGS_ON_RETURN;
710 	}
711 
712 	thread_lazy_save_ns_vfp();
713 
714 	if (threads[n].have_user_map)
715 		ftrace_resume();
716 
717 	l->flags &= ~THREAD_CLF_TMP;
718 	thread_resume(&threads[n].regs);
719 	/*NOTREACHED*/
720 	panic();
721 }
722 
723 void __nostackcheck *thread_get_tmp_sp(void)
724 {
725 	struct thread_core_local *l = thread_get_core_local();
726 
727 	/*
728 	 * Called from assembly when switching to the temporary stack, so flags
729 	 * need updating
730 	 */
731 	l->flags |= THREAD_CLF_TMP;
732 
733 	return (void *)l->tmp_stack_va_end;
734 }
735 
736 #ifdef ARM64
737 vaddr_t thread_get_saved_thread_sp(void)
738 {
739 	struct thread_core_local *l = thread_get_core_local();
740 	int ct = l->curr_thread;
741 
742 	assert(ct != THREAD_ID_INVALID);
743 	return threads[ct].kern_sp;
744 }
745 #endif /*ARM64*/
746 
747 vaddr_t thread_stack_start(void)
748 {
749 	struct thread_ctx *thr;
750 	int ct = thread_get_id_may_fail();
751 
752 	if (ct == THREAD_ID_INVALID)
753 		return 0;
754 
755 	thr = threads + ct;
756 	return thr->stack_va_end - STACK_THREAD_SIZE;
757 }
758 
759 size_t thread_stack_size(void)
760 {
761 	return STACK_THREAD_SIZE;
762 }
763 
764 bool get_stack_limits(vaddr_t *start, vaddr_t *end, bool hard)
765 {
766 	uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR);
767 	unsigned int pos = get_core_pos();
768 	struct thread_core_local *l = get_core_local(pos);
769 	int ct = l->curr_thread;
770 	bool ret = false;
771 
772 	if (l->flags & THREAD_CLF_TMP) {
773 		if (hard)
774 			*start = GET_STACK_TOP_HARD(stack_tmp, pos);
775 		else
776 			*start = GET_STACK_TOP_SOFT(stack_tmp, pos);
777 		*end = GET_STACK_BOTTOM(stack_tmp, pos);
778 		ret = true;
779 	} else if (l->flags & THREAD_CLF_ABORT) {
780 		if (hard)
781 			*start = GET_STACK_TOP_HARD(stack_abt, pos);
782 		else
783 			*start = GET_STACK_TOP_SOFT(stack_abt, pos);
784 		*end = GET_STACK_BOTTOM(stack_abt, pos);
785 		ret = true;
786 	} else if (!l->flags) {
787 		if (ct < 0 || ct >= CFG_NUM_THREADS)
788 			goto out;
789 
790 		*end = threads[ct].stack_va_end;
791 		*start = *end - STACK_THREAD_SIZE;
792 		if (!hard)
793 			*start += STACK_CHECK_EXTRA;
794 		ret = true;
795 	}
796 out:
797 	thread_unmask_exceptions(exceptions);
798 	return ret;
799 }
800 
801 bool thread_is_from_abort_mode(void)
802 {
803 	struct thread_core_local *l = thread_get_core_local();
804 
805 	return (l->flags >> THREAD_CLF_SAVED_SHIFT) & THREAD_CLF_ABORT;
806 }
807 
808 #ifdef ARM32
809 bool thread_is_in_normal_mode(void)
810 {
811 	return (read_cpsr() & ARM32_CPSR_MODE_MASK) == ARM32_CPSR_MODE_SVC;
812 }
813 #endif
814 
815 #ifdef ARM64
816 bool thread_is_in_normal_mode(void)
817 {
818 	uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR);
819 	struct thread_core_local *l = thread_get_core_local();
820 	bool ret;
821 
822 	/*
823 	 * If any bit in l->flags is set aside from THREAD_CLF_TMP we're
824 	 * handling some exception.
825 	 */
826 	ret = (l->curr_thread != THREAD_ID_INVALID) &&
827 	      !(l->flags & ~THREAD_CLF_TMP);
828 	thread_unmask_exceptions(exceptions);
829 
830 	return ret;
831 }
832 #endif
833 
834 void thread_state_free(void)
835 {
836 	struct thread_core_local *l = thread_get_core_local();
837 	int ct = l->curr_thread;
838 
839 	assert(ct != THREAD_ID_INVALID);
840 
841 	thread_lazy_restore_ns_vfp();
842 	tee_pager_release_phys(
843 		(void *)(threads[ct].stack_va_end - STACK_THREAD_SIZE),
844 		STACK_THREAD_SIZE);
845 
846 	thread_lock_global();
847 
848 	assert(threads[ct].state == THREAD_STATE_ACTIVE);
849 	threads[ct].state = THREAD_STATE_FREE;
850 	threads[ct].flags = 0;
851 	l->curr_thread = THREAD_ID_INVALID;
852 
853 #ifdef CFG_VIRTUALIZATION
854 	virt_unset_guest();
855 #endif
856 	thread_unlock_global();
857 }
858 
859 #ifdef CFG_WITH_PAGER
860 static void release_unused_kernel_stack(struct thread_ctx *thr,
861 					uint32_t cpsr __maybe_unused)
862 {
863 #ifdef ARM64
864 	/*
865 	 * If we're from user mode then thr->regs.sp is the saved user
866 	 * stack pointer and thr->kern_sp holds the last kernel stack
867 	 * pointer. But if we're from kernel mode then thr->kern_sp isn't
868 	 * up to date so we need to read from thr->regs.sp instead.
869 	 */
870 	vaddr_t sp = is_from_user(cpsr) ?  thr->kern_sp : thr->regs.sp;
871 #else
872 	vaddr_t sp = thr->regs.svc_sp;
873 #endif
874 	vaddr_t base = thr->stack_va_end - STACK_THREAD_SIZE;
875 	size_t len = sp - base;
876 
877 	tee_pager_release_phys((void *)base, len);
878 }
879 #else
880 static void release_unused_kernel_stack(struct thread_ctx *thr __unused,
881 					uint32_t cpsr __unused)
882 {
883 }
884 #endif
885 
886 int thread_state_suspend(uint32_t flags, uint32_t cpsr, vaddr_t pc)
887 {
888 	struct thread_core_local *l = thread_get_core_local();
889 	int ct = l->curr_thread;
890 
891 	assert(ct != THREAD_ID_INVALID);
892 
893 	if (core_mmu_user_mapping_is_active())
894 		ftrace_suspend();
895 
896 	thread_check_canaries();
897 
898 	release_unused_kernel_stack(threads + ct, cpsr);
899 
900 	if (is_from_user(cpsr)) {
901 		thread_user_save_vfp();
902 		tee_ta_update_session_utime_suspend();
903 		tee_ta_gprof_sample_pc(pc);
904 	}
905 	thread_lazy_restore_ns_vfp();
906 
907 	thread_lock_global();
908 
909 	assert(threads[ct].state == THREAD_STATE_ACTIVE);
910 	threads[ct].flags |= flags;
911 	threads[ct].regs.cpsr = cpsr;
912 	threads[ct].regs.pc = pc;
913 	threads[ct].state = THREAD_STATE_SUSPENDED;
914 
915 	threads[ct].have_user_map = core_mmu_user_mapping_is_active();
916 	if (threads[ct].have_user_map) {
917 		if (threads[ct].flags & THREAD_FLAGS_EXIT_ON_FOREIGN_INTR)
918 			tee_ta_ftrace_update_times_suspend();
919 		core_mmu_get_user_map(&threads[ct].user_map);
920 		core_mmu_set_user_map(NULL);
921 	}
922 
923 	l->curr_thread = THREAD_ID_INVALID;
924 
925 #ifdef CFG_VIRTUALIZATION
926 	virt_unset_guest();
927 #endif
928 
929 	thread_unlock_global();
930 
931 	return ct;
932 }
933 
934 #ifdef ARM32
935 static void set_tmp_stack(struct thread_core_local *l, vaddr_t sp)
936 {
937 	l->tmp_stack_va_end = sp;
938 	thread_set_irq_sp(sp);
939 	thread_set_fiq_sp(sp);
940 }
941 
942 static void set_abt_stack(struct thread_core_local *l, vaddr_t sp)
943 {
944 	l->abt_stack_va_end = sp;
945 	thread_set_abt_sp((vaddr_t)l);
946 	thread_set_und_sp((vaddr_t)l);
947 }
948 #endif /*ARM32*/
949 
950 #ifdef ARM64
951 static void set_tmp_stack(struct thread_core_local *l, vaddr_t sp)
952 {
953 	/*
954 	 * We're already using the tmp stack when this function is called
955 	 * so there's no need to assign it to any stack pointer. However,
956 	 * we'll need to restore it at different times so store it here.
957 	 */
958 	l->tmp_stack_va_end = sp;
959 }
960 
961 static void set_abt_stack(struct thread_core_local *l, vaddr_t sp)
962 {
963 	l->abt_stack_va_end = sp;
964 }
965 #endif /*ARM64*/
966 
967 bool thread_init_stack(uint32_t thread_id, vaddr_t sp)
968 {
969 	if (thread_id >= CFG_NUM_THREADS)
970 		return false;
971 	threads[thread_id].stack_va_end = sp;
972 	return true;
973 }
974 
975 short int thread_get_id_may_fail(void)
976 {
977 	/*
978 	 * thread_get_core_local() requires foreign interrupts to be disabled
979 	 */
980 	uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR);
981 	struct thread_core_local *l = thread_get_core_local();
982 	short int ct = l->curr_thread;
983 
984 	thread_unmask_exceptions(exceptions);
985 	return ct;
986 }
987 
988 short int thread_get_id(void)
989 {
990 	short int ct = thread_get_id_may_fail();
991 
992 	/* Thread ID has to fit in a short int */
993 	COMPILE_TIME_ASSERT(CFG_NUM_THREADS <= SHRT_MAX);
994 	assert(ct >= 0 && ct < CFG_NUM_THREADS);
995 	return ct;
996 }
997 
998 #ifdef CFG_WITH_PAGER
999 static void init_thread_stacks(void)
1000 {
1001 	size_t n = 0;
1002 
1003 	/*
1004 	 * Allocate virtual memory for thread stacks.
1005 	 */
1006 	for (n = 0; n < CFG_NUM_THREADS; n++) {
1007 		tee_mm_entry_t *mm = NULL;
1008 		vaddr_t sp = 0;
1009 		size_t num_pages = 0;
1010 		struct fobj *fobj = NULL;
1011 
1012 		/* Find vmem for thread stack and its protection gap */
1013 		mm = tee_mm_alloc(&tee_mm_vcore,
1014 				  SMALL_PAGE_SIZE + STACK_THREAD_SIZE);
1015 		assert(mm);
1016 
1017 		/* Claim eventual physical page */
1018 		tee_pager_add_pages(tee_mm_get_smem(mm), tee_mm_get_size(mm),
1019 				    true);
1020 
1021 		num_pages = tee_mm_get_bytes(mm) / SMALL_PAGE_SIZE - 1;
1022 		fobj = fobj_locked_paged_alloc(num_pages);
1023 
1024 		/* Add the area to the pager */
1025 		tee_pager_add_core_area(tee_mm_get_smem(mm) + SMALL_PAGE_SIZE,
1026 					PAGER_AREA_TYPE_LOCK, fobj);
1027 		fobj_put(fobj);
1028 
1029 		/* init effective stack */
1030 		sp = tee_mm_get_smem(mm) + tee_mm_get_bytes(mm);
1031 		asan_tag_access((void *)tee_mm_get_smem(mm), (void *)sp);
1032 		if (!thread_init_stack(n, sp))
1033 			panic("init stack failed");
1034 	}
1035 }
1036 #else
1037 static void init_thread_stacks(void)
1038 {
1039 	size_t n;
1040 
1041 	/* Assign the thread stacks */
1042 	for (n = 0; n < CFG_NUM_THREADS; n++) {
1043 		if (!thread_init_stack(n, GET_STACK_BOTTOM(stack_thread, n)))
1044 			panic("thread_init_stack failed");
1045 	}
1046 }
1047 #endif /*CFG_WITH_PAGER*/
1048 
1049 static void init_user_kcode(void)
1050 {
1051 #ifdef CFG_CORE_UNMAP_CORE_AT_EL0
1052 	vaddr_t v = (vaddr_t)thread_excp_vect;
1053 	vaddr_t ve = (vaddr_t)thread_excp_vect_end;
1054 
1055 	thread_user_kcode_va = ROUNDDOWN(v, CORE_MMU_USER_CODE_SIZE);
1056 	ve = ROUNDUP(ve, CORE_MMU_USER_CODE_SIZE);
1057 	thread_user_kcode_size = ve - thread_user_kcode_va;
1058 
1059 	core_mmu_get_user_va_range(&v, NULL);
1060 	thread_user_kcode_offset = thread_user_kcode_va - v;
1061 
1062 #if defined(CFG_CORE_WORKAROUND_SPECTRE_BP_SEC) && defined(ARM64)
1063 	/*
1064 	 * When transitioning to EL0 subtract SP with this much to point to
1065 	 * this special kdata page instead. SP is restored by add this much
1066 	 * while transitioning back to EL1.
1067 	 */
1068 	v += thread_user_kcode_size;
1069 	thread_user_kdata_sp_offset = (vaddr_t)thread_core_local - v;
1070 #endif
1071 #endif /*CFG_CORE_UNMAP_CORE_AT_EL0*/
1072 }
1073 
1074 void thread_init_threads(void)
1075 {
1076 	size_t n = 0;
1077 
1078 	init_thread_stacks();
1079 	print_stack_limits();
1080 	pgt_init();
1081 
1082 	mutex_lockdep_init();
1083 
1084 	for (n = 0; n < CFG_NUM_THREADS; n++) {
1085 		TAILQ_INIT(&threads[n].tsd.sess_stack);
1086 		SLIST_INIT(&threads[n].tsd.pgt_cache);
1087 	}
1088 }
1089 
1090 void __nostackcheck thread_init_thread_core_local(void)
1091 {
1092 	size_t n = 0;
1093 	struct thread_core_local *tcl = thread_core_local;
1094 
1095 	for (n = 0; n < CFG_TEE_CORE_NB_CORE; n++) {
1096 		tcl[n].curr_thread = THREAD_ID_INVALID;
1097 		tcl[n].flags = THREAD_CLF_TMP;
1098 	}
1099 
1100 	tcl[0].tmp_stack_va_end = GET_STACK_BOTTOM(stack_tmp, 0);
1101 }
1102 
1103 void thread_init_primary(void)
1104 {
1105 	/* Initialize canaries around the stacks */
1106 	init_canaries();
1107 
1108 	init_user_kcode();
1109 }
1110 
1111 static void init_sec_mon_stack(size_t pos __maybe_unused)
1112 {
1113 #if !defined(CFG_WITH_ARM_TRUSTED_FW)
1114 	/* Initialize secure monitor */
1115 	sm_init(GET_STACK_BOTTOM(stack_tmp, pos));
1116 #endif
1117 }
1118 
1119 static uint32_t __maybe_unused get_midr_implementer(uint32_t midr)
1120 {
1121 	return (midr >> MIDR_IMPLEMENTER_SHIFT) & MIDR_IMPLEMENTER_MASK;
1122 }
1123 
1124 static uint32_t __maybe_unused get_midr_primary_part(uint32_t midr)
1125 {
1126 	return (midr >> MIDR_PRIMARY_PART_NUM_SHIFT) &
1127 	       MIDR_PRIMARY_PART_NUM_MASK;
1128 }
1129 
1130 #ifdef ARM64
1131 static bool probe_workaround_available(void)
1132 {
1133 	int32_t r;
1134 
1135 	r = thread_smc(SMCCC_VERSION, 0, 0, 0);
1136 	if (r < 0)
1137 		return false;
1138 	if (r < 0x10001)	/* compare with version 1.1 */
1139 		return false;
1140 
1141 	/* Version >= 1.1, so SMCCC_ARCH_FEATURES is available */
1142 	r = thread_smc(SMCCC_ARCH_FEATURES, SMCCC_ARCH_WORKAROUND_1, 0, 0);
1143 	return r >= 0;
1144 }
1145 
1146 static vaddr_t __maybe_unused select_vector(vaddr_t a)
1147 {
1148 	if (probe_workaround_available()) {
1149 		DMSG("SMCCC_ARCH_WORKAROUND_1 (%#08" PRIx32 ") available",
1150 		     SMCCC_ARCH_WORKAROUND_1);
1151 		DMSG("SMC Workaround for CVE-2017-5715 used");
1152 		return a;
1153 	}
1154 
1155 	DMSG("SMCCC_ARCH_WORKAROUND_1 (%#08" PRIx32 ") unavailable",
1156 	     SMCCC_ARCH_WORKAROUND_1);
1157 	DMSG("SMC Workaround for CVE-2017-5715 not needed (if ARM-TF is up to date)");
1158 	return (vaddr_t)thread_excp_vect;
1159 }
1160 #else
1161 static vaddr_t __maybe_unused select_vector(vaddr_t a)
1162 {
1163 	return a;
1164 }
1165 #endif
1166 
1167 static vaddr_t get_excp_vect(void)
1168 {
1169 #ifdef CFG_CORE_WORKAROUND_SPECTRE_BP_SEC
1170 	uint32_t midr = read_midr();
1171 
1172 	if (get_midr_implementer(midr) != MIDR_IMPLEMENTER_ARM)
1173 		return (vaddr_t)thread_excp_vect;
1174 
1175 	switch (get_midr_primary_part(midr)) {
1176 #ifdef ARM32
1177 	case CORTEX_A8_PART_NUM:
1178 	case CORTEX_A9_PART_NUM:
1179 	case CORTEX_A17_PART_NUM:
1180 #endif
1181 	case CORTEX_A57_PART_NUM:
1182 	case CORTEX_A72_PART_NUM:
1183 	case CORTEX_A73_PART_NUM:
1184 	case CORTEX_A75_PART_NUM:
1185 		return select_vector((vaddr_t)thread_excp_vect_workaround);
1186 #ifdef ARM32
1187 	case CORTEX_A15_PART_NUM:
1188 		return select_vector((vaddr_t)thread_excp_vect_workaround_a15);
1189 #endif
1190 	default:
1191 		return (vaddr_t)thread_excp_vect;
1192 	}
1193 #endif /*CFG_CORE_WORKAROUND_SPECTRE_BP_SEC*/
1194 
1195 	return (vaddr_t)thread_excp_vect;
1196 }
1197 
1198 void thread_init_per_cpu(void)
1199 {
1200 	size_t pos = get_core_pos();
1201 	struct thread_core_local *l = thread_get_core_local();
1202 
1203 	init_sec_mon_stack(pos);
1204 
1205 	set_tmp_stack(l, GET_STACK_BOTTOM(stack_tmp, pos) - STACK_TMP_OFFS);
1206 	set_abt_stack(l, GET_STACK_BOTTOM(stack_abt, pos));
1207 
1208 	thread_init_vbar(get_excp_vect());
1209 
1210 #ifdef CFG_FTRACE_SUPPORT
1211 	/*
1212 	 * Enable accesses to frequency register and physical counter
1213 	 * register in EL0/PL0 required for timestamping during
1214 	 * function tracing.
1215 	 */
1216 	write_cntkctl(read_cntkctl() | CNTKCTL_PL0PCTEN);
1217 #endif
1218 }
1219 
1220 struct thread_specific_data *thread_get_tsd(void)
1221 {
1222 	return &threads[thread_get_id()].tsd;
1223 }
1224 
1225 struct thread_ctx_regs * __nostackcheck thread_get_ctx_regs(void)
1226 {
1227 	struct thread_core_local *l = thread_get_core_local();
1228 
1229 	assert(l->curr_thread != THREAD_ID_INVALID);
1230 	return &threads[l->curr_thread].regs;
1231 }
1232 
1233 void thread_set_foreign_intr(bool enable)
1234 {
1235 	/* thread_get_core_local() requires foreign interrupts to be disabled */
1236 	uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR);
1237 	struct thread_core_local *l;
1238 
1239 	l = thread_get_core_local();
1240 
1241 	assert(l->curr_thread != THREAD_ID_INVALID);
1242 
1243 	if (enable) {
1244 		threads[l->curr_thread].flags |=
1245 					THREAD_FLAGS_FOREIGN_INTR_ENABLE;
1246 		thread_set_exceptions(exceptions & ~THREAD_EXCP_FOREIGN_INTR);
1247 	} else {
1248 		/*
1249 		 * No need to disable foreign interrupts here since they're
1250 		 * already disabled above.
1251 		 */
1252 		threads[l->curr_thread].flags &=
1253 					~THREAD_FLAGS_FOREIGN_INTR_ENABLE;
1254 	}
1255 }
1256 
1257 void thread_restore_foreign_intr(void)
1258 {
1259 	/* thread_get_core_local() requires foreign interrupts to be disabled */
1260 	uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR);
1261 	struct thread_core_local *l;
1262 
1263 	l = thread_get_core_local();
1264 
1265 	assert(l->curr_thread != THREAD_ID_INVALID);
1266 
1267 	if (threads[l->curr_thread].flags & THREAD_FLAGS_FOREIGN_INTR_ENABLE)
1268 		thread_set_exceptions(exceptions & ~THREAD_EXCP_FOREIGN_INTR);
1269 }
1270 
1271 #ifdef CFG_WITH_VFP
1272 uint32_t thread_kernel_enable_vfp(void)
1273 {
1274 	uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR);
1275 	struct thread_ctx *thr = threads + thread_get_id();
1276 	struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp;
1277 
1278 	assert(!vfp_is_enabled());
1279 
1280 	if (!thr->vfp_state.ns_saved) {
1281 		vfp_lazy_save_state_final(&thr->vfp_state.ns,
1282 					  true /*force_save*/);
1283 		thr->vfp_state.ns_saved = true;
1284 	} else if (thr->vfp_state.sec_lazy_saved &&
1285 		   !thr->vfp_state.sec_saved) {
1286 		/*
1287 		 * This happens when we're handling an abort while the
1288 		 * thread was using the VFP state.
1289 		 */
1290 		vfp_lazy_save_state_final(&thr->vfp_state.sec,
1291 					  false /*!force_save*/);
1292 		thr->vfp_state.sec_saved = true;
1293 	} else if (tuv && tuv->lazy_saved && !tuv->saved) {
1294 		/*
1295 		 * This can happen either during syscall or abort
1296 		 * processing (while processing a syscall).
1297 		 */
1298 		vfp_lazy_save_state_final(&tuv->vfp, false /*!force_save*/);
1299 		tuv->saved = true;
1300 	}
1301 
1302 	vfp_enable();
1303 	return exceptions;
1304 }
1305 
1306 void thread_kernel_disable_vfp(uint32_t state)
1307 {
1308 	uint32_t exceptions;
1309 
1310 	assert(vfp_is_enabled());
1311 
1312 	vfp_disable();
1313 	exceptions = thread_get_exceptions();
1314 	assert(exceptions & THREAD_EXCP_FOREIGN_INTR);
1315 	exceptions &= ~THREAD_EXCP_FOREIGN_INTR;
1316 	exceptions |= state & THREAD_EXCP_FOREIGN_INTR;
1317 	thread_set_exceptions(exceptions);
1318 }
1319 
1320 void thread_kernel_save_vfp(void)
1321 {
1322 	struct thread_ctx *thr = threads + thread_get_id();
1323 
1324 	assert(thread_get_exceptions() & THREAD_EXCP_FOREIGN_INTR);
1325 	if (vfp_is_enabled()) {
1326 		vfp_lazy_save_state_init(&thr->vfp_state.sec);
1327 		thr->vfp_state.sec_lazy_saved = true;
1328 	}
1329 }
1330 
1331 void thread_kernel_restore_vfp(void)
1332 {
1333 	struct thread_ctx *thr = threads + thread_get_id();
1334 
1335 	assert(thread_get_exceptions() & THREAD_EXCP_FOREIGN_INTR);
1336 	assert(!vfp_is_enabled());
1337 	if (thr->vfp_state.sec_lazy_saved) {
1338 		vfp_lazy_restore_state(&thr->vfp_state.sec,
1339 				       thr->vfp_state.sec_saved);
1340 		thr->vfp_state.sec_saved = false;
1341 		thr->vfp_state.sec_lazy_saved = false;
1342 	}
1343 }
1344 
1345 void thread_user_enable_vfp(struct thread_user_vfp_state *uvfp)
1346 {
1347 	struct thread_ctx *thr = threads + thread_get_id();
1348 	struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp;
1349 
1350 	assert(thread_get_exceptions() & THREAD_EXCP_FOREIGN_INTR);
1351 	assert(!vfp_is_enabled());
1352 
1353 	if (!thr->vfp_state.ns_saved) {
1354 		vfp_lazy_save_state_final(&thr->vfp_state.ns,
1355 					  true /*force_save*/);
1356 		thr->vfp_state.ns_saved = true;
1357 	} else if (tuv && uvfp != tuv) {
1358 		if (tuv->lazy_saved && !tuv->saved) {
1359 			vfp_lazy_save_state_final(&tuv->vfp,
1360 						  false /*!force_save*/);
1361 			tuv->saved = true;
1362 		}
1363 	}
1364 
1365 	if (uvfp->lazy_saved)
1366 		vfp_lazy_restore_state(&uvfp->vfp, uvfp->saved);
1367 	uvfp->lazy_saved = false;
1368 	uvfp->saved = false;
1369 
1370 	thr->vfp_state.uvfp = uvfp;
1371 	vfp_enable();
1372 }
1373 
1374 void thread_user_save_vfp(void)
1375 {
1376 	struct thread_ctx *thr = threads + thread_get_id();
1377 	struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp;
1378 
1379 	assert(thread_get_exceptions() & THREAD_EXCP_FOREIGN_INTR);
1380 	if (!vfp_is_enabled())
1381 		return;
1382 
1383 	assert(tuv && !tuv->lazy_saved && !tuv->saved);
1384 	vfp_lazy_save_state_init(&tuv->vfp);
1385 	tuv->lazy_saved = true;
1386 }
1387 
1388 void thread_user_clear_vfp(struct user_mode_ctx *uctx)
1389 {
1390 	struct thread_user_vfp_state *uvfp = &uctx->vfp;
1391 	struct thread_ctx *thr = threads + thread_get_id();
1392 
1393 	if (uvfp == thr->vfp_state.uvfp)
1394 		thr->vfp_state.uvfp = NULL;
1395 	uvfp->lazy_saved = false;
1396 	uvfp->saved = false;
1397 }
1398 #endif /*CFG_WITH_VFP*/
1399 
1400 #ifdef ARM32
1401 static bool get_spsr(bool is_32bit, unsigned long entry_func, uint32_t *spsr)
1402 {
1403 	uint32_t s;
1404 
1405 	if (!is_32bit)
1406 		return false;
1407 
1408 	s = read_cpsr();
1409 	s &= ~(CPSR_MODE_MASK | CPSR_T | CPSR_IT_MASK1 | CPSR_IT_MASK2);
1410 	s |= CPSR_MODE_USR;
1411 	if (entry_func & 1)
1412 		s |= CPSR_T;
1413 	*spsr = s;
1414 	return true;
1415 }
1416 #endif
1417 
1418 #ifdef ARM64
1419 static bool get_spsr(bool is_32bit, unsigned long entry_func, uint32_t *spsr)
1420 {
1421 	uint32_t s;
1422 
1423 	if (is_32bit) {
1424 		s = read_daif() & (SPSR_32_AIF_MASK << SPSR_32_AIF_SHIFT);
1425 		s |= SPSR_MODE_RW_32 << SPSR_MODE_RW_SHIFT;
1426 		s |= (entry_func & SPSR_32_T_MASK) << SPSR_32_T_SHIFT;
1427 	} else {
1428 		s = read_daif() & (SPSR_64_DAIF_MASK << SPSR_64_DAIF_SHIFT);
1429 	}
1430 
1431 	*spsr = s;
1432 	return true;
1433 }
1434 #endif
1435 
1436 static void set_ctx_regs(struct thread_ctx_regs *regs, unsigned long a0,
1437 			 unsigned long a1, unsigned long a2, unsigned long a3,
1438 			 unsigned long user_sp, unsigned long entry_func,
1439 			 uint32_t spsr)
1440 {
1441 	/*
1442 	 * First clear all registers to avoid leaking information from
1443 	 * other TAs or even the Core itself.
1444 	 */
1445 	*regs = (struct thread_ctx_regs){ };
1446 #ifdef ARM32
1447 	regs->r0 = a0;
1448 	regs->r1 = a1;
1449 	regs->r2 = a2;
1450 	regs->r3 = a3;
1451 	regs->usr_sp = user_sp;
1452 	regs->pc = entry_func;
1453 	regs->cpsr = spsr;
1454 #endif
1455 #ifdef ARM64
1456 	regs->x[0] = a0;
1457 	regs->x[1] = a1;
1458 	regs->x[2] = a2;
1459 	regs->x[3] = a3;
1460 	regs->sp = user_sp;
1461 	regs->pc = entry_func;
1462 	regs->cpsr = spsr;
1463 	regs->x[13] = user_sp;	/* Used when running TA in Aarch32 */
1464 	regs->sp = user_sp;	/* Used when running TA in Aarch64 */
1465 	/* Set frame pointer (user stack can't be unwound past this point) */
1466 	regs->x[29] = 0;
1467 #endif
1468 }
1469 
1470 uint32_t thread_enter_user_mode(unsigned long a0, unsigned long a1,
1471 		unsigned long a2, unsigned long a3, unsigned long user_sp,
1472 		unsigned long entry_func, bool is_32bit,
1473 		uint32_t *exit_status0, uint32_t *exit_status1)
1474 {
1475 	uint32_t spsr = 0;
1476 	uint32_t exceptions = 0;
1477 	uint32_t rc = 0;
1478 	struct thread_ctx_regs *regs = NULL;
1479 
1480 	tee_ta_update_session_utime_resume();
1481 
1482 	/* Derive SPSR from current CPSR/PSTATE readout. */
1483 	if (!get_spsr(is_32bit, entry_func, &spsr)) {
1484 		*exit_status0 = 1; /* panic */
1485 		*exit_status1 = 0xbadbadba;
1486 		return 0;
1487 	}
1488 
1489 	exceptions = thread_mask_exceptions(THREAD_EXCP_ALL);
1490 	/*
1491 	 * We're using the per thread location of saved context registers
1492 	 * for temporary storage. Now that exceptions are masked they will
1493 	 * not be used for any thing else until they are eventually
1494 	 * unmasked when user mode has been entered.
1495 	 */
1496 	regs = thread_get_ctx_regs();
1497 	set_ctx_regs(regs, a0, a1, a2, a3, user_sp, entry_func, spsr);
1498 	rc = __thread_enter_user_mode(regs, exit_status0, exit_status1);
1499 	thread_unmask_exceptions(exceptions);
1500 	return rc;
1501 }
1502 
1503 #ifdef CFG_CORE_UNMAP_CORE_AT_EL0
1504 void thread_get_user_kcode(struct mobj **mobj, size_t *offset,
1505 			   vaddr_t *va, size_t *sz)
1506 {
1507 	core_mmu_get_user_va_range(va, NULL);
1508 	*mobj = mobj_tee_ram;
1509 	*offset = thread_user_kcode_va - VCORE_START_VA;
1510 	*sz = thread_user_kcode_size;
1511 }
1512 #endif
1513 
1514 #if defined(CFG_CORE_UNMAP_CORE_AT_EL0) && \
1515 	defined(CFG_CORE_WORKAROUND_SPECTRE_BP_SEC) && defined(ARM64)
1516 void thread_get_user_kdata(struct mobj **mobj, size_t *offset,
1517 			   vaddr_t *va, size_t *sz)
1518 {
1519 	vaddr_t v;
1520 
1521 	core_mmu_get_user_va_range(&v, NULL);
1522 	*va = v + thread_user_kcode_size;
1523 	*mobj = mobj_tee_ram;
1524 	*offset = (vaddr_t)thread_user_kdata_page - VCORE_START_VA;
1525 	*sz = sizeof(thread_user_kdata_page);
1526 }
1527 #endif
1528 
1529 static void setup_unwind_user_mode(struct thread_svc_regs *regs)
1530 {
1531 #ifdef ARM32
1532 	regs->lr = (uintptr_t)thread_unwind_user_mode;
1533 	regs->spsr = read_cpsr();
1534 #endif
1535 #ifdef ARM64
1536 	regs->elr = (uintptr_t)thread_unwind_user_mode;
1537 	regs->spsr = SPSR_64(SPSR_64_MODE_EL1, SPSR_64_MODE_SP_EL0, 0);
1538 	regs->spsr |= read_daif();
1539 	/*
1540 	 * Regs is the value of stack pointer before calling the SVC
1541 	 * handler.  By the addition matches for the reserved space at the
1542 	 * beginning of el0_sync_svc(). This prepares the stack when
1543 	 * returning to thread_unwind_user_mode instead of a normal
1544 	 * exception return.
1545 	 */
1546 	regs->sp_el0 = (uint64_t)(regs + 1);
1547 #endif
1548 }
1549 
1550 static void gprof_set_status(struct ts_session *s __maybe_unused,
1551 			     enum ts_gprof_status status __maybe_unused)
1552 {
1553 #ifdef CFG_TA_GPROF_SUPPORT
1554 	if (s->ctx->ops->gprof_set_status)
1555 		s->ctx->ops->gprof_set_status(status);
1556 #endif
1557 }
1558 
1559 /*
1560  * Note: this function is weak just to make it possible to exclude it from
1561  * the unpaged area.
1562  */
1563 void __weak thread_svc_handler(struct thread_svc_regs *regs)
1564 {
1565 	struct ts_session *sess = NULL;
1566 	uint32_t state = 0;
1567 
1568 	/* Enable native interrupts */
1569 	state = thread_get_exceptions();
1570 	thread_unmask_exceptions(state & ~THREAD_EXCP_NATIVE_INTR);
1571 
1572 	thread_user_save_vfp();
1573 
1574 	sess = ts_get_current_session();
1575 	/*
1576 	 * User mode service has just entered kernel mode, suspend gprof
1577 	 * collection until we're about to switch back again.
1578 	 */
1579 	gprof_set_status(sess, TS_GPROF_SUSPEND);
1580 
1581 	/* Restore foreign interrupts which are disabled on exception entry */
1582 	thread_restore_foreign_intr();
1583 
1584 	assert(sess && sess->handle_svc);
1585 	if (sess->handle_svc(regs)) {
1586 		/* We're about to switch back to user mode */
1587 		gprof_set_status(sess, TS_GPROF_RESUME);
1588 	} else {
1589 		/* We're returning from __thread_enter_user_mode() */
1590 		setup_unwind_user_mode(regs);
1591 	}
1592 }
1593 
1594 static struct mobj *alloc_shm(enum thread_shm_type shm_type, size_t size)
1595 {
1596 	switch (shm_type) {
1597 	case THREAD_SHM_TYPE_APPLICATION:
1598 		return thread_rpc_alloc_payload(size);
1599 	case THREAD_SHM_TYPE_KERNEL_PRIVATE:
1600 		return thread_rpc_alloc_kernel_payload(size);
1601 	case THREAD_SHM_TYPE_GLOBAL:
1602 		return thread_rpc_alloc_global_payload(size);
1603 	default:
1604 		return NULL;
1605 	}
1606 }
1607 
1608 static void clear_shm_cache_entry(struct thread_shm_cache_entry *ce)
1609 {
1610 	if (ce->mobj) {
1611 		switch (ce->type) {
1612 		case THREAD_SHM_TYPE_APPLICATION:
1613 			thread_rpc_free_payload(ce->mobj);
1614 			break;
1615 		case THREAD_SHM_TYPE_KERNEL_PRIVATE:
1616 			thread_rpc_free_kernel_payload(ce->mobj);
1617 			break;
1618 		case THREAD_SHM_TYPE_GLOBAL:
1619 			thread_rpc_free_global_payload(ce->mobj);
1620 			break;
1621 		default:
1622 			assert(0); /* "can't happen" */
1623 			break;
1624 		}
1625 	}
1626 	ce->mobj = NULL;
1627 	ce->size = 0;
1628 }
1629 
1630 static struct thread_shm_cache_entry *
1631 get_shm_cache_entry(enum thread_shm_cache_user user)
1632 {
1633 	struct thread_shm_cache *cache = &threads[thread_get_id()].shm_cache;
1634 	struct thread_shm_cache_entry *ce = NULL;
1635 
1636 	SLIST_FOREACH(ce, cache, link)
1637 		if (ce->user == user)
1638 			return ce;
1639 
1640 	ce = calloc(1, sizeof(*ce));
1641 	if (ce) {
1642 		ce->user = user;
1643 		SLIST_INSERT_HEAD(cache, ce, link);
1644 	}
1645 
1646 	return ce;
1647 }
1648 
1649 void *thread_rpc_shm_cache_alloc(enum thread_shm_cache_user user,
1650 				 enum thread_shm_type shm_type,
1651 				 size_t size, struct mobj **mobj)
1652 {
1653 	struct thread_shm_cache_entry *ce = NULL;
1654 	size_t sz = size;
1655 	paddr_t p = 0;
1656 	void *va = NULL;
1657 
1658 	if (!size)
1659 		return NULL;
1660 
1661 	ce = get_shm_cache_entry(user);
1662 	if (!ce)
1663 		return NULL;
1664 
1665 	/*
1666 	 * Always allocate in page chunks as normal world allocates payload
1667 	 * memory as complete pages.
1668 	 */
1669 	sz = ROUNDUP(size, SMALL_PAGE_SIZE);
1670 
1671 	if (ce->type != shm_type || sz > ce->size) {
1672 		clear_shm_cache_entry(ce);
1673 
1674 		ce->mobj = alloc_shm(shm_type, sz);
1675 		if (!ce->mobj)
1676 			return NULL;
1677 
1678 		if (mobj_get_pa(ce->mobj, 0, 0, &p))
1679 			goto err;
1680 
1681 		if (!ALIGNMENT_IS_OK(p, uint64_t))
1682 			goto err;
1683 
1684 		va = mobj_get_va(ce->mobj, 0);
1685 		if (!va)
1686 			goto err;
1687 
1688 		ce->size = sz;
1689 		ce->type = shm_type;
1690 	} else {
1691 		va = mobj_get_va(ce->mobj, 0);
1692 		if (!va)
1693 			goto err;
1694 	}
1695 	*mobj = ce->mobj;
1696 
1697 	return va;
1698 err:
1699 	clear_shm_cache_entry(ce);
1700 	return NULL;
1701 }
1702 
1703 void thread_rpc_shm_cache_clear(struct thread_shm_cache *cache)
1704 {
1705 	while (true) {
1706 		struct thread_shm_cache_entry *ce = SLIST_FIRST(cache);
1707 
1708 		if (!ce)
1709 			break;
1710 		SLIST_REMOVE_HEAD(cache, link);
1711 		clear_shm_cache_entry(ce);
1712 		free(ce);
1713 	}
1714 }
1715 
1716 #ifdef CFG_WITH_ARM_TRUSTED_FW
1717 /*
1718  * These five functions are __weak to allow platforms to override them if
1719  * needed.
1720  */
1721 unsigned long __weak thread_cpu_off_handler(unsigned long a0 __unused,
1722 					    unsigned long a1 __unused)
1723 {
1724 	return 0;
1725 }
1726 DECLARE_KEEP_PAGER(thread_cpu_off_handler);
1727 
1728 unsigned long __weak thread_cpu_suspend_handler(unsigned long a0 __unused,
1729 						unsigned long a1 __unused)
1730 {
1731 	return 0;
1732 }
1733 DECLARE_KEEP_PAGER(thread_cpu_suspend_handler);
1734 
1735 unsigned long __weak thread_cpu_resume_handler(unsigned long a0 __unused,
1736 					       unsigned long a1 __unused)
1737 {
1738 	return 0;
1739 }
1740 DECLARE_KEEP_PAGER(thread_cpu_resume_handler);
1741 
1742 unsigned long __weak thread_system_off_handler(unsigned long a0 __unused,
1743 					       unsigned long a1 __unused)
1744 {
1745 	return 0;
1746 }
1747 DECLARE_KEEP_PAGER(thread_system_off_handler);
1748 
1749 unsigned long __weak thread_system_reset_handler(unsigned long a0 __unused,
1750 						 unsigned long a1 __unused)
1751 {
1752 	return 0;
1753 }
1754 DECLARE_KEEP_PAGER(thread_system_reset_handler);
1755 #endif /*CFG_WITH_ARM_TRUSTED_FW*/
1756