1 // SPDX-License-Identifier: BSD-2-Clause 2 /* 3 * Copyright (c) 2016, Linaro Limited 4 * Copyright (c) 2014, STMicroelectronics International N.V. 5 */ 6 7 #include <platform_config.h> 8 9 #include <arm.h> 10 #include <assert.h> 11 #include <keep.h> 12 #include <kernel/asan.h> 13 #include <kernel/lockdep.h> 14 #include <kernel/misc.h> 15 #include <kernel/msg_param.h> 16 #include <kernel/panic.h> 17 #include <kernel/spinlock.h> 18 #include <kernel/tee_ta_manager.h> 19 #include <kernel/thread_defs.h> 20 #include <kernel/thread.h> 21 #include <mm/core_memprot.h> 22 #include <mm/mobj.h> 23 #include <mm/tee_mm.h> 24 #include <mm/tee_mmu.h> 25 #include <mm/tee_pager.h> 26 #include <optee_msg.h> 27 #include <optee_rpc_cmd.h> 28 #include <smccc.h> 29 #include <sm/optee_smc.h> 30 #include <sm/sm.h> 31 #include <tee/tee_cryp_utl.h> 32 #include <tee/tee_fs_rpc.h> 33 #include <trace.h> 34 #include <util.h> 35 36 #include "thread_private.h" 37 38 #ifdef CFG_WITH_ARM_TRUSTED_FW 39 #define STACK_TMP_OFFS 0 40 #else 41 #define STACK_TMP_OFFS SM_STACK_TMP_RESERVE_SIZE 42 #endif 43 44 45 #ifdef ARM32 46 #ifdef CFG_CORE_SANITIZE_KADDRESS 47 #define STACK_TMP_SIZE (3072 + STACK_TMP_OFFS) 48 #else 49 #define STACK_TMP_SIZE (1536 + STACK_TMP_OFFS) 50 #endif 51 #define STACK_THREAD_SIZE 8192 52 53 #ifdef CFG_CORE_SANITIZE_KADDRESS 54 #define STACK_ABT_SIZE 3072 55 #else 56 #define STACK_ABT_SIZE 2048 57 #endif 58 59 #endif /*ARM32*/ 60 61 #ifdef ARM64 62 #define STACK_TMP_SIZE (2048 + STACK_TMP_OFFS) 63 #define STACK_THREAD_SIZE 8192 64 65 #if TRACE_LEVEL > 0 66 #define STACK_ABT_SIZE 3072 67 #else 68 #define STACK_ABT_SIZE 1024 69 #endif 70 #endif /*ARM64*/ 71 72 struct thread_ctx threads[CFG_NUM_THREADS]; 73 74 struct thread_core_local thread_core_local[CFG_TEE_CORE_NB_CORE]; 75 76 #ifdef CFG_WITH_STACK_CANARIES 77 #ifdef ARM32 78 #define STACK_CANARY_SIZE (4 * sizeof(uint32_t)) 79 #endif 80 #ifdef ARM64 81 #define STACK_CANARY_SIZE (8 * sizeof(uint32_t)) 82 #endif 83 #define START_CANARY_VALUE 0xdededede 84 #define END_CANARY_VALUE 0xabababab 85 #define GET_START_CANARY(name, stack_num) name[stack_num][0] 86 #define GET_END_CANARY(name, stack_num) \ 87 name[stack_num][sizeof(name[stack_num]) / sizeof(uint32_t) - 1] 88 #else 89 #define STACK_CANARY_SIZE 0 90 #endif 91 92 #define DECLARE_STACK(name, num_stacks, stack_size, linkage) \ 93 linkage uint32_t name[num_stacks] \ 94 [ROUNDUP(stack_size + STACK_CANARY_SIZE, STACK_ALIGNMENT) / \ 95 sizeof(uint32_t)] \ 96 __attribute__((section(".nozi_stack." # name), \ 97 aligned(STACK_ALIGNMENT))) 98 99 #define STACK_SIZE(stack) (sizeof(stack) - STACK_CANARY_SIZE / 2) 100 101 #define GET_STACK(stack) \ 102 ((vaddr_t)(stack) + STACK_SIZE(stack)) 103 104 DECLARE_STACK(stack_tmp, CFG_TEE_CORE_NB_CORE, STACK_TMP_SIZE, static); 105 DECLARE_STACK(stack_abt, CFG_TEE_CORE_NB_CORE, STACK_ABT_SIZE, static); 106 #ifndef CFG_WITH_PAGER 107 DECLARE_STACK(stack_thread, CFG_NUM_THREADS, STACK_THREAD_SIZE, static); 108 #endif 109 110 const void *stack_tmp_export = (uint8_t *)stack_tmp + sizeof(stack_tmp[0]) - 111 (STACK_TMP_OFFS + STACK_CANARY_SIZE / 2); 112 const uint32_t stack_tmp_stride = sizeof(stack_tmp[0]); 113 114 /* 115 * These stack setup info are required by secondary boot cores before they 116 * each locally enable the pager (the mmu). Hence kept in pager sections. 117 */ 118 KEEP_PAGER(stack_tmp_export); 119 KEEP_PAGER(stack_tmp_stride); 120 121 thread_smc_handler_t thread_std_smc_handler_ptr; 122 static thread_smc_handler_t thread_fast_smc_handler_ptr; 123 thread_nintr_handler_t thread_nintr_handler_ptr; 124 thread_pm_handler_t thread_cpu_on_handler_ptr; 125 thread_pm_handler_t thread_cpu_off_handler_ptr; 126 thread_pm_handler_t thread_cpu_suspend_handler_ptr; 127 thread_pm_handler_t thread_cpu_resume_handler_ptr; 128 thread_pm_handler_t thread_system_off_handler_ptr; 129 thread_pm_handler_t thread_system_reset_handler_ptr; 130 131 #ifdef CFG_CORE_UNMAP_CORE_AT_EL0 132 static vaddr_t thread_user_kcode_va; 133 long thread_user_kcode_offset; 134 static size_t thread_user_kcode_size; 135 #endif 136 137 #if defined(CFG_CORE_UNMAP_CORE_AT_EL0) && \ 138 defined(CFG_CORE_WORKAROUND_SPECTRE_BP_SEC) && defined(ARM64) 139 long thread_user_kdata_sp_offset; 140 static uint8_t thread_user_kdata_page[ 141 ROUNDUP(sizeof(thread_core_local), SMALL_PAGE_SIZE)] 142 __aligned(SMALL_PAGE_SIZE) __section(".nozi.kdata_page"); 143 #endif 144 145 static unsigned int thread_global_lock = SPINLOCK_UNLOCK; 146 static bool thread_prealloc_rpc_cache; 147 148 static unsigned int thread_rpc_pnum; 149 150 static void init_canaries(void) 151 { 152 #ifdef CFG_WITH_STACK_CANARIES 153 size_t n; 154 #define INIT_CANARY(name) \ 155 for (n = 0; n < ARRAY_SIZE(name); n++) { \ 156 uint32_t *start_canary = &GET_START_CANARY(name, n); \ 157 uint32_t *end_canary = &GET_END_CANARY(name, n); \ 158 \ 159 *start_canary = START_CANARY_VALUE; \ 160 *end_canary = END_CANARY_VALUE; \ 161 DMSG("#Stack canaries for %s[%zu] with top at %p\n", \ 162 #name, n, (void *)(end_canary - 1)); \ 163 DMSG("watch *%p\n", (void *)end_canary); \ 164 } 165 166 INIT_CANARY(stack_tmp); 167 INIT_CANARY(stack_abt); 168 #ifndef CFG_WITH_PAGER 169 INIT_CANARY(stack_thread); 170 #endif 171 #endif/*CFG_WITH_STACK_CANARIES*/ 172 } 173 174 #define CANARY_DIED(stack, loc, n) \ 175 do { \ 176 EMSG_RAW("Dead canary at %s of '%s[%zu]'", #loc, #stack, n); \ 177 panic(); \ 178 } while (0) 179 180 void thread_check_canaries(void) 181 { 182 #ifdef CFG_WITH_STACK_CANARIES 183 size_t n; 184 185 for (n = 0; n < ARRAY_SIZE(stack_tmp); n++) { 186 if (GET_START_CANARY(stack_tmp, n) != START_CANARY_VALUE) 187 CANARY_DIED(stack_tmp, start, n); 188 if (GET_END_CANARY(stack_tmp, n) != END_CANARY_VALUE) 189 CANARY_DIED(stack_tmp, end, n); 190 } 191 192 for (n = 0; n < ARRAY_SIZE(stack_abt); n++) { 193 if (GET_START_CANARY(stack_abt, n) != START_CANARY_VALUE) 194 CANARY_DIED(stack_abt, start, n); 195 if (GET_END_CANARY(stack_abt, n) != END_CANARY_VALUE) 196 CANARY_DIED(stack_abt, end, n); 197 198 } 199 #ifndef CFG_WITH_PAGER 200 for (n = 0; n < ARRAY_SIZE(stack_thread); n++) { 201 if (GET_START_CANARY(stack_thread, n) != START_CANARY_VALUE) 202 CANARY_DIED(stack_thread, start, n); 203 if (GET_END_CANARY(stack_thread, n) != END_CANARY_VALUE) 204 CANARY_DIED(stack_thread, end, n); 205 } 206 #endif 207 #endif/*CFG_WITH_STACK_CANARIES*/ 208 } 209 210 static void lock_global(void) 211 { 212 cpu_spin_lock(&thread_global_lock); 213 } 214 215 static void unlock_global(void) 216 { 217 cpu_spin_unlock(&thread_global_lock); 218 } 219 220 #ifdef ARM32 221 uint32_t thread_get_exceptions(void) 222 { 223 uint32_t cpsr = read_cpsr(); 224 225 return (cpsr >> CPSR_F_SHIFT) & THREAD_EXCP_ALL; 226 } 227 228 void thread_set_exceptions(uint32_t exceptions) 229 { 230 uint32_t cpsr = read_cpsr(); 231 232 /* Foreign interrupts must not be unmasked while holding a spinlock */ 233 if (!(exceptions & THREAD_EXCP_FOREIGN_INTR)) 234 assert_have_no_spinlock(); 235 236 cpsr &= ~(THREAD_EXCP_ALL << CPSR_F_SHIFT); 237 cpsr |= ((exceptions & THREAD_EXCP_ALL) << CPSR_F_SHIFT); 238 write_cpsr(cpsr); 239 } 240 #endif /*ARM32*/ 241 242 #ifdef ARM64 243 uint32_t thread_get_exceptions(void) 244 { 245 uint32_t daif = read_daif(); 246 247 return (daif >> DAIF_F_SHIFT) & THREAD_EXCP_ALL; 248 } 249 250 void thread_set_exceptions(uint32_t exceptions) 251 { 252 uint32_t daif = read_daif(); 253 254 /* Foreign interrupts must not be unmasked while holding a spinlock */ 255 if (!(exceptions & THREAD_EXCP_FOREIGN_INTR)) 256 assert_have_no_spinlock(); 257 258 daif &= ~(THREAD_EXCP_ALL << DAIF_F_SHIFT); 259 daif |= ((exceptions & THREAD_EXCP_ALL) << DAIF_F_SHIFT); 260 write_daif(daif); 261 } 262 #endif /*ARM64*/ 263 264 uint32_t thread_mask_exceptions(uint32_t exceptions) 265 { 266 uint32_t state = thread_get_exceptions(); 267 268 thread_set_exceptions(state | (exceptions & THREAD_EXCP_ALL)); 269 return state; 270 } 271 272 void thread_unmask_exceptions(uint32_t state) 273 { 274 thread_set_exceptions(state & THREAD_EXCP_ALL); 275 } 276 277 278 struct thread_core_local *thread_get_core_local(void) 279 { 280 uint32_t cpu_id = get_core_pos(); 281 282 /* 283 * Foreign interrupts must be disabled before playing with core_local 284 * since we otherwise may be rescheduled to a different core in the 285 * middle of this function. 286 */ 287 assert(thread_get_exceptions() & THREAD_EXCP_FOREIGN_INTR); 288 289 assert(cpu_id < CFG_TEE_CORE_NB_CORE); 290 return &thread_core_local[cpu_id]; 291 } 292 293 static void thread_lazy_save_ns_vfp(void) 294 { 295 #ifdef CFG_WITH_VFP 296 struct thread_ctx *thr = threads + thread_get_id(); 297 298 thr->vfp_state.ns_saved = false; 299 #if defined(CFG_WITH_ARM_TRUSTED_FW) 300 /* 301 * ARM TF saves and restores CPACR_EL1, so we must assume NS world 302 * uses VFP and always preserve the register file when secure world 303 * is about to use it 304 */ 305 thr->vfp_state.ns_force_save = true; 306 #endif 307 vfp_lazy_save_state_init(&thr->vfp_state.ns); 308 #endif /*CFG_WITH_VFP*/ 309 } 310 311 static void thread_lazy_restore_ns_vfp(void) 312 { 313 #ifdef CFG_WITH_VFP 314 struct thread_ctx *thr = threads + thread_get_id(); 315 struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp; 316 317 assert(!thr->vfp_state.sec_lazy_saved && !thr->vfp_state.sec_saved); 318 319 if (tuv && tuv->lazy_saved && !tuv->saved) { 320 vfp_lazy_save_state_final(&tuv->vfp, false /*!force_save*/); 321 tuv->saved = true; 322 } 323 324 vfp_lazy_restore_state(&thr->vfp_state.ns, thr->vfp_state.ns_saved); 325 thr->vfp_state.ns_saved = false; 326 #endif /*CFG_WITH_VFP*/ 327 } 328 329 #ifdef ARM32 330 static void init_regs(struct thread_ctx *thread, 331 struct thread_smc_args *args) 332 { 333 thread->regs.pc = (uint32_t)thread_std_smc_entry; 334 335 /* 336 * Stdcalls starts in SVC mode with masked foreign interrupts, masked 337 * Asynchronous abort and unmasked native interrupts. 338 */ 339 thread->regs.cpsr = read_cpsr() & ARM32_CPSR_E; 340 thread->regs.cpsr |= CPSR_MODE_SVC | CPSR_A | 341 (THREAD_EXCP_FOREIGN_INTR << ARM32_CPSR_F_SHIFT); 342 /* Enable thumb mode if it's a thumb instruction */ 343 if (thread->regs.pc & 1) 344 thread->regs.cpsr |= CPSR_T; 345 /* Reinitialize stack pointer */ 346 thread->regs.svc_sp = thread->stack_va_end; 347 348 /* 349 * Copy arguments into context. This will make the 350 * arguments appear in r0-r7 when thread is started. 351 */ 352 thread->regs.r0 = args->a0; 353 thread->regs.r1 = args->a1; 354 thread->regs.r2 = args->a2; 355 thread->regs.r3 = args->a3; 356 thread->regs.r4 = args->a4; 357 thread->regs.r5 = args->a5; 358 thread->regs.r6 = args->a6; 359 thread->regs.r7 = args->a7; 360 } 361 #endif /*ARM32*/ 362 363 #ifdef ARM64 364 static void init_regs(struct thread_ctx *thread, 365 struct thread_smc_args *args) 366 { 367 thread->regs.pc = (uint64_t)thread_std_smc_entry; 368 369 /* 370 * Stdcalls starts in SVC mode with masked foreign interrupts, masked 371 * Asynchronous abort and unmasked native interrupts. 372 */ 373 thread->regs.cpsr = SPSR_64(SPSR_64_MODE_EL1, SPSR_64_MODE_SP_EL0, 374 THREAD_EXCP_FOREIGN_INTR | DAIFBIT_ABT); 375 /* Reinitialize stack pointer */ 376 thread->regs.sp = thread->stack_va_end; 377 378 /* 379 * Copy arguments into context. This will make the 380 * arguments appear in x0-x7 when thread is started. 381 */ 382 thread->regs.x[0] = args->a0; 383 thread->regs.x[1] = args->a1; 384 thread->regs.x[2] = args->a2; 385 thread->regs.x[3] = args->a3; 386 thread->regs.x[4] = args->a4; 387 thread->regs.x[5] = args->a5; 388 thread->regs.x[6] = args->a6; 389 thread->regs.x[7] = args->a7; 390 391 /* Set up frame pointer as per the Aarch64 AAPCS */ 392 thread->regs.x[29] = 0; 393 } 394 #endif /*ARM64*/ 395 396 void thread_init_boot_thread(void) 397 { 398 struct thread_core_local *l = thread_get_core_local(); 399 size_t n; 400 401 mutex_lockdep_init(); 402 403 for (n = 0; n < CFG_NUM_THREADS; n++) { 404 TAILQ_INIT(&threads[n].tsd.sess_stack); 405 SLIST_INIT(&threads[n].tsd.pgt_cache); 406 } 407 408 for (n = 0; n < CFG_TEE_CORE_NB_CORE; n++) 409 thread_core_local[n].curr_thread = -1; 410 411 l->curr_thread = 0; 412 threads[0].state = THREAD_STATE_ACTIVE; 413 } 414 415 void thread_clr_boot_thread(void) 416 { 417 struct thread_core_local *l = thread_get_core_local(); 418 419 assert(l->curr_thread >= 0 && l->curr_thread < CFG_NUM_THREADS); 420 assert(threads[l->curr_thread].state == THREAD_STATE_ACTIVE); 421 threads[l->curr_thread].state = THREAD_STATE_FREE; 422 l->curr_thread = -1; 423 } 424 425 static void thread_alloc_and_run(struct thread_smc_args *args) 426 { 427 size_t n; 428 struct thread_core_local *l = thread_get_core_local(); 429 bool found_thread = false; 430 431 assert(l->curr_thread == -1); 432 433 lock_global(); 434 435 for (n = 0; n < CFG_NUM_THREADS; n++) { 436 if (threads[n].state == THREAD_STATE_FREE) { 437 threads[n].state = THREAD_STATE_ACTIVE; 438 found_thread = true; 439 break; 440 } 441 } 442 443 unlock_global(); 444 445 if (!found_thread) { 446 args->a0 = OPTEE_SMC_RETURN_ETHREAD_LIMIT; 447 return; 448 } 449 450 l->curr_thread = n; 451 452 threads[n].flags = 0; 453 init_regs(threads + n, args); 454 455 /* Save Hypervisor Client ID */ 456 threads[n].hyp_clnt_id = args->a7; 457 458 thread_lazy_save_ns_vfp(); 459 thread_resume(&threads[n].regs); 460 } 461 462 #ifdef ARM32 463 static void copy_a0_to_a5(struct thread_ctx_regs *regs, 464 struct thread_smc_args *args) 465 { 466 /* 467 * Update returned values from RPC, values will appear in 468 * r0-r3 when thread is resumed. 469 */ 470 regs->r0 = args->a0; 471 regs->r1 = args->a1; 472 regs->r2 = args->a2; 473 regs->r3 = args->a3; 474 regs->r4 = args->a4; 475 regs->r5 = args->a5; 476 } 477 #endif /*ARM32*/ 478 479 #ifdef ARM64 480 static void copy_a0_to_a5(struct thread_ctx_regs *regs, 481 struct thread_smc_args *args) 482 { 483 /* 484 * Update returned values from RPC, values will appear in 485 * x0-x3 when thread is resumed. 486 */ 487 regs->x[0] = args->a0; 488 regs->x[1] = args->a1; 489 regs->x[2] = args->a2; 490 regs->x[3] = args->a3; 491 regs->x[4] = args->a4; 492 regs->x[5] = args->a5; 493 } 494 #endif /*ARM64*/ 495 496 #ifdef ARM32 497 static bool is_from_user(uint32_t cpsr) 498 { 499 return (cpsr & ARM32_CPSR_MODE_MASK) == ARM32_CPSR_MODE_USR; 500 } 501 #endif 502 503 #ifdef ARM64 504 static bool is_from_user(uint32_t cpsr) 505 { 506 if (cpsr & (SPSR_MODE_RW_32 << SPSR_MODE_RW_SHIFT)) 507 return true; 508 if (((cpsr >> SPSR_64_MODE_EL_SHIFT) & SPSR_64_MODE_EL_MASK) == 509 SPSR_64_MODE_EL0) 510 return true; 511 return false; 512 } 513 #endif 514 515 static bool is_user_mode(struct thread_ctx_regs *regs) 516 { 517 return is_from_user((uint32_t)regs->cpsr); 518 } 519 520 static void thread_resume_from_rpc(struct thread_smc_args *args) 521 { 522 size_t n = args->a3; /* thread id */ 523 struct thread_core_local *l = thread_get_core_local(); 524 uint32_t rv = 0; 525 526 assert(l->curr_thread == -1); 527 528 lock_global(); 529 530 if (n < CFG_NUM_THREADS && 531 threads[n].state == THREAD_STATE_SUSPENDED && 532 args->a7 == threads[n].hyp_clnt_id) 533 threads[n].state = THREAD_STATE_ACTIVE; 534 else 535 rv = OPTEE_SMC_RETURN_ERESUME; 536 537 unlock_global(); 538 539 if (rv) { 540 args->a0 = rv; 541 return; 542 } 543 544 l->curr_thread = n; 545 546 if (is_user_mode(&threads[n].regs)) 547 tee_ta_update_session_utime_resume(); 548 549 if (threads[n].have_user_map) 550 core_mmu_set_user_map(&threads[n].user_map); 551 552 /* 553 * Return from RPC to request service of a foreign interrupt must not 554 * get parameters from non-secure world. 555 */ 556 if (threads[n].flags & THREAD_FLAGS_COPY_ARGS_ON_RETURN) { 557 copy_a0_to_a5(&threads[n].regs, args); 558 threads[n].flags &= ~THREAD_FLAGS_COPY_ARGS_ON_RETURN; 559 } 560 561 thread_lazy_save_ns_vfp(); 562 thread_resume(&threads[n].regs); 563 } 564 565 void thread_handle_fast_smc(struct thread_smc_args *args) 566 { 567 thread_check_canaries(); 568 thread_fast_smc_handler_ptr(args); 569 /* Fast handlers must not unmask any exceptions */ 570 assert(thread_get_exceptions() == THREAD_EXCP_ALL); 571 } 572 573 void thread_handle_std_smc(struct thread_smc_args *args) 574 { 575 thread_check_canaries(); 576 577 if (args->a0 == OPTEE_SMC_CALL_RETURN_FROM_RPC) 578 thread_resume_from_rpc(args); 579 else 580 thread_alloc_and_run(args); 581 } 582 583 /** 584 * Free physical memory previously allocated with thread_rpc_alloc_arg() 585 * 586 * @cookie: cookie received when allocating the buffer 587 */ 588 static void thread_rpc_free_arg(uint64_t cookie) 589 { 590 if (cookie) { 591 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { 592 OPTEE_SMC_RETURN_RPC_FREE 593 }; 594 595 reg_pair_from_64(cookie, rpc_args + 1, rpc_args + 2); 596 thread_rpc(rpc_args); 597 } 598 } 599 600 /* 601 * Helper routine for the assembly function thread_std_smc_entry() 602 * 603 * Note: this function is weak just to make it possible to exclude it from 604 * the unpaged area. 605 */ 606 void __weak __thread_std_smc_entry(struct thread_smc_args *args) 607 { 608 thread_std_smc_handler_ptr(args); 609 610 if (args->a0 == OPTEE_SMC_RETURN_OK) { 611 struct thread_ctx *thr = threads + thread_get_id(); 612 613 tee_fs_rpc_cache_clear(&thr->tsd); 614 if (!thread_prealloc_rpc_cache) { 615 thread_rpc_free_arg(mobj_get_cookie(thr->rpc_mobj)); 616 mobj_free(thr->rpc_mobj); 617 thr->rpc_arg = 0; 618 thr->rpc_mobj = NULL; 619 } 620 } 621 } 622 623 void *thread_get_tmp_sp(void) 624 { 625 struct thread_core_local *l = thread_get_core_local(); 626 627 return (void *)l->tmp_stack_va_end; 628 } 629 630 #ifdef ARM64 631 vaddr_t thread_get_saved_thread_sp(void) 632 { 633 struct thread_core_local *l = thread_get_core_local(); 634 int ct = l->curr_thread; 635 636 assert(ct != -1); 637 return threads[ct].kern_sp; 638 } 639 #endif /*ARM64*/ 640 641 vaddr_t thread_stack_start(void) 642 { 643 struct thread_ctx *thr; 644 int ct = thread_get_id_may_fail(); 645 646 if (ct == -1) 647 return 0; 648 649 thr = threads + ct; 650 return thr->stack_va_end - STACK_THREAD_SIZE; 651 } 652 653 size_t thread_stack_size(void) 654 { 655 return STACK_THREAD_SIZE; 656 } 657 658 bool thread_is_from_abort_mode(void) 659 { 660 struct thread_core_local *l = thread_get_core_local(); 661 662 return (l->flags >> THREAD_CLF_SAVED_SHIFT) & THREAD_CLF_ABORT; 663 } 664 665 #ifdef ARM32 666 bool thread_is_in_normal_mode(void) 667 { 668 return (read_cpsr() & ARM32_CPSR_MODE_MASK) == ARM32_CPSR_MODE_SVC; 669 } 670 #endif 671 672 #ifdef ARM64 673 bool thread_is_in_normal_mode(void) 674 { 675 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR); 676 struct thread_core_local *l = thread_get_core_local(); 677 bool ret; 678 679 /* If any bit in l->flags is set we're handling some exception. */ 680 ret = !l->flags; 681 thread_unmask_exceptions(exceptions); 682 683 return ret; 684 } 685 #endif 686 687 void thread_state_free(void) 688 { 689 struct thread_core_local *l = thread_get_core_local(); 690 int ct = l->curr_thread; 691 692 assert(ct != -1); 693 694 thread_lazy_restore_ns_vfp(); 695 tee_pager_release_phys( 696 (void *)(threads[ct].stack_va_end - STACK_THREAD_SIZE), 697 STACK_THREAD_SIZE); 698 699 lock_global(); 700 701 assert(threads[ct].state == THREAD_STATE_ACTIVE); 702 threads[ct].state = THREAD_STATE_FREE; 703 threads[ct].flags = 0; 704 l->curr_thread = -1; 705 706 unlock_global(); 707 } 708 709 #ifdef CFG_WITH_PAGER 710 static void release_unused_kernel_stack(struct thread_ctx *thr, 711 uint32_t cpsr __maybe_unused) 712 { 713 #ifdef ARM64 714 /* 715 * If we're from user mode then thr->regs.sp is the saved user 716 * stack pointer and thr->kern_sp holds the last kernel stack 717 * pointer. But if we're from kernel mode then thr->kern_sp isn't 718 * up to date so we need to read from thr->regs.sp instead. 719 */ 720 vaddr_t sp = is_from_user(cpsr) ? thr->kern_sp : thr->regs.sp; 721 #else 722 vaddr_t sp = thr->regs.svc_sp; 723 #endif 724 vaddr_t base = thr->stack_va_end - STACK_THREAD_SIZE; 725 size_t len = sp - base; 726 727 tee_pager_release_phys((void *)base, len); 728 } 729 #else 730 static void release_unused_kernel_stack(struct thread_ctx *thr __unused, 731 uint32_t cpsr __unused) 732 { 733 } 734 #endif 735 736 int thread_state_suspend(uint32_t flags, uint32_t cpsr, vaddr_t pc) 737 { 738 struct thread_core_local *l = thread_get_core_local(); 739 int ct = l->curr_thread; 740 741 assert(ct != -1); 742 743 thread_check_canaries(); 744 745 release_unused_kernel_stack(threads + ct, cpsr); 746 747 if (is_from_user(cpsr)) { 748 thread_user_save_vfp(); 749 tee_ta_update_session_utime_suspend(); 750 tee_ta_gprof_sample_pc(pc); 751 } 752 thread_lazy_restore_ns_vfp(); 753 754 lock_global(); 755 756 assert(threads[ct].state == THREAD_STATE_ACTIVE); 757 threads[ct].flags |= flags; 758 threads[ct].regs.cpsr = cpsr; 759 threads[ct].regs.pc = pc; 760 threads[ct].state = THREAD_STATE_SUSPENDED; 761 762 threads[ct].have_user_map = core_mmu_user_mapping_is_active(); 763 if (threads[ct].have_user_map) { 764 core_mmu_get_user_map(&threads[ct].user_map); 765 core_mmu_set_user_map(NULL); 766 } 767 768 l->curr_thread = -1; 769 770 unlock_global(); 771 772 return ct; 773 } 774 775 #ifdef ARM32 776 static void set_tmp_stack(struct thread_core_local *l, vaddr_t sp) 777 { 778 l->tmp_stack_va_end = sp; 779 thread_set_irq_sp(sp); 780 thread_set_fiq_sp(sp); 781 } 782 783 static void set_abt_stack(struct thread_core_local *l, vaddr_t sp) 784 { 785 l->abt_stack_va_end = sp; 786 thread_set_abt_sp((vaddr_t)l); 787 thread_set_und_sp((vaddr_t)l); 788 } 789 #endif /*ARM32*/ 790 791 #ifdef ARM64 792 static void set_tmp_stack(struct thread_core_local *l, vaddr_t sp) 793 { 794 /* 795 * We're already using the tmp stack when this function is called 796 * so there's no need to assign it to any stack pointer. However, 797 * we'll need to restore it at different times so store it here. 798 */ 799 l->tmp_stack_va_end = sp; 800 } 801 802 static void set_abt_stack(struct thread_core_local *l, vaddr_t sp) 803 { 804 l->abt_stack_va_end = sp; 805 } 806 #endif /*ARM64*/ 807 808 bool thread_init_stack(uint32_t thread_id, vaddr_t sp) 809 { 810 if (thread_id >= CFG_NUM_THREADS) 811 return false; 812 threads[thread_id].stack_va_end = sp; 813 return true; 814 } 815 816 int thread_get_id_may_fail(void) 817 { 818 /* 819 * thread_get_core_local() requires foreign interrupts to be disabled 820 */ 821 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR); 822 struct thread_core_local *l = thread_get_core_local(); 823 int ct = l->curr_thread; 824 825 thread_unmask_exceptions(exceptions); 826 return ct; 827 } 828 829 int thread_get_id(void) 830 { 831 int ct = thread_get_id_may_fail(); 832 833 assert(ct >= 0 && ct < CFG_NUM_THREADS); 834 return ct; 835 } 836 837 static void init_handlers(const struct thread_handlers *handlers) 838 { 839 thread_std_smc_handler_ptr = handlers->std_smc; 840 thread_fast_smc_handler_ptr = handlers->fast_smc; 841 thread_nintr_handler_ptr = handlers->nintr; 842 thread_cpu_on_handler_ptr = handlers->cpu_on; 843 thread_cpu_off_handler_ptr = handlers->cpu_off; 844 thread_cpu_suspend_handler_ptr = handlers->cpu_suspend; 845 thread_cpu_resume_handler_ptr = handlers->cpu_resume; 846 thread_system_off_handler_ptr = handlers->system_off; 847 thread_system_reset_handler_ptr = handlers->system_reset; 848 } 849 850 #ifdef CFG_WITH_PAGER 851 static void init_thread_stacks(void) 852 { 853 size_t n; 854 855 /* 856 * Allocate virtual memory for thread stacks. 857 */ 858 for (n = 0; n < CFG_NUM_THREADS; n++) { 859 tee_mm_entry_t *mm; 860 vaddr_t sp; 861 862 /* Find vmem for thread stack and its protection gap */ 863 mm = tee_mm_alloc(&tee_mm_vcore, 864 SMALL_PAGE_SIZE + STACK_THREAD_SIZE); 865 assert(mm); 866 867 /* Claim eventual physical page */ 868 tee_pager_add_pages(tee_mm_get_smem(mm), tee_mm_get_size(mm), 869 true); 870 871 /* Add the area to the pager */ 872 tee_pager_add_core_area(tee_mm_get_smem(mm) + SMALL_PAGE_SIZE, 873 tee_mm_get_bytes(mm) - SMALL_PAGE_SIZE, 874 TEE_MATTR_PRW | TEE_MATTR_LOCKED, 875 NULL, NULL); 876 877 /* init effective stack */ 878 sp = tee_mm_get_smem(mm) + tee_mm_get_bytes(mm); 879 asan_tag_access((void *)tee_mm_get_smem(mm), (void *)sp); 880 if (!thread_init_stack(n, sp)) 881 panic("init stack failed"); 882 } 883 } 884 #else 885 static void init_thread_stacks(void) 886 { 887 size_t n; 888 889 /* Assign the thread stacks */ 890 for (n = 0; n < CFG_NUM_THREADS; n++) { 891 if (!thread_init_stack(n, GET_STACK(stack_thread[n]))) 892 panic("thread_init_stack failed"); 893 } 894 } 895 #endif /*CFG_WITH_PAGER*/ 896 897 static void init_user_kcode(void) 898 { 899 #ifdef CFG_CORE_UNMAP_CORE_AT_EL0 900 vaddr_t v = (vaddr_t)thread_excp_vect; 901 vaddr_t ve = (vaddr_t)thread_excp_vect_end; 902 903 thread_user_kcode_va = ROUNDDOWN(v, CORE_MMU_USER_CODE_SIZE); 904 ve = ROUNDUP(ve, CORE_MMU_USER_CODE_SIZE); 905 thread_user_kcode_size = ve - thread_user_kcode_va; 906 907 core_mmu_get_user_va_range(&v, NULL); 908 thread_user_kcode_offset = thread_user_kcode_va - v; 909 910 #if defined(CFG_CORE_WORKAROUND_SPECTRE_BP_SEC) && defined(ARM64) 911 /* 912 * When transitioning to EL0 subtract SP with this much to point to 913 * this special kdata page instead. SP is restored by add this much 914 * while transitioning back to EL1. 915 */ 916 v += thread_user_kcode_size; 917 thread_user_kdata_sp_offset = (vaddr_t)thread_core_local - v; 918 #endif 919 #endif /*CFG_CORE_UNMAP_CORE_AT_EL0*/ 920 } 921 922 void thread_init_primary(const struct thread_handlers *handlers) 923 { 924 init_handlers(handlers); 925 926 /* Initialize canaries around the stacks */ 927 init_canaries(); 928 929 init_thread_stacks(); 930 pgt_init(); 931 932 init_user_kcode(); 933 } 934 935 static void init_sec_mon(size_t pos __maybe_unused) 936 { 937 #if !defined(CFG_WITH_ARM_TRUSTED_FW) 938 /* Initialize secure monitor */ 939 sm_init(GET_STACK(stack_tmp[pos])); 940 #endif 941 } 942 943 static uint32_t __maybe_unused get_midr_implementer(uint32_t midr) 944 { 945 return (midr >> MIDR_IMPLEMENTER_SHIFT) & MIDR_IMPLEMENTER_MASK; 946 } 947 948 static uint32_t __maybe_unused get_midr_primary_part(uint32_t midr) 949 { 950 return (midr >> MIDR_PRIMARY_PART_NUM_SHIFT) & 951 MIDR_PRIMARY_PART_NUM_MASK; 952 } 953 954 #ifdef ARM64 955 static bool probe_workaround_available(void) 956 { 957 int32_t r; 958 959 r = thread_smc(SMCCC_VERSION, 0, 0, 0); 960 if (r < 0) 961 return false; 962 if (r < 0x10001) /* compare with version 1.1 */ 963 return false; 964 965 /* Version >= 1.1, so SMCCC_ARCH_FEATURES is available */ 966 r = thread_smc(SMCCC_ARCH_FEATURES, SMCCC_ARCH_WORKAROUND_1, 0, 0); 967 return r >= 0; 968 } 969 970 static vaddr_t __maybe_unused select_vector(vaddr_t a) 971 { 972 if (probe_workaround_available()) { 973 DMSG("SMCCC_ARCH_WORKAROUND_1 (%#08" PRIx32 ") available", 974 SMCCC_ARCH_WORKAROUND_1); 975 DMSG("SMC Workaround for CVE-2017-5715 used"); 976 return a; 977 } 978 979 DMSG("SMCCC_ARCH_WORKAROUND_1 (%#08" PRIx32 ") unavailable", 980 SMCCC_ARCH_WORKAROUND_1); 981 DMSG("SMC Workaround for CVE-2017-5715 not needed (if ARM-TF is up to date)"); 982 return (vaddr_t)thread_excp_vect; 983 } 984 #else 985 static vaddr_t __maybe_unused select_vector(vaddr_t a) 986 { 987 return a; 988 } 989 #endif 990 991 static vaddr_t get_excp_vect(void) 992 { 993 #ifdef CFG_CORE_WORKAROUND_SPECTRE_BP_SEC 994 uint32_t midr = read_midr(); 995 996 if (get_midr_implementer(midr) != MIDR_IMPLEMENTER_ARM) 997 return (vaddr_t)thread_excp_vect; 998 999 switch (get_midr_primary_part(midr)) { 1000 #ifdef ARM32 1001 case CORTEX_A8_PART_NUM: 1002 case CORTEX_A9_PART_NUM: 1003 case CORTEX_A17_PART_NUM: 1004 #endif 1005 case CORTEX_A57_PART_NUM: 1006 case CORTEX_A72_PART_NUM: 1007 case CORTEX_A73_PART_NUM: 1008 case CORTEX_A75_PART_NUM: 1009 return select_vector((vaddr_t)thread_excp_vect_workaround); 1010 #ifdef ARM32 1011 case CORTEX_A15_PART_NUM: 1012 return select_vector((vaddr_t)thread_excp_vect_workaround_a15); 1013 #endif 1014 default: 1015 return (vaddr_t)thread_excp_vect; 1016 } 1017 #endif /*CFG_CORE_WORKAROUND_SPECTRE_BP_SEC*/ 1018 1019 return (vaddr_t)thread_excp_vect; 1020 } 1021 1022 void thread_init_per_cpu(void) 1023 { 1024 size_t pos = get_core_pos(); 1025 struct thread_core_local *l = thread_get_core_local(); 1026 1027 init_sec_mon(pos); 1028 1029 set_tmp_stack(l, GET_STACK(stack_tmp[pos]) - STACK_TMP_OFFS); 1030 set_abt_stack(l, GET_STACK(stack_abt[pos])); 1031 1032 thread_init_vbar(get_excp_vect()); 1033 } 1034 1035 struct thread_specific_data *thread_get_tsd(void) 1036 { 1037 return &threads[thread_get_id()].tsd; 1038 } 1039 1040 struct thread_ctx_regs *thread_get_ctx_regs(void) 1041 { 1042 struct thread_core_local *l = thread_get_core_local(); 1043 1044 assert(l->curr_thread != -1); 1045 return &threads[l->curr_thread].regs; 1046 } 1047 1048 void thread_set_foreign_intr(bool enable) 1049 { 1050 /* thread_get_core_local() requires foreign interrupts to be disabled */ 1051 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR); 1052 struct thread_core_local *l; 1053 1054 l = thread_get_core_local(); 1055 1056 assert(l->curr_thread != -1); 1057 1058 if (enable) { 1059 threads[l->curr_thread].flags |= 1060 THREAD_FLAGS_FOREIGN_INTR_ENABLE; 1061 thread_set_exceptions(exceptions & ~THREAD_EXCP_FOREIGN_INTR); 1062 } else { 1063 /* 1064 * No need to disable foreign interrupts here since they're 1065 * already disabled above. 1066 */ 1067 threads[l->curr_thread].flags &= 1068 ~THREAD_FLAGS_FOREIGN_INTR_ENABLE; 1069 } 1070 } 1071 1072 void thread_restore_foreign_intr(void) 1073 { 1074 /* thread_get_core_local() requires foreign interrupts to be disabled */ 1075 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR); 1076 struct thread_core_local *l; 1077 1078 l = thread_get_core_local(); 1079 1080 assert(l->curr_thread != -1); 1081 1082 if (threads[l->curr_thread].flags & THREAD_FLAGS_FOREIGN_INTR_ENABLE) 1083 thread_set_exceptions(exceptions & ~THREAD_EXCP_FOREIGN_INTR); 1084 } 1085 1086 #ifdef CFG_WITH_VFP 1087 uint32_t thread_kernel_enable_vfp(void) 1088 { 1089 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR); 1090 struct thread_ctx *thr = threads + thread_get_id(); 1091 struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp; 1092 1093 assert(!vfp_is_enabled()); 1094 1095 if (!thr->vfp_state.ns_saved) { 1096 vfp_lazy_save_state_final(&thr->vfp_state.ns, 1097 thr->vfp_state.ns_force_save); 1098 thr->vfp_state.ns_saved = true; 1099 } else if (thr->vfp_state.sec_lazy_saved && 1100 !thr->vfp_state.sec_saved) { 1101 /* 1102 * This happens when we're handling an abort while the 1103 * thread was using the VFP state. 1104 */ 1105 vfp_lazy_save_state_final(&thr->vfp_state.sec, 1106 false /*!force_save*/); 1107 thr->vfp_state.sec_saved = true; 1108 } else if (tuv && tuv->lazy_saved && !tuv->saved) { 1109 /* 1110 * This can happen either during syscall or abort 1111 * processing (while processing a syscall). 1112 */ 1113 vfp_lazy_save_state_final(&tuv->vfp, false /*!force_save*/); 1114 tuv->saved = true; 1115 } 1116 1117 vfp_enable(); 1118 return exceptions; 1119 } 1120 1121 void thread_kernel_disable_vfp(uint32_t state) 1122 { 1123 uint32_t exceptions; 1124 1125 assert(vfp_is_enabled()); 1126 1127 vfp_disable(); 1128 exceptions = thread_get_exceptions(); 1129 assert(exceptions & THREAD_EXCP_FOREIGN_INTR); 1130 exceptions &= ~THREAD_EXCP_FOREIGN_INTR; 1131 exceptions |= state & THREAD_EXCP_FOREIGN_INTR; 1132 thread_set_exceptions(exceptions); 1133 } 1134 1135 void thread_kernel_save_vfp(void) 1136 { 1137 struct thread_ctx *thr = threads + thread_get_id(); 1138 1139 assert(thread_get_exceptions() & THREAD_EXCP_FOREIGN_INTR); 1140 if (vfp_is_enabled()) { 1141 vfp_lazy_save_state_init(&thr->vfp_state.sec); 1142 thr->vfp_state.sec_lazy_saved = true; 1143 } 1144 } 1145 1146 void thread_kernel_restore_vfp(void) 1147 { 1148 struct thread_ctx *thr = threads + thread_get_id(); 1149 1150 assert(thread_get_exceptions() & THREAD_EXCP_FOREIGN_INTR); 1151 assert(!vfp_is_enabled()); 1152 if (thr->vfp_state.sec_lazy_saved) { 1153 vfp_lazy_restore_state(&thr->vfp_state.sec, 1154 thr->vfp_state.sec_saved); 1155 thr->vfp_state.sec_saved = false; 1156 thr->vfp_state.sec_lazy_saved = false; 1157 } 1158 } 1159 1160 void thread_user_enable_vfp(struct thread_user_vfp_state *uvfp) 1161 { 1162 struct thread_ctx *thr = threads + thread_get_id(); 1163 struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp; 1164 1165 assert(thread_get_exceptions() & THREAD_EXCP_FOREIGN_INTR); 1166 assert(!vfp_is_enabled()); 1167 1168 if (!thr->vfp_state.ns_saved) { 1169 vfp_lazy_save_state_final(&thr->vfp_state.ns, 1170 thr->vfp_state.ns_force_save); 1171 thr->vfp_state.ns_saved = true; 1172 } else if (tuv && uvfp != tuv) { 1173 if (tuv->lazy_saved && !tuv->saved) { 1174 vfp_lazy_save_state_final(&tuv->vfp, 1175 false /*!force_save*/); 1176 tuv->saved = true; 1177 } 1178 } 1179 1180 if (uvfp->lazy_saved) 1181 vfp_lazy_restore_state(&uvfp->vfp, uvfp->saved); 1182 uvfp->lazy_saved = false; 1183 uvfp->saved = false; 1184 1185 thr->vfp_state.uvfp = uvfp; 1186 vfp_enable(); 1187 } 1188 1189 void thread_user_save_vfp(void) 1190 { 1191 struct thread_ctx *thr = threads + thread_get_id(); 1192 struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp; 1193 1194 assert(thread_get_exceptions() & THREAD_EXCP_FOREIGN_INTR); 1195 if (!vfp_is_enabled()) 1196 return; 1197 1198 assert(tuv && !tuv->lazy_saved && !tuv->saved); 1199 vfp_lazy_save_state_init(&tuv->vfp); 1200 tuv->lazy_saved = true; 1201 } 1202 1203 void thread_user_clear_vfp(struct thread_user_vfp_state *uvfp) 1204 { 1205 struct thread_ctx *thr = threads + thread_get_id(); 1206 1207 if (uvfp == thr->vfp_state.uvfp) 1208 thr->vfp_state.uvfp = NULL; 1209 uvfp->lazy_saved = false; 1210 uvfp->saved = false; 1211 } 1212 #endif /*CFG_WITH_VFP*/ 1213 1214 #ifdef ARM32 1215 static bool get_spsr(bool is_32bit, unsigned long entry_func, uint32_t *spsr) 1216 { 1217 uint32_t s; 1218 1219 if (!is_32bit) 1220 return false; 1221 1222 s = read_spsr(); 1223 s &= ~(CPSR_MODE_MASK | CPSR_T | CPSR_IT_MASK1 | CPSR_IT_MASK2); 1224 s |= CPSR_MODE_USR; 1225 if (entry_func & 1) 1226 s |= CPSR_T; 1227 *spsr = s; 1228 return true; 1229 } 1230 #endif 1231 1232 #ifdef ARM64 1233 static bool get_spsr(bool is_32bit, unsigned long entry_func, uint32_t *spsr) 1234 { 1235 uint32_t s; 1236 1237 if (is_32bit) { 1238 s = read_daif() & (SPSR_32_AIF_MASK << SPSR_32_AIF_SHIFT); 1239 s |= SPSR_MODE_RW_32 << SPSR_MODE_RW_SHIFT; 1240 s |= (entry_func & SPSR_32_T_MASK) << SPSR_32_T_SHIFT; 1241 } else { 1242 s = read_daif() & (SPSR_64_DAIF_MASK << SPSR_64_DAIF_SHIFT); 1243 } 1244 1245 *spsr = s; 1246 return true; 1247 } 1248 #endif 1249 1250 uint32_t thread_enter_user_mode(unsigned long a0, unsigned long a1, 1251 unsigned long a2, unsigned long a3, unsigned long user_sp, 1252 unsigned long entry_func, bool is_32bit, 1253 uint32_t *exit_status0, uint32_t *exit_status1) 1254 { 1255 uint32_t spsr; 1256 1257 tee_ta_update_session_utime_resume(); 1258 1259 if (!get_spsr(is_32bit, entry_func, &spsr)) { 1260 *exit_status0 = 1; /* panic */ 1261 *exit_status1 = 0xbadbadba; 1262 return 0; 1263 } 1264 return __thread_enter_user_mode(a0, a1, a2, a3, user_sp, entry_func, 1265 spsr, exit_status0, exit_status1); 1266 } 1267 1268 #ifdef CFG_CORE_UNMAP_CORE_AT_EL0 1269 void thread_get_user_kcode(struct mobj **mobj, size_t *offset, 1270 vaddr_t *va, size_t *sz) 1271 { 1272 core_mmu_get_user_va_range(va, NULL); 1273 *mobj = mobj_tee_ram; 1274 *offset = thread_user_kcode_va - TEE_RAM_START; 1275 *sz = thread_user_kcode_size; 1276 } 1277 #endif 1278 1279 #if defined(CFG_CORE_UNMAP_CORE_AT_EL0) && \ 1280 defined(CFG_CORE_WORKAROUND_SPECTRE_BP_SEC) && defined(ARM64) 1281 void thread_get_user_kdata(struct mobj **mobj, size_t *offset, 1282 vaddr_t *va, size_t *sz) 1283 { 1284 vaddr_t v; 1285 1286 core_mmu_get_user_va_range(&v, NULL); 1287 *va = v + thread_user_kcode_size; 1288 *mobj = mobj_tee_ram; 1289 *offset = (vaddr_t)thread_user_kdata_page - TEE_RAM_START; 1290 *sz = sizeof(thread_user_kdata_page); 1291 } 1292 #endif 1293 1294 bool thread_disable_prealloc_rpc_cache(uint64_t *cookie) 1295 { 1296 bool rv; 1297 size_t n; 1298 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR); 1299 1300 lock_global(); 1301 1302 for (n = 0; n < CFG_NUM_THREADS; n++) { 1303 if (threads[n].state != THREAD_STATE_FREE) { 1304 rv = false; 1305 goto out; 1306 } 1307 } 1308 1309 rv = true; 1310 for (n = 0; n < CFG_NUM_THREADS; n++) { 1311 if (threads[n].rpc_arg) { 1312 *cookie = mobj_get_cookie(threads[n].rpc_mobj); 1313 mobj_free(threads[n].rpc_mobj); 1314 threads[n].rpc_arg = NULL; 1315 goto out; 1316 } 1317 } 1318 1319 *cookie = 0; 1320 thread_prealloc_rpc_cache = false; 1321 out: 1322 unlock_global(); 1323 thread_unmask_exceptions(exceptions); 1324 return rv; 1325 } 1326 1327 bool thread_enable_prealloc_rpc_cache(void) 1328 { 1329 bool rv; 1330 size_t n; 1331 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR); 1332 1333 lock_global(); 1334 1335 for (n = 0; n < CFG_NUM_THREADS; n++) { 1336 if (threads[n].state != THREAD_STATE_FREE) { 1337 rv = false; 1338 goto out; 1339 } 1340 } 1341 1342 rv = true; 1343 thread_prealloc_rpc_cache = true; 1344 out: 1345 unlock_global(); 1346 thread_unmask_exceptions(exceptions); 1347 return rv; 1348 } 1349 1350 /** 1351 * Allocates data for struct optee_msg_arg. 1352 * 1353 * @size: size in bytes of struct optee_msg_arg 1354 * 1355 * @returns mobj that describes allocated buffer or NULL on error 1356 */ 1357 static struct mobj *thread_rpc_alloc_arg(size_t size) 1358 { 1359 paddr_t pa; 1360 uint64_t co; 1361 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { 1362 OPTEE_SMC_RETURN_RPC_ALLOC, size 1363 }; 1364 struct mobj *mobj = NULL; 1365 1366 thread_rpc(rpc_args); 1367 1368 pa = reg_pair_to_64(rpc_args[1], rpc_args[2]); 1369 co = reg_pair_to_64(rpc_args[4], rpc_args[5]); 1370 1371 if (!ALIGNMENT_IS_OK(pa, struct optee_msg_arg)) 1372 goto err; 1373 1374 /* Check if this region is in static shared space */ 1375 if (core_pbuf_is(CORE_MEM_NSEC_SHM, pa, size)) 1376 mobj = mobj_shm_alloc(pa, size, co); 1377 else if ((!(pa & SMALL_PAGE_MASK)) && size <= SMALL_PAGE_SIZE) 1378 mobj = mobj_mapped_shm_alloc(&pa, 1, 0, co); 1379 1380 if (!mobj) 1381 goto err; 1382 1383 return mobj; 1384 err: 1385 thread_rpc_free_arg(co); 1386 mobj_free(mobj); 1387 return NULL; 1388 } 1389 1390 static bool set_rmem(struct optee_msg_param *param, 1391 struct thread_param *tpm) 1392 { 1393 param->attr = tpm->attr - THREAD_PARAM_ATTR_MEMREF_IN + 1394 OPTEE_MSG_ATTR_TYPE_RMEM_INPUT; 1395 param->u.rmem.offs = tpm->u.memref.offs; 1396 param->u.rmem.size = tpm->u.memref.size; 1397 if (tpm->u.memref.mobj) { 1398 param->u.rmem.shm_ref = mobj_get_cookie(tpm->u.memref.mobj); 1399 if (!param->u.rmem.shm_ref) 1400 return false; 1401 } else { 1402 param->u.rmem.shm_ref = 0; 1403 } 1404 1405 return true; 1406 } 1407 1408 static bool set_tmem(struct optee_msg_param *param, 1409 struct thread_param *tpm) 1410 { 1411 paddr_t pa = 0; 1412 uint64_t shm_ref = 0; 1413 struct mobj *mobj = tpm->u.memref.mobj; 1414 1415 param->attr = tpm->attr - THREAD_PARAM_ATTR_MEMREF_IN + 1416 OPTEE_MSG_ATTR_TYPE_TMEM_INPUT; 1417 if (mobj) { 1418 shm_ref = mobj_get_cookie(mobj); 1419 if (!shm_ref) 1420 return false; 1421 if (mobj_get_pa(mobj, tpm->u.memref.offs, 0, &pa)) 1422 return false; 1423 } 1424 1425 param->u.tmem.size = tpm->u.memref.size; 1426 param->u.tmem.buf_ptr = pa; 1427 param->u.tmem.shm_ref = shm_ref; 1428 1429 return true; 1430 } 1431 1432 static uint32_t get_rpc_arg(uint32_t cmd, size_t num_params, 1433 struct thread_param *params, void **arg_ret, 1434 uint64_t *carg_ret) 1435 { 1436 struct thread_ctx *thr = threads + thread_get_id(); 1437 struct optee_msg_arg *arg = thr->rpc_arg; 1438 size_t sz = OPTEE_MSG_GET_ARG_SIZE(THREAD_RPC_MAX_NUM_PARAMS); 1439 1440 if (num_params > THREAD_RPC_MAX_NUM_PARAMS) 1441 return TEE_ERROR_BAD_PARAMETERS; 1442 1443 if (!arg) { 1444 struct mobj *mobj = thread_rpc_alloc_arg(sz); 1445 1446 if (!mobj) 1447 return TEE_ERROR_OUT_OF_MEMORY; 1448 1449 arg = mobj_get_va(mobj, 0); 1450 if (!arg) { 1451 thread_rpc_free_arg(mobj_get_cookie(mobj)); 1452 return TEE_ERROR_OUT_OF_MEMORY; 1453 } 1454 1455 thr->rpc_arg = arg; 1456 thr->rpc_mobj = mobj; 1457 } 1458 1459 memset(arg, 0, OPTEE_MSG_GET_ARG_SIZE(num_params)); 1460 arg->cmd = cmd; 1461 arg->num_params = num_params; 1462 arg->ret = TEE_ERROR_GENERIC; /* in case value isn't updated */ 1463 1464 for (size_t n = 0; n < num_params; n++) { 1465 switch (params[n].attr) { 1466 case THREAD_PARAM_ATTR_NONE: 1467 arg->params[n].attr = OPTEE_MSG_ATTR_TYPE_NONE; 1468 break; 1469 case THREAD_PARAM_ATTR_VALUE_IN: 1470 case THREAD_PARAM_ATTR_VALUE_OUT: 1471 case THREAD_PARAM_ATTR_VALUE_INOUT: 1472 arg->params[n].attr = params[n].attr - 1473 THREAD_PARAM_ATTR_VALUE_IN + 1474 OPTEE_MSG_ATTR_TYPE_VALUE_INPUT; 1475 arg->params[n].u.value.a = params[n].u.value.a; 1476 arg->params[n].u.value.b = params[n].u.value.b; 1477 arg->params[n].u.value.c = params[n].u.value.c; 1478 break; 1479 case THREAD_PARAM_ATTR_MEMREF_IN: 1480 case THREAD_PARAM_ATTR_MEMREF_OUT: 1481 case THREAD_PARAM_ATTR_MEMREF_INOUT: 1482 if (!params[n].u.memref.mobj || 1483 mobj_matches(params[n].u.memref.mobj, 1484 CORE_MEM_NSEC_SHM)) { 1485 if (!set_tmem(arg->params + n, params + n)) 1486 return TEE_ERROR_BAD_PARAMETERS; 1487 } else if (mobj_matches(params[n].u.memref.mobj, 1488 CORE_MEM_REG_SHM)) { 1489 if (!set_rmem(arg->params + n, params + n)) 1490 return TEE_ERROR_BAD_PARAMETERS; 1491 } else { 1492 return TEE_ERROR_BAD_PARAMETERS; 1493 } 1494 break; 1495 default: 1496 return TEE_ERROR_BAD_PARAMETERS; 1497 } 1498 } 1499 1500 *arg_ret = arg; 1501 *carg_ret = mobj_get_cookie(thr->rpc_mobj); 1502 1503 return TEE_SUCCESS; 1504 } 1505 1506 static uint32_t get_rpc_arg_res(struct optee_msg_arg *arg, size_t num_params, 1507 struct thread_param *params) 1508 { 1509 for (size_t n = 0; n < num_params; n++) { 1510 switch (params[n].attr) { 1511 case THREAD_PARAM_ATTR_VALUE_OUT: 1512 case THREAD_PARAM_ATTR_VALUE_INOUT: 1513 params[n].u.value.a = arg->params[n].u.value.a; 1514 params[n].u.value.b = arg->params[n].u.value.b; 1515 params[n].u.value.c = arg->params[n].u.value.c; 1516 break; 1517 case THREAD_PARAM_ATTR_MEMREF_OUT: 1518 case THREAD_PARAM_ATTR_MEMREF_INOUT: 1519 /* 1520 * rmem.size and tmem.size is the same type and 1521 * location. 1522 */ 1523 params[n].u.memref.size = arg->params[n].u.rmem.size; 1524 break; 1525 default: 1526 break; 1527 } 1528 } 1529 1530 return arg->ret; 1531 } 1532 1533 uint32_t thread_rpc_cmd(uint32_t cmd, size_t num_params, 1534 struct thread_param *params) 1535 { 1536 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { OPTEE_SMC_RETURN_RPC_CMD }; 1537 void *arg = NULL; 1538 uint64_t carg = 0; 1539 uint32_t ret = 0; 1540 1541 /* The source CRYPTO_RNG_SRC_JITTER_RPC is safe to use here */ 1542 plat_prng_add_jitter_entropy(CRYPTO_RNG_SRC_JITTER_RPC, 1543 &thread_rpc_pnum); 1544 1545 ret = get_rpc_arg(cmd, num_params, params, &arg, &carg); 1546 if (ret) 1547 return ret; 1548 1549 reg_pair_from_64(carg, rpc_args + 1, rpc_args + 2); 1550 thread_rpc(rpc_args); 1551 1552 return get_rpc_arg_res(arg, num_params, params); 1553 } 1554 1555 /** 1556 * Free physical memory previously allocated with thread_rpc_alloc() 1557 * 1558 * @cookie: cookie received when allocating the buffer 1559 * @bt: must be the same as supplied when allocating 1560 * @mobj: mobj that describes allocated buffer 1561 * 1562 * This function also frees corresponding mobj. 1563 */ 1564 static void thread_rpc_free(unsigned int bt, uint64_t cookie, struct mobj *mobj) 1565 { 1566 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { OPTEE_SMC_RETURN_RPC_CMD }; 1567 void *arg = NULL; 1568 uint64_t carg = 0; 1569 struct thread_param param = THREAD_PARAM_VALUE(IN, bt, cookie, 0); 1570 uint32_t ret = get_rpc_arg(OPTEE_RPC_CMD_SHM_FREE, 1, ¶m, 1571 &arg, &carg); 1572 1573 mobj_free(mobj); 1574 1575 if (!ret) { 1576 reg_pair_from_64(carg, rpc_args + 1, rpc_args + 2); 1577 thread_rpc(rpc_args); 1578 } 1579 } 1580 1581 static struct mobj *get_rpc_alloc_res(struct optee_msg_arg *arg, 1582 unsigned int bt) 1583 { 1584 struct mobj *mobj = NULL; 1585 uint64_t cookie = 0; 1586 1587 if (arg->ret || arg->num_params != 1) 1588 return NULL; 1589 1590 if (arg->params[0].attr == OPTEE_MSG_ATTR_TYPE_TMEM_OUTPUT) { 1591 cookie = arg->params[0].u.tmem.shm_ref; 1592 mobj = mobj_shm_alloc(arg->params[0].u.tmem.buf_ptr, 1593 arg->params[0].u.tmem.size, 1594 cookie); 1595 } else if (arg->params[0].attr == (OPTEE_MSG_ATTR_TYPE_TMEM_OUTPUT | 1596 OPTEE_MSG_ATTR_NONCONTIG)) { 1597 cookie = arg->params[0].u.tmem.shm_ref; 1598 mobj = msg_param_mobj_from_noncontig( 1599 arg->params[0].u.tmem.buf_ptr, 1600 arg->params[0].u.tmem.size, 1601 cookie, 1602 true); 1603 } else { 1604 return NULL; 1605 } 1606 1607 if (!mobj) { 1608 thread_rpc_free(bt, cookie, mobj); 1609 return NULL; 1610 } 1611 1612 assert(mobj_is_nonsec(mobj)); 1613 1614 return mobj; 1615 } 1616 1617 /** 1618 * Allocates shared memory buffer via RPC 1619 * 1620 * @size: size in bytes of shared memory buffer 1621 * @align: required alignment of buffer 1622 * @bt: buffer type OPTEE_RPC_SHM_TYPE_* 1623 * 1624 * Returns a pointer to MOBJ for the memory on success, or NULL on failure. 1625 */ 1626 static struct mobj *thread_rpc_alloc(size_t size, size_t align, unsigned int bt) 1627 { 1628 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { OPTEE_SMC_RETURN_RPC_CMD }; 1629 void *arg = NULL; 1630 uint64_t carg = 0; 1631 struct thread_param param = THREAD_PARAM_VALUE(IN, bt, size, align); 1632 uint32_t ret = get_rpc_arg(OPTEE_RPC_CMD_SHM_ALLOC, 1, ¶m, 1633 &arg, &carg); 1634 1635 if (ret) 1636 return NULL; 1637 1638 reg_pair_from_64(carg, rpc_args + 1, rpc_args + 2); 1639 thread_rpc(rpc_args); 1640 1641 return get_rpc_alloc_res(arg, bt); 1642 } 1643 1644 struct mobj *thread_rpc_alloc_payload(size_t size) 1645 { 1646 return thread_rpc_alloc(size, 8, OPTEE_RPC_SHM_TYPE_APPL); 1647 } 1648 1649 void thread_rpc_free_payload(struct mobj *mobj) 1650 { 1651 thread_rpc_free(OPTEE_RPC_SHM_TYPE_APPL, mobj_get_cookie(mobj), 1652 mobj); 1653 } 1654 1655 struct mobj *thread_rpc_alloc_global_payload(size_t size) 1656 { 1657 return thread_rpc_alloc(size, 8, OPTEE_RPC_SHM_TYPE_GLOBAL); 1658 } 1659 1660 void thread_rpc_free_global_payload(struct mobj *mobj) 1661 { 1662 thread_rpc_free(OPTEE_RPC_SHM_TYPE_GLOBAL, mobj_get_cookie(mobj), 1663 mobj); 1664 } 1665