xref: /optee_os/core/arch/arm/kernel/thread.c (revision bceeadce69199418868c558f3131a5a51b927927)
1 // SPDX-License-Identifier: BSD-2-Clause
2 /*
3  * Copyright (c) 2016, Linaro Limited
4  * Copyright (c) 2014, STMicroelectronics International N.V.
5  */
6 
7 #include <platform_config.h>
8 
9 #include <arm.h>
10 #include <assert.h>
11 #include <keep.h>
12 #include <kernel/asan.h>
13 #include <kernel/misc.h>
14 #include <kernel/msg_param.h>
15 #include <kernel/panic.h>
16 #include <kernel/spinlock.h>
17 #include <kernel/tee_ta_manager.h>
18 #include <kernel/thread_defs.h>
19 #include <kernel/thread.h>
20 #include <mm/core_memprot.h>
21 #include <mm/mobj.h>
22 #include <mm/tee_mm.h>
23 #include <mm/tee_mmu.h>
24 #include <mm/tee_pager.h>
25 #include <optee_msg.h>
26 #include <smccc.h>
27 #include <sm/optee_smc.h>
28 #include <sm/sm.h>
29 #include <tee/tee_cryp_utl.h>
30 #include <tee/tee_fs_rpc.h>
31 #include <trace.h>
32 #include <util.h>
33 
34 #include "thread_private.h"
35 
36 #ifdef CFG_WITH_ARM_TRUSTED_FW
37 #define STACK_TMP_OFFS		0
38 #else
39 #define STACK_TMP_OFFS		SM_STACK_TMP_RESERVE_SIZE
40 #endif
41 
42 
43 #ifdef ARM32
44 #ifdef CFG_CORE_SANITIZE_KADDRESS
45 #define STACK_TMP_SIZE		(3072 + STACK_TMP_OFFS)
46 #else
47 #define STACK_TMP_SIZE		(1536 + STACK_TMP_OFFS)
48 #endif
49 #define STACK_THREAD_SIZE	8192
50 
51 #ifdef CFG_CORE_SANITIZE_KADDRESS
52 #define STACK_ABT_SIZE		3072
53 #else
54 #define STACK_ABT_SIZE		2048
55 #endif
56 
57 #endif /*ARM32*/
58 
59 #ifdef ARM64
60 #define STACK_TMP_SIZE		(2048 + STACK_TMP_OFFS)
61 #define STACK_THREAD_SIZE	8192
62 
63 #if TRACE_LEVEL > 0
64 #define STACK_ABT_SIZE		3072
65 #else
66 #define STACK_ABT_SIZE		1024
67 #endif
68 #endif /*ARM64*/
69 
70 struct thread_ctx threads[CFG_NUM_THREADS];
71 
72 struct thread_core_local thread_core_local[CFG_TEE_CORE_NB_CORE];
73 
74 #ifdef CFG_WITH_STACK_CANARIES
75 #ifdef ARM32
76 #define STACK_CANARY_SIZE	(4 * sizeof(uint32_t))
77 #endif
78 #ifdef ARM64
79 #define STACK_CANARY_SIZE	(8 * sizeof(uint32_t))
80 #endif
81 #define START_CANARY_VALUE	0xdededede
82 #define END_CANARY_VALUE	0xabababab
83 #define GET_START_CANARY(name, stack_num) name[stack_num][0]
84 #define GET_END_CANARY(name, stack_num) \
85 	name[stack_num][sizeof(name[stack_num]) / sizeof(uint32_t) - 1]
86 #else
87 #define STACK_CANARY_SIZE	0
88 #endif
89 
90 #define DECLARE_STACK(name, num_stacks, stack_size, linkage) \
91 linkage uint32_t name[num_stacks] \
92 		[ROUNDUP(stack_size + STACK_CANARY_SIZE, STACK_ALIGNMENT) / \
93 		sizeof(uint32_t)] \
94 		__attribute__((section(".nozi_stack"), \
95 			       aligned(STACK_ALIGNMENT)))
96 
97 #define STACK_SIZE(stack) (sizeof(stack) - STACK_CANARY_SIZE / 2)
98 
99 #define GET_STACK(stack) \
100 	((vaddr_t)(stack) + STACK_SIZE(stack))
101 
102 DECLARE_STACK(stack_tmp, CFG_TEE_CORE_NB_CORE, STACK_TMP_SIZE, static);
103 DECLARE_STACK(stack_abt, CFG_TEE_CORE_NB_CORE, STACK_ABT_SIZE, static);
104 #ifndef CFG_WITH_PAGER
105 DECLARE_STACK(stack_thread, CFG_NUM_THREADS, STACK_THREAD_SIZE, static);
106 #endif
107 
108 const void *stack_tmp_export = (uint8_t *)stack_tmp + sizeof(stack_tmp[0]) -
109 			       (STACK_TMP_OFFS + STACK_CANARY_SIZE / 2);
110 const uint32_t stack_tmp_stride = sizeof(stack_tmp[0]);
111 
112 /*
113  * These stack setup info are required by secondary boot cores before they
114  * each locally enable the pager (the mmu). Hence kept in pager sections.
115  */
116 KEEP_PAGER(stack_tmp_export);
117 KEEP_PAGER(stack_tmp_stride);
118 
119 thread_smc_handler_t thread_std_smc_handler_ptr;
120 static thread_smc_handler_t thread_fast_smc_handler_ptr;
121 thread_nintr_handler_t thread_nintr_handler_ptr;
122 thread_pm_handler_t thread_cpu_on_handler_ptr;
123 thread_pm_handler_t thread_cpu_off_handler_ptr;
124 thread_pm_handler_t thread_cpu_suspend_handler_ptr;
125 thread_pm_handler_t thread_cpu_resume_handler_ptr;
126 thread_pm_handler_t thread_system_off_handler_ptr;
127 thread_pm_handler_t thread_system_reset_handler_ptr;
128 
129 #ifdef CFG_CORE_UNMAP_CORE_AT_EL0
130 static vaddr_t thread_user_kcode_va;
131 long thread_user_kcode_offset;
132 static size_t thread_user_kcode_size;
133 #endif
134 
135 #if defined(CFG_CORE_UNMAP_CORE_AT_EL0) && \
136 	defined(CFG_CORE_WORKAROUND_SPECTRE_BP_SEC) && defined(ARM64)
137 long thread_user_kdata_sp_offset;
138 static uint8_t thread_user_kdata_page[
139 	ROUNDUP(sizeof(thread_core_local), SMALL_PAGE_SIZE)]
140 	__aligned(SMALL_PAGE_SIZE) __section(".nozi.kdata_page");
141 #endif
142 
143 static unsigned int thread_global_lock = SPINLOCK_UNLOCK;
144 static bool thread_prealloc_rpc_cache;
145 
146 static unsigned int thread_rpc_pnum;
147 
148 static void init_canaries(void)
149 {
150 #ifdef CFG_WITH_STACK_CANARIES
151 	size_t n;
152 #define INIT_CANARY(name)						\
153 	for (n = 0; n < ARRAY_SIZE(name); n++) {			\
154 		uint32_t *start_canary = &GET_START_CANARY(name, n);	\
155 		uint32_t *end_canary = &GET_END_CANARY(name, n);	\
156 									\
157 		*start_canary = START_CANARY_VALUE;			\
158 		*end_canary = END_CANARY_VALUE;				\
159 		DMSG("#Stack canaries for %s[%zu] with top at %p\n",	\
160 			#name, n, (void *)(end_canary - 1));		\
161 		DMSG("watch *%p\n", (void *)end_canary);		\
162 	}
163 
164 	INIT_CANARY(stack_tmp);
165 	INIT_CANARY(stack_abt);
166 #ifndef CFG_WITH_PAGER
167 	INIT_CANARY(stack_thread);
168 #endif
169 #endif/*CFG_WITH_STACK_CANARIES*/
170 }
171 
172 #define CANARY_DIED(stack, loc, n) \
173 	do { \
174 		EMSG_RAW("Dead canary at %s of '%s[%zu]'", #loc, #stack, n); \
175 		panic(); \
176 	} while (0)
177 
178 void thread_check_canaries(void)
179 {
180 #ifdef CFG_WITH_STACK_CANARIES
181 	size_t n;
182 
183 	for (n = 0; n < ARRAY_SIZE(stack_tmp); n++) {
184 		if (GET_START_CANARY(stack_tmp, n) != START_CANARY_VALUE)
185 			CANARY_DIED(stack_tmp, start, n);
186 		if (GET_END_CANARY(stack_tmp, n) != END_CANARY_VALUE)
187 			CANARY_DIED(stack_tmp, end, n);
188 	}
189 
190 	for (n = 0; n < ARRAY_SIZE(stack_abt); n++) {
191 		if (GET_START_CANARY(stack_abt, n) != START_CANARY_VALUE)
192 			CANARY_DIED(stack_abt, start, n);
193 		if (GET_END_CANARY(stack_abt, n) != END_CANARY_VALUE)
194 			CANARY_DIED(stack_abt, end, n);
195 
196 	}
197 #ifndef CFG_WITH_PAGER
198 	for (n = 0; n < ARRAY_SIZE(stack_thread); n++) {
199 		if (GET_START_CANARY(stack_thread, n) != START_CANARY_VALUE)
200 			CANARY_DIED(stack_thread, start, n);
201 		if (GET_END_CANARY(stack_thread, n) != END_CANARY_VALUE)
202 			CANARY_DIED(stack_thread, end, n);
203 	}
204 #endif
205 #endif/*CFG_WITH_STACK_CANARIES*/
206 }
207 
208 static void lock_global(void)
209 {
210 	cpu_spin_lock(&thread_global_lock);
211 }
212 
213 static void unlock_global(void)
214 {
215 	cpu_spin_unlock(&thread_global_lock);
216 }
217 
218 #ifdef ARM32
219 uint32_t thread_get_exceptions(void)
220 {
221 	uint32_t cpsr = read_cpsr();
222 
223 	return (cpsr >> CPSR_F_SHIFT) & THREAD_EXCP_ALL;
224 }
225 
226 void thread_set_exceptions(uint32_t exceptions)
227 {
228 	uint32_t cpsr = read_cpsr();
229 
230 	/* Foreign interrupts must not be unmasked while holding a spinlock */
231 	if (!(exceptions & THREAD_EXCP_FOREIGN_INTR))
232 		assert_have_no_spinlock();
233 
234 	cpsr &= ~(THREAD_EXCP_ALL << CPSR_F_SHIFT);
235 	cpsr |= ((exceptions & THREAD_EXCP_ALL) << CPSR_F_SHIFT);
236 	write_cpsr(cpsr);
237 }
238 #endif /*ARM32*/
239 
240 #ifdef ARM64
241 uint32_t thread_get_exceptions(void)
242 {
243 	uint32_t daif = read_daif();
244 
245 	return (daif >> DAIF_F_SHIFT) & THREAD_EXCP_ALL;
246 }
247 
248 void thread_set_exceptions(uint32_t exceptions)
249 {
250 	uint32_t daif = read_daif();
251 
252 	/* Foreign interrupts must not be unmasked while holding a spinlock */
253 	if (!(exceptions & THREAD_EXCP_FOREIGN_INTR))
254 		assert_have_no_spinlock();
255 
256 	daif &= ~(THREAD_EXCP_ALL << DAIF_F_SHIFT);
257 	daif |= ((exceptions & THREAD_EXCP_ALL) << DAIF_F_SHIFT);
258 	write_daif(daif);
259 }
260 #endif /*ARM64*/
261 
262 uint32_t thread_mask_exceptions(uint32_t exceptions)
263 {
264 	uint32_t state = thread_get_exceptions();
265 
266 	thread_set_exceptions(state | (exceptions & THREAD_EXCP_ALL));
267 	return state;
268 }
269 
270 void thread_unmask_exceptions(uint32_t state)
271 {
272 	thread_set_exceptions(state & THREAD_EXCP_ALL);
273 }
274 
275 
276 struct thread_core_local *thread_get_core_local(void)
277 {
278 	uint32_t cpu_id = get_core_pos();
279 
280 	/*
281 	 * Foreign interrupts must be disabled before playing with core_local
282 	 * since we otherwise may be rescheduled to a different core in the
283 	 * middle of this function.
284 	 */
285 	assert(thread_get_exceptions() & THREAD_EXCP_FOREIGN_INTR);
286 
287 	assert(cpu_id < CFG_TEE_CORE_NB_CORE);
288 	return &thread_core_local[cpu_id];
289 }
290 
291 static void thread_lazy_save_ns_vfp(void)
292 {
293 #ifdef CFG_WITH_VFP
294 	struct thread_ctx *thr = threads + thread_get_id();
295 
296 	thr->vfp_state.ns_saved = false;
297 #if defined(ARM64) && defined(CFG_WITH_ARM_TRUSTED_FW)
298 	/*
299 	 * ARM TF saves and restores CPACR_EL1, so we must assume NS world
300 	 * uses VFP and always preserve the register file when secure world
301 	 * is about to use it
302 	 */
303 	thr->vfp_state.ns.force_save = true;
304 #endif
305 	vfp_lazy_save_state_init(&thr->vfp_state.ns);
306 #endif /*CFG_WITH_VFP*/
307 }
308 
309 static void thread_lazy_restore_ns_vfp(void)
310 {
311 #ifdef CFG_WITH_VFP
312 	struct thread_ctx *thr = threads + thread_get_id();
313 	struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp;
314 
315 	assert(!thr->vfp_state.sec_lazy_saved && !thr->vfp_state.sec_saved);
316 
317 	if (tuv && tuv->lazy_saved && !tuv->saved) {
318 		vfp_lazy_save_state_final(&tuv->vfp);
319 		tuv->saved = true;
320 	}
321 
322 	vfp_lazy_restore_state(&thr->vfp_state.ns, thr->vfp_state.ns_saved);
323 	thr->vfp_state.ns_saved = false;
324 #endif /*CFG_WITH_VFP*/
325 }
326 
327 #ifdef ARM32
328 static void init_regs(struct thread_ctx *thread,
329 		struct thread_smc_args *args)
330 {
331 	thread->regs.pc = (uint32_t)thread_std_smc_entry;
332 
333 	/*
334 	 * Stdcalls starts in SVC mode with masked foreign interrupts, masked
335 	 * Asynchronous abort and unmasked native interrupts.
336 	 */
337 	thread->regs.cpsr = read_cpsr() & ARM32_CPSR_E;
338 	thread->regs.cpsr |= CPSR_MODE_SVC | CPSR_A |
339 			(THREAD_EXCP_FOREIGN_INTR << ARM32_CPSR_F_SHIFT);
340 	/* Enable thumb mode if it's a thumb instruction */
341 	if (thread->regs.pc & 1)
342 		thread->regs.cpsr |= CPSR_T;
343 	/* Reinitialize stack pointer */
344 	thread->regs.svc_sp = thread->stack_va_end;
345 
346 	/*
347 	 * Copy arguments into context. This will make the
348 	 * arguments appear in r0-r7 when thread is started.
349 	 */
350 	thread->regs.r0 = args->a0;
351 	thread->regs.r1 = args->a1;
352 	thread->regs.r2 = args->a2;
353 	thread->regs.r3 = args->a3;
354 	thread->regs.r4 = args->a4;
355 	thread->regs.r5 = args->a5;
356 	thread->regs.r6 = args->a6;
357 	thread->regs.r7 = args->a7;
358 }
359 #endif /*ARM32*/
360 
361 #ifdef ARM64
362 static void init_regs(struct thread_ctx *thread,
363 		struct thread_smc_args *args)
364 {
365 	thread->regs.pc = (uint64_t)thread_std_smc_entry;
366 
367 	/*
368 	 * Stdcalls starts in SVC mode with masked foreign interrupts, masked
369 	 * Asynchronous abort and unmasked native interrupts.
370 	 */
371 	thread->regs.cpsr = SPSR_64(SPSR_64_MODE_EL1, SPSR_64_MODE_SP_EL0,
372 				THREAD_EXCP_FOREIGN_INTR | DAIFBIT_ABT);
373 	/* Reinitialize stack pointer */
374 	thread->regs.sp = thread->stack_va_end;
375 
376 	/*
377 	 * Copy arguments into context. This will make the
378 	 * arguments appear in x0-x7 when thread is started.
379 	 */
380 	thread->regs.x[0] = args->a0;
381 	thread->regs.x[1] = args->a1;
382 	thread->regs.x[2] = args->a2;
383 	thread->regs.x[3] = args->a3;
384 	thread->regs.x[4] = args->a4;
385 	thread->regs.x[5] = args->a5;
386 	thread->regs.x[6] = args->a6;
387 	thread->regs.x[7] = args->a7;
388 
389 	/* Set up frame pointer as per the Aarch64 AAPCS */
390 	thread->regs.x[29] = 0;
391 }
392 #endif /*ARM64*/
393 
394 void thread_init_boot_thread(void)
395 {
396 	struct thread_core_local *l = thread_get_core_local();
397 	size_t n;
398 
399 	for (n = 0; n < CFG_NUM_THREADS; n++) {
400 		TAILQ_INIT(&threads[n].mutexes);
401 		TAILQ_INIT(&threads[n].tsd.sess_stack);
402 		SLIST_INIT(&threads[n].tsd.pgt_cache);
403 	}
404 
405 	for (n = 0; n < CFG_TEE_CORE_NB_CORE; n++)
406 		thread_core_local[n].curr_thread = -1;
407 
408 	l->curr_thread = 0;
409 	threads[0].state = THREAD_STATE_ACTIVE;
410 }
411 
412 void thread_clr_boot_thread(void)
413 {
414 	struct thread_core_local *l = thread_get_core_local();
415 
416 	assert(l->curr_thread >= 0 && l->curr_thread < CFG_NUM_THREADS);
417 	assert(threads[l->curr_thread].state == THREAD_STATE_ACTIVE);
418 	assert(TAILQ_EMPTY(&threads[l->curr_thread].mutexes));
419 	threads[l->curr_thread].state = THREAD_STATE_FREE;
420 	l->curr_thread = -1;
421 }
422 
423 static void thread_alloc_and_run(struct thread_smc_args *args)
424 {
425 	size_t n;
426 	struct thread_core_local *l = thread_get_core_local();
427 	bool found_thread = false;
428 
429 	assert(l->curr_thread == -1);
430 
431 	lock_global();
432 
433 	for (n = 0; n < CFG_NUM_THREADS; n++) {
434 		if (threads[n].state == THREAD_STATE_FREE) {
435 			threads[n].state = THREAD_STATE_ACTIVE;
436 			found_thread = true;
437 			break;
438 		}
439 	}
440 
441 	unlock_global();
442 
443 	if (!found_thread) {
444 		args->a0 = OPTEE_SMC_RETURN_ETHREAD_LIMIT;
445 		return;
446 	}
447 
448 	l->curr_thread = n;
449 
450 	threads[n].flags = 0;
451 	init_regs(threads + n, args);
452 
453 	/* Save Hypervisor Client ID */
454 	threads[n].hyp_clnt_id = args->a7;
455 
456 	thread_lazy_save_ns_vfp();
457 	thread_resume(&threads[n].regs);
458 }
459 
460 #ifdef ARM32
461 static void copy_a0_to_a5(struct thread_ctx_regs *regs,
462 		struct thread_smc_args *args)
463 {
464 	/*
465 	 * Update returned values from RPC, values will appear in
466 	 * r0-r3 when thread is resumed.
467 	 */
468 	regs->r0 = args->a0;
469 	regs->r1 = args->a1;
470 	regs->r2 = args->a2;
471 	regs->r3 = args->a3;
472 	regs->r4 = args->a4;
473 	regs->r5 = args->a5;
474 }
475 #endif /*ARM32*/
476 
477 #ifdef ARM64
478 static void copy_a0_to_a5(struct thread_ctx_regs *regs,
479 		struct thread_smc_args *args)
480 {
481 	/*
482 	 * Update returned values from RPC, values will appear in
483 	 * x0-x3 when thread is resumed.
484 	 */
485 	regs->x[0] = args->a0;
486 	regs->x[1] = args->a1;
487 	regs->x[2] = args->a2;
488 	regs->x[3] = args->a3;
489 	regs->x[4] = args->a4;
490 	regs->x[5] = args->a5;
491 }
492 #endif /*ARM64*/
493 
494 #ifdef ARM32
495 static bool is_from_user(uint32_t cpsr)
496 {
497 	return (cpsr & ARM32_CPSR_MODE_MASK) == ARM32_CPSR_MODE_USR;
498 }
499 #endif
500 
501 #ifdef ARM64
502 static bool is_from_user(uint32_t cpsr)
503 {
504 	if (cpsr & (SPSR_MODE_RW_32 << SPSR_MODE_RW_SHIFT))
505 		return true;
506 	if (((cpsr >> SPSR_64_MODE_EL_SHIFT) & SPSR_64_MODE_EL_MASK) ==
507 	     SPSR_64_MODE_EL0)
508 		return true;
509 	return false;
510 }
511 #endif
512 
513 static bool is_user_mode(struct thread_ctx_regs *regs)
514 {
515 	return is_from_user((uint32_t)regs->cpsr);
516 }
517 
518 static void thread_resume_from_rpc(struct thread_smc_args *args)
519 {
520 	size_t n = args->a3; /* thread id */
521 	struct thread_core_local *l = thread_get_core_local();
522 	uint32_t rv = 0;
523 
524 	assert(l->curr_thread == -1);
525 
526 	lock_global();
527 
528 	if (n < CFG_NUM_THREADS &&
529 	    threads[n].state == THREAD_STATE_SUSPENDED &&
530 	    args->a7 == threads[n].hyp_clnt_id)
531 		threads[n].state = THREAD_STATE_ACTIVE;
532 	else
533 		rv = OPTEE_SMC_RETURN_ERESUME;
534 
535 	unlock_global();
536 
537 	if (rv) {
538 		args->a0 = rv;
539 		return;
540 	}
541 
542 	l->curr_thread = n;
543 
544 	if (is_user_mode(&threads[n].regs))
545 		tee_ta_update_session_utime_resume();
546 
547 	if (threads[n].have_user_map)
548 		core_mmu_set_user_map(&threads[n].user_map);
549 
550 	/*
551 	 * Return from RPC to request service of a foreign interrupt must not
552 	 * get parameters from non-secure world.
553 	 */
554 	if (threads[n].flags & THREAD_FLAGS_COPY_ARGS_ON_RETURN) {
555 		copy_a0_to_a5(&threads[n].regs, args);
556 		threads[n].flags &= ~THREAD_FLAGS_COPY_ARGS_ON_RETURN;
557 	}
558 
559 	thread_lazy_save_ns_vfp();
560 	thread_resume(&threads[n].regs);
561 }
562 
563 void thread_handle_fast_smc(struct thread_smc_args *args)
564 {
565 	thread_check_canaries();
566 	thread_fast_smc_handler_ptr(args);
567 	/* Fast handlers must not unmask any exceptions */
568 	assert(thread_get_exceptions() == THREAD_EXCP_ALL);
569 }
570 
571 void thread_handle_std_smc(struct thread_smc_args *args)
572 {
573 	thread_check_canaries();
574 
575 	if (args->a0 == OPTEE_SMC_CALL_RETURN_FROM_RPC)
576 		thread_resume_from_rpc(args);
577 	else
578 		thread_alloc_and_run(args);
579 }
580 
581 /*
582  * Helper routine for the assembly function thread_std_smc_entry()
583  *
584  * Note: this function is weak just to make it possible to exclude it from
585  * the unpaged area.
586  */
587 void __weak __thread_std_smc_entry(struct thread_smc_args *args)
588 {
589 	thread_std_smc_handler_ptr(args);
590 
591 	if (args->a0 == OPTEE_SMC_RETURN_OK) {
592 		struct thread_ctx *thr = threads + thread_get_id();
593 
594 		tee_fs_rpc_cache_clear(&thr->tsd);
595 		if (!thread_prealloc_rpc_cache) {
596 			thread_rpc_free_arg(thr->rpc_carg);
597 			mobj_free(thr->rpc_mobj);
598 			thr->rpc_carg = 0;
599 			thr->rpc_arg = 0;
600 			thr->rpc_mobj = NULL;
601 		}
602 	}
603 }
604 
605 void *thread_get_tmp_sp(void)
606 {
607 	struct thread_core_local *l = thread_get_core_local();
608 
609 	return (void *)l->tmp_stack_va_end;
610 }
611 
612 #ifdef ARM64
613 vaddr_t thread_get_saved_thread_sp(void)
614 {
615 	struct thread_core_local *l = thread_get_core_local();
616 	int ct = l->curr_thread;
617 
618 	assert(ct != -1);
619 	return threads[ct].kern_sp;
620 }
621 #endif /*ARM64*/
622 
623 vaddr_t thread_stack_start(void)
624 {
625 	struct thread_ctx *thr;
626 	int ct = thread_get_id_may_fail();
627 
628 	if (ct == -1)
629 		return 0;
630 
631 	thr = threads + ct;
632 	return thr->stack_va_end - STACK_THREAD_SIZE;
633 }
634 
635 size_t thread_stack_size(void)
636 {
637 	return STACK_THREAD_SIZE;
638 }
639 
640 bool thread_is_from_abort_mode(void)
641 {
642 	struct thread_core_local *l = thread_get_core_local();
643 
644 	return (l->flags >> THREAD_CLF_SAVED_SHIFT) & THREAD_CLF_ABORT;
645 }
646 
647 #ifdef ARM32
648 bool thread_is_in_normal_mode(void)
649 {
650 	return (read_cpsr() & ARM32_CPSR_MODE_MASK) == ARM32_CPSR_MODE_SVC;
651 }
652 #endif
653 
654 #ifdef ARM64
655 bool thread_is_in_normal_mode(void)
656 {
657 	uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR);
658 	struct thread_core_local *l = thread_get_core_local();
659 	bool ret;
660 
661 	/* If any bit in l->flags is set we're handling some exception. */
662 	ret = !l->flags;
663 	thread_unmask_exceptions(exceptions);
664 
665 	return ret;
666 }
667 #endif
668 
669 void thread_state_free(void)
670 {
671 	struct thread_core_local *l = thread_get_core_local();
672 	int ct = l->curr_thread;
673 
674 	assert(ct != -1);
675 	assert(TAILQ_EMPTY(&threads[ct].mutexes));
676 
677 	thread_lazy_restore_ns_vfp();
678 	tee_pager_release_phys(
679 		(void *)(threads[ct].stack_va_end - STACK_THREAD_SIZE),
680 		STACK_THREAD_SIZE);
681 
682 	lock_global();
683 
684 	assert(threads[ct].state == THREAD_STATE_ACTIVE);
685 	threads[ct].state = THREAD_STATE_FREE;
686 	threads[ct].flags = 0;
687 	l->curr_thread = -1;
688 
689 	unlock_global();
690 }
691 
692 #ifdef CFG_WITH_PAGER
693 static void release_unused_kernel_stack(struct thread_ctx *thr,
694 					uint32_t cpsr __maybe_unused)
695 {
696 #ifdef ARM64
697 	/*
698 	 * If we're from user mode then thr->regs.sp is the saved user
699 	 * stack pointer and thr->kern_sp holds the last kernel stack
700 	 * pointer. But if we're from kernel mode then thr->kern_sp isn't
701 	 * up to date so we need to read from thr->regs.sp instead.
702 	 */
703 	vaddr_t sp = is_from_user(cpsr) ?  thr->kern_sp : thr->regs.sp;
704 #else
705 	vaddr_t sp = thr->regs.svc_sp;
706 #endif
707 	vaddr_t base = thr->stack_va_end - STACK_THREAD_SIZE;
708 	size_t len = sp - base;
709 
710 	tee_pager_release_phys((void *)base, len);
711 }
712 #else
713 static void release_unused_kernel_stack(struct thread_ctx *thr __unused,
714 					uint32_t cpsr __unused)
715 {
716 }
717 #endif
718 
719 int thread_state_suspend(uint32_t flags, uint32_t cpsr, vaddr_t pc)
720 {
721 	struct thread_core_local *l = thread_get_core_local();
722 	int ct = l->curr_thread;
723 
724 	assert(ct != -1);
725 
726 	thread_check_canaries();
727 
728 	release_unused_kernel_stack(threads + ct, cpsr);
729 
730 	if (is_from_user(cpsr)) {
731 		thread_user_save_vfp();
732 		tee_ta_update_session_utime_suspend();
733 		tee_ta_gprof_sample_pc(pc);
734 	}
735 	thread_lazy_restore_ns_vfp();
736 
737 	lock_global();
738 
739 	assert(threads[ct].state == THREAD_STATE_ACTIVE);
740 	threads[ct].flags |= flags;
741 	threads[ct].regs.cpsr = cpsr;
742 	threads[ct].regs.pc = pc;
743 	threads[ct].state = THREAD_STATE_SUSPENDED;
744 
745 	threads[ct].have_user_map = core_mmu_user_mapping_is_active();
746 	if (threads[ct].have_user_map) {
747 		core_mmu_get_user_map(&threads[ct].user_map);
748 		core_mmu_set_user_map(NULL);
749 	}
750 
751 	l->curr_thread = -1;
752 
753 	unlock_global();
754 
755 	return ct;
756 }
757 
758 #ifdef ARM32
759 static void set_tmp_stack(struct thread_core_local *l, vaddr_t sp)
760 {
761 	l->tmp_stack_va_end = sp;
762 	thread_set_irq_sp(sp);
763 	thread_set_fiq_sp(sp);
764 }
765 
766 static void set_abt_stack(struct thread_core_local *l, vaddr_t sp)
767 {
768 	l->abt_stack_va_end = sp;
769 	thread_set_abt_sp((vaddr_t)l);
770 	thread_set_und_sp((vaddr_t)l);
771 }
772 #endif /*ARM32*/
773 
774 #ifdef ARM64
775 static void set_tmp_stack(struct thread_core_local *l, vaddr_t sp)
776 {
777 	/*
778 	 * We're already using the tmp stack when this function is called
779 	 * so there's no need to assign it to any stack pointer. However,
780 	 * we'll need to restore it at different times so store it here.
781 	 */
782 	l->tmp_stack_va_end = sp;
783 }
784 
785 static void set_abt_stack(struct thread_core_local *l, vaddr_t sp)
786 {
787 	l->abt_stack_va_end = sp;
788 }
789 #endif /*ARM64*/
790 
791 bool thread_init_stack(uint32_t thread_id, vaddr_t sp)
792 {
793 	if (thread_id >= CFG_NUM_THREADS)
794 		return false;
795 	threads[thread_id].stack_va_end = sp;
796 	return true;
797 }
798 
799 int thread_get_id_may_fail(void)
800 {
801 	/*
802 	 * thread_get_core_local() requires foreign interrupts to be disabled
803 	 */
804 	uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR);
805 	struct thread_core_local *l = thread_get_core_local();
806 	int ct = l->curr_thread;
807 
808 	thread_unmask_exceptions(exceptions);
809 	return ct;
810 }
811 
812 int thread_get_id(void)
813 {
814 	int ct = thread_get_id_may_fail();
815 
816 	assert(ct >= 0 && ct < CFG_NUM_THREADS);
817 	return ct;
818 }
819 
820 static void init_handlers(const struct thread_handlers *handlers)
821 {
822 	thread_std_smc_handler_ptr = handlers->std_smc;
823 	thread_fast_smc_handler_ptr = handlers->fast_smc;
824 	thread_nintr_handler_ptr = handlers->nintr;
825 	thread_cpu_on_handler_ptr = handlers->cpu_on;
826 	thread_cpu_off_handler_ptr = handlers->cpu_off;
827 	thread_cpu_suspend_handler_ptr = handlers->cpu_suspend;
828 	thread_cpu_resume_handler_ptr = handlers->cpu_resume;
829 	thread_system_off_handler_ptr = handlers->system_off;
830 	thread_system_reset_handler_ptr = handlers->system_reset;
831 }
832 
833 #ifdef CFG_WITH_PAGER
834 static void init_thread_stacks(void)
835 {
836 	size_t n;
837 
838 	/*
839 	 * Allocate virtual memory for thread stacks.
840 	 */
841 	for (n = 0; n < CFG_NUM_THREADS; n++) {
842 		tee_mm_entry_t *mm;
843 		vaddr_t sp;
844 
845 		/* Find vmem for thread stack and its protection gap */
846 		mm = tee_mm_alloc(&tee_mm_vcore,
847 				  SMALL_PAGE_SIZE + STACK_THREAD_SIZE);
848 		assert(mm);
849 
850 		/* Claim eventual physical page */
851 		tee_pager_add_pages(tee_mm_get_smem(mm), tee_mm_get_size(mm),
852 				    true);
853 
854 		/* Add the area to the pager */
855 		tee_pager_add_core_area(tee_mm_get_smem(mm) + SMALL_PAGE_SIZE,
856 					tee_mm_get_bytes(mm) - SMALL_PAGE_SIZE,
857 					TEE_MATTR_PRW | TEE_MATTR_LOCKED,
858 					NULL, NULL);
859 
860 		/* init effective stack */
861 		sp = tee_mm_get_smem(mm) + tee_mm_get_bytes(mm);
862 		asan_tag_access((void *)tee_mm_get_smem(mm), (void *)sp);
863 		if (!thread_init_stack(n, sp))
864 			panic("init stack failed");
865 	}
866 }
867 #else
868 static void init_thread_stacks(void)
869 {
870 	size_t n;
871 
872 	/* Assign the thread stacks */
873 	for (n = 0; n < CFG_NUM_THREADS; n++) {
874 		if (!thread_init_stack(n, GET_STACK(stack_thread[n])))
875 			panic("thread_init_stack failed");
876 	}
877 }
878 #endif /*CFG_WITH_PAGER*/
879 
880 static void init_user_kcode(void)
881 {
882 #ifdef CFG_CORE_UNMAP_CORE_AT_EL0
883 	vaddr_t v = (vaddr_t)thread_excp_vect;
884 	vaddr_t ve = (vaddr_t)thread_excp_vect_end;
885 
886 	thread_user_kcode_va = ROUNDDOWN(v, CORE_MMU_USER_CODE_SIZE);
887 	ve = ROUNDUP(ve, CORE_MMU_USER_CODE_SIZE);
888 	thread_user_kcode_size = ve - thread_user_kcode_va;
889 
890 	core_mmu_get_user_va_range(&v, NULL);
891 	thread_user_kcode_offset = thread_user_kcode_va - v;
892 
893 #if defined(CFG_CORE_WORKAROUND_SPECTRE_BP_SEC) && defined(ARM64)
894 	/*
895 	 * When transitioning to EL0 subtract SP with this much to point to
896 	 * this special kdata page instead. SP is restored by add this much
897 	 * while transitioning back to EL1.
898 	 */
899 	v += thread_user_kcode_size;
900 	thread_user_kdata_sp_offset = (vaddr_t)thread_core_local - v;
901 #endif
902 #endif /*CFG_CORE_UNMAP_CORE_AT_EL0*/
903 }
904 
905 void thread_init_primary(const struct thread_handlers *handlers)
906 {
907 	init_handlers(handlers);
908 
909 	/* Initialize canaries around the stacks */
910 	init_canaries();
911 
912 	init_thread_stacks();
913 	pgt_init();
914 
915 	init_user_kcode();
916 }
917 
918 static void init_sec_mon(size_t pos __maybe_unused)
919 {
920 #if !defined(CFG_WITH_ARM_TRUSTED_FW)
921 	/* Initialize secure monitor */
922 	sm_init(GET_STACK(stack_tmp[pos]));
923 #endif
924 }
925 
926 static uint32_t __maybe_unused get_midr_implementer(uint32_t midr)
927 {
928 	return (midr >> MIDR_IMPLEMENTER_SHIFT) & MIDR_IMPLEMENTER_MASK;
929 }
930 
931 static uint32_t __maybe_unused get_midr_primary_part(uint32_t midr)
932 {
933 	return (midr >> MIDR_PRIMARY_PART_NUM_SHIFT) &
934 	       MIDR_PRIMARY_PART_NUM_MASK;
935 }
936 
937 #ifdef ARM64
938 static bool probe_workaround_available(void)
939 {
940 	int32_t r;
941 
942 	r = thread_smc(SMCCC_VERSION, 0, 0, 0);
943 	if (r < 0)
944 		return false;
945 	if (r < 0x10001)	/* compare with version 1.1 */
946 		return false;
947 
948 	/* Version >= 1.1, so SMCCC_ARCH_FEATURES is available */
949 	r = thread_smc(SMCCC_ARCH_FEATURES, SMCCC_ARCH_WORKAROUND_1, 0, 0);
950 	return r >= 0;
951 }
952 
953 static vaddr_t select_vector(vaddr_t a)
954 {
955 	if (probe_workaround_available()) {
956 		DMSG("SMCCC_ARCH_WORKAROUND_1 (%#08" PRIx32 ") available",
957 		     SMCCC_ARCH_WORKAROUND_1);
958 		DMSG("SMC Workaround for CVE-2017-5715 used");
959 		return a;
960 	}
961 
962 	DMSG("SMCCC_ARCH_WORKAROUND_1 (%#08" PRIx32 ") unavailable",
963 	     SMCCC_ARCH_WORKAROUND_1);
964 	DMSG("SMC Workaround for CVE-2017-5715 not needed (if ARM-TF is up to date)");
965 	return (vaddr_t)thread_excp_vect;
966 }
967 #else
968 static vaddr_t select_vector(vaddr_t a)
969 {
970 	return a;
971 }
972 #endif
973 
974 static vaddr_t get_excp_vect(void)
975 {
976 #ifdef CFG_CORE_WORKAROUND_SPECTRE_BP_SEC
977 	uint32_t midr = read_midr();
978 
979 	if (get_midr_implementer(midr) != MIDR_IMPLEMENTER_ARM)
980 		return (vaddr_t)thread_excp_vect;
981 
982 	switch (get_midr_primary_part(midr)) {
983 #ifdef ARM32
984 	case CORTEX_A8_PART_NUM:
985 	case CORTEX_A9_PART_NUM:
986 	case CORTEX_A17_PART_NUM:
987 #endif
988 	case CORTEX_A57_PART_NUM:
989 	case CORTEX_A72_PART_NUM:
990 	case CORTEX_A73_PART_NUM:
991 	case CORTEX_A75_PART_NUM:
992 		return select_vector((vaddr_t)thread_excp_vect_workaround);
993 #ifdef ARM32
994 	case CORTEX_A15_PART_NUM:
995 		return select_vector((vaddr_t)thread_excp_vect_workaround_a15);
996 #endif
997 	default:
998 		return (vaddr_t)thread_excp_vect;
999 	}
1000 #endif /*CFG_CORE_WORKAROUND_SPECTRE_BP_SEC*/
1001 
1002 	return (vaddr_t)thread_excp_vect;
1003 }
1004 
1005 void thread_init_per_cpu(void)
1006 {
1007 	size_t pos = get_core_pos();
1008 	struct thread_core_local *l = thread_get_core_local();
1009 
1010 	init_sec_mon(pos);
1011 
1012 	set_tmp_stack(l, GET_STACK(stack_tmp[pos]) - STACK_TMP_OFFS);
1013 	set_abt_stack(l, GET_STACK(stack_abt[pos]));
1014 
1015 	thread_init_vbar(get_excp_vect());
1016 }
1017 
1018 struct thread_specific_data *thread_get_tsd(void)
1019 {
1020 	return &threads[thread_get_id()].tsd;
1021 }
1022 
1023 struct thread_ctx_regs *thread_get_ctx_regs(void)
1024 {
1025 	struct thread_core_local *l = thread_get_core_local();
1026 
1027 	assert(l->curr_thread != -1);
1028 	return &threads[l->curr_thread].regs;
1029 }
1030 
1031 void thread_set_foreign_intr(bool enable)
1032 {
1033 	/* thread_get_core_local() requires foreign interrupts to be disabled */
1034 	uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR);
1035 	struct thread_core_local *l;
1036 
1037 	l = thread_get_core_local();
1038 
1039 	assert(l->curr_thread != -1);
1040 
1041 	if (enable) {
1042 		threads[l->curr_thread].flags |=
1043 					THREAD_FLAGS_FOREIGN_INTR_ENABLE;
1044 		thread_set_exceptions(exceptions & ~THREAD_EXCP_FOREIGN_INTR);
1045 	} else {
1046 		/*
1047 		 * No need to disable foreign interrupts here since they're
1048 		 * already disabled above.
1049 		 */
1050 		threads[l->curr_thread].flags &=
1051 					~THREAD_FLAGS_FOREIGN_INTR_ENABLE;
1052 	}
1053 }
1054 
1055 void thread_restore_foreign_intr(void)
1056 {
1057 	/* thread_get_core_local() requires foreign interrupts to be disabled */
1058 	uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR);
1059 	struct thread_core_local *l;
1060 
1061 	l = thread_get_core_local();
1062 
1063 	assert(l->curr_thread != -1);
1064 
1065 	if (threads[l->curr_thread].flags & THREAD_FLAGS_FOREIGN_INTR_ENABLE)
1066 		thread_set_exceptions(exceptions & ~THREAD_EXCP_FOREIGN_INTR);
1067 }
1068 
1069 #ifdef CFG_WITH_VFP
1070 uint32_t thread_kernel_enable_vfp(void)
1071 {
1072 	uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR);
1073 	struct thread_ctx *thr = threads + thread_get_id();
1074 	struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp;
1075 
1076 	assert(!vfp_is_enabled());
1077 
1078 	if (!thr->vfp_state.ns_saved) {
1079 		vfp_lazy_save_state_final(&thr->vfp_state.ns);
1080 		thr->vfp_state.ns_saved = true;
1081 	} else if (thr->vfp_state.sec_lazy_saved &&
1082 		   !thr->vfp_state.sec_saved) {
1083 		/*
1084 		 * This happens when we're handling an abort while the
1085 		 * thread was using the VFP state.
1086 		 */
1087 		vfp_lazy_save_state_final(&thr->vfp_state.sec);
1088 		thr->vfp_state.sec_saved = true;
1089 	} else if (tuv && tuv->lazy_saved && !tuv->saved) {
1090 		/*
1091 		 * This can happen either during syscall or abort
1092 		 * processing (while processing a syscall).
1093 		 */
1094 		vfp_lazy_save_state_final(&tuv->vfp);
1095 		tuv->saved = true;
1096 	}
1097 
1098 	vfp_enable();
1099 	return exceptions;
1100 }
1101 
1102 void thread_kernel_disable_vfp(uint32_t state)
1103 {
1104 	uint32_t exceptions;
1105 
1106 	assert(vfp_is_enabled());
1107 
1108 	vfp_disable();
1109 	exceptions = thread_get_exceptions();
1110 	assert(exceptions & THREAD_EXCP_FOREIGN_INTR);
1111 	exceptions &= ~THREAD_EXCP_FOREIGN_INTR;
1112 	exceptions |= state & THREAD_EXCP_FOREIGN_INTR;
1113 	thread_set_exceptions(exceptions);
1114 }
1115 
1116 void thread_kernel_save_vfp(void)
1117 {
1118 	struct thread_ctx *thr = threads + thread_get_id();
1119 
1120 	assert(thread_get_exceptions() & THREAD_EXCP_FOREIGN_INTR);
1121 	if (vfp_is_enabled()) {
1122 		vfp_lazy_save_state_init(&thr->vfp_state.sec);
1123 		thr->vfp_state.sec_lazy_saved = true;
1124 	}
1125 }
1126 
1127 void thread_kernel_restore_vfp(void)
1128 {
1129 	struct thread_ctx *thr = threads + thread_get_id();
1130 
1131 	assert(thread_get_exceptions() & THREAD_EXCP_FOREIGN_INTR);
1132 	assert(!vfp_is_enabled());
1133 	if (thr->vfp_state.sec_lazy_saved) {
1134 		vfp_lazy_restore_state(&thr->vfp_state.sec,
1135 				       thr->vfp_state.sec_saved);
1136 		thr->vfp_state.sec_saved = false;
1137 		thr->vfp_state.sec_lazy_saved = false;
1138 	}
1139 }
1140 
1141 void thread_user_enable_vfp(struct thread_user_vfp_state *uvfp)
1142 {
1143 	struct thread_ctx *thr = threads + thread_get_id();
1144 	struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp;
1145 
1146 	assert(thread_get_exceptions() & THREAD_EXCP_FOREIGN_INTR);
1147 	assert(!vfp_is_enabled());
1148 
1149 	if (!thr->vfp_state.ns_saved) {
1150 		vfp_lazy_save_state_final(&thr->vfp_state.ns);
1151 		thr->vfp_state.ns_saved = true;
1152 	} else if (tuv && uvfp != tuv) {
1153 		if (tuv->lazy_saved && !tuv->saved) {
1154 			vfp_lazy_save_state_final(&tuv->vfp);
1155 			tuv->saved = true;
1156 		}
1157 	}
1158 
1159 	if (uvfp->lazy_saved)
1160 		vfp_lazy_restore_state(&uvfp->vfp, uvfp->saved);
1161 	uvfp->lazy_saved = false;
1162 	uvfp->saved = false;
1163 
1164 	thr->vfp_state.uvfp = uvfp;
1165 	vfp_enable();
1166 }
1167 
1168 void thread_user_save_vfp(void)
1169 {
1170 	struct thread_ctx *thr = threads + thread_get_id();
1171 	struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp;
1172 
1173 	assert(thread_get_exceptions() & THREAD_EXCP_FOREIGN_INTR);
1174 	if (!vfp_is_enabled())
1175 		return;
1176 
1177 	assert(tuv && !tuv->lazy_saved && !tuv->saved);
1178 	vfp_lazy_save_state_init(&tuv->vfp);
1179 	tuv->lazy_saved = true;
1180 }
1181 
1182 void thread_user_clear_vfp(struct thread_user_vfp_state *uvfp)
1183 {
1184 	struct thread_ctx *thr = threads + thread_get_id();
1185 
1186 	if (uvfp == thr->vfp_state.uvfp)
1187 		thr->vfp_state.uvfp = NULL;
1188 	uvfp->lazy_saved = false;
1189 	uvfp->saved = false;
1190 }
1191 #endif /*CFG_WITH_VFP*/
1192 
1193 #ifdef ARM32
1194 static bool get_spsr(bool is_32bit, unsigned long entry_func, uint32_t *spsr)
1195 {
1196 	uint32_t s;
1197 
1198 	if (!is_32bit)
1199 		return false;
1200 
1201 	s = read_spsr();
1202 	s &= ~(CPSR_MODE_MASK | CPSR_T | CPSR_IT_MASK1 | CPSR_IT_MASK2);
1203 	s |= CPSR_MODE_USR;
1204 	if (entry_func & 1)
1205 		s |= CPSR_T;
1206 	*spsr = s;
1207 	return true;
1208 }
1209 #endif
1210 
1211 #ifdef ARM64
1212 static bool get_spsr(bool is_32bit, unsigned long entry_func, uint32_t *spsr)
1213 {
1214 	uint32_t s;
1215 
1216 	if (is_32bit) {
1217 		s = read_daif() & (SPSR_32_AIF_MASK << SPSR_32_AIF_SHIFT);
1218 		s |= SPSR_MODE_RW_32 << SPSR_MODE_RW_SHIFT;
1219 		s |= (entry_func & SPSR_32_T_MASK) << SPSR_32_T_SHIFT;
1220 	} else {
1221 		s = read_daif() & (SPSR_64_DAIF_MASK << SPSR_64_DAIF_SHIFT);
1222 	}
1223 
1224 	*spsr = s;
1225 	return true;
1226 }
1227 #endif
1228 
1229 uint32_t thread_enter_user_mode(unsigned long a0, unsigned long a1,
1230 		unsigned long a2, unsigned long a3, unsigned long user_sp,
1231 		unsigned long entry_func, bool is_32bit,
1232 		uint32_t *exit_status0, uint32_t *exit_status1)
1233 {
1234 	uint32_t spsr;
1235 
1236 	tee_ta_update_session_utime_resume();
1237 
1238 	if (!get_spsr(is_32bit, entry_func, &spsr)) {
1239 		*exit_status0 = 1; /* panic */
1240 		*exit_status1 = 0xbadbadba;
1241 		return 0;
1242 	}
1243 	return __thread_enter_user_mode(a0, a1, a2, a3, user_sp, entry_func,
1244 					spsr, exit_status0, exit_status1);
1245 }
1246 
1247 #ifdef CFG_CORE_UNMAP_CORE_AT_EL0
1248 void thread_get_user_kcode(struct mobj **mobj, size_t *offset,
1249 			   vaddr_t *va, size_t *sz)
1250 {
1251 	core_mmu_get_user_va_range(va, NULL);
1252 	*mobj = mobj_tee_ram;
1253 	*offset = thread_user_kcode_va - TEE_RAM_START;
1254 	*sz = thread_user_kcode_size;
1255 }
1256 #endif
1257 
1258 #if defined(CFG_CORE_UNMAP_CORE_AT_EL0) && \
1259 	defined(CFG_CORE_WORKAROUND_SPECTRE_BP_SEC) && defined(ARM64)
1260 void thread_get_user_kdata(struct mobj **mobj, size_t *offset,
1261 			   vaddr_t *va, size_t *sz)
1262 {
1263 	vaddr_t v;
1264 
1265 	core_mmu_get_user_va_range(&v, NULL);
1266 	*va = v + thread_user_kcode_size;
1267 	*mobj = mobj_tee_ram;
1268 	*offset = (vaddr_t)thread_user_kdata_page - TEE_RAM_START;
1269 	*sz = sizeof(thread_user_kdata_page);
1270 }
1271 #endif
1272 
1273 void thread_add_mutex(struct mutex *m)
1274 {
1275 	struct thread_core_local *l = thread_get_core_local();
1276 	int ct = l->curr_thread;
1277 
1278 	assert(ct != -1 && threads[ct].state == THREAD_STATE_ACTIVE);
1279 	assert(m->owner_id == MUTEX_OWNER_ID_NONE);
1280 	m->owner_id = ct;
1281 	TAILQ_INSERT_TAIL(&threads[ct].mutexes, m, link);
1282 }
1283 
1284 void thread_rem_mutex(struct mutex *m)
1285 {
1286 	struct thread_core_local *l = thread_get_core_local();
1287 	int ct = l->curr_thread;
1288 
1289 	assert(ct != -1 && threads[ct].state == THREAD_STATE_ACTIVE);
1290 	assert(m->owner_id == ct);
1291 	m->owner_id = MUTEX_OWNER_ID_NONE;
1292 	TAILQ_REMOVE(&threads[ct].mutexes, m, link);
1293 }
1294 
1295 bool thread_disable_prealloc_rpc_cache(uint64_t *cookie)
1296 {
1297 	bool rv;
1298 	size_t n;
1299 	uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR);
1300 
1301 	lock_global();
1302 
1303 	for (n = 0; n < CFG_NUM_THREADS; n++) {
1304 		if (threads[n].state != THREAD_STATE_FREE) {
1305 			rv = false;
1306 			goto out;
1307 		}
1308 	}
1309 
1310 	rv = true;
1311 	for (n = 0; n < CFG_NUM_THREADS; n++) {
1312 		if (threads[n].rpc_arg) {
1313 			mobj_free(threads[n].rpc_mobj);
1314 			*cookie = threads[n].rpc_carg;
1315 			threads[n].rpc_carg = 0;
1316 			threads[n].rpc_arg = NULL;
1317 			goto out;
1318 		}
1319 	}
1320 
1321 	*cookie = 0;
1322 	thread_prealloc_rpc_cache = false;
1323 out:
1324 	unlock_global();
1325 	thread_unmask_exceptions(exceptions);
1326 	return rv;
1327 }
1328 
1329 bool thread_enable_prealloc_rpc_cache(void)
1330 {
1331 	bool rv;
1332 	size_t n;
1333 	uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR);
1334 
1335 	lock_global();
1336 
1337 	for (n = 0; n < CFG_NUM_THREADS; n++) {
1338 		if (threads[n].state != THREAD_STATE_FREE) {
1339 			rv = false;
1340 			goto out;
1341 		}
1342 	}
1343 
1344 	rv = true;
1345 	thread_prealloc_rpc_cache = true;
1346 out:
1347 	unlock_global();
1348 	thread_unmask_exceptions(exceptions);
1349 	return rv;
1350 }
1351 
1352 void thread_rpc_free_arg(uint64_t cookie)
1353 {
1354 	if (cookie) {
1355 		uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = {
1356 			OPTEE_SMC_RETURN_RPC_FREE
1357 		};
1358 
1359 		reg_pair_from_64(cookie, rpc_args + 1, rpc_args + 2);
1360 		thread_rpc(rpc_args);
1361 	}
1362 }
1363 
1364 struct mobj *thread_rpc_alloc_arg(size_t size, uint64_t *cookie)
1365 {
1366 	paddr_t pa;
1367 	uint64_t co;
1368 	uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = {
1369 		OPTEE_SMC_RETURN_RPC_ALLOC, size
1370 	};
1371 	struct mobj *mobj = NULL;
1372 
1373 	thread_rpc(rpc_args);
1374 
1375 	pa = reg_pair_to_64(rpc_args[1], rpc_args[2]);
1376 	co = reg_pair_to_64(rpc_args[4], rpc_args[5]);
1377 
1378 	if (!ALIGNMENT_IS_OK(pa, struct optee_msg_arg))
1379 		goto err;
1380 
1381 	/* Check if this region is in static shared space */
1382 	if (core_pbuf_is(CORE_MEM_NSEC_SHM, pa, size))
1383 		mobj = mobj_shm_alloc(pa, size);
1384 	else if ((!(pa & SMALL_PAGE_MASK)) && size <= SMALL_PAGE_SIZE)
1385 		mobj = mobj_mapped_shm_alloc(&pa, 1, 0, co);
1386 
1387 	if (!mobj)
1388 		goto err;
1389 
1390 	*cookie = co;
1391 	return mobj;
1392 err:
1393 	thread_rpc_free_arg(co);
1394 	mobj_free(mobj);
1395 	*cookie = 0;
1396 	return NULL;
1397 }
1398 
1399 static bool get_rpc_arg(uint32_t cmd, size_t num_params,
1400 			struct optee_msg_arg **arg_ret, uint64_t *carg_ret)
1401 {
1402 	struct thread_ctx *thr = threads + thread_get_id();
1403 	struct optee_msg_arg *arg = thr->rpc_arg;
1404 	struct mobj *mobj;
1405 	size_t sz = OPTEE_MSG_GET_ARG_SIZE(THREAD_RPC_MAX_NUM_PARAMS);
1406 	uint64_t c;
1407 
1408 	if (num_params > THREAD_RPC_MAX_NUM_PARAMS)
1409 		return false;
1410 
1411 	if (!arg) {
1412 		mobj = thread_rpc_alloc_arg(sz, &c);
1413 		if (!mobj)
1414 			return false;
1415 
1416 		arg = mobj_get_va(mobj, 0);
1417 		if (!arg)
1418 			goto bad;
1419 
1420 		thr->rpc_arg = arg;
1421 		thr->rpc_carg = c;
1422 		thr->rpc_mobj = mobj;
1423 	}
1424 
1425 	memset(arg, 0, OPTEE_MSG_GET_ARG_SIZE(num_params));
1426 	arg->cmd = cmd;
1427 	arg->num_params = num_params;
1428 	arg->ret = TEE_ERROR_GENERIC; /* in case value isn't updated */
1429 
1430 	*arg_ret = arg;
1431 	*carg_ret = thr->rpc_carg;
1432 	return true;
1433 
1434 bad:
1435 	thread_rpc_free_arg(c);
1436 	return false;
1437 }
1438 
1439 uint32_t thread_rpc_cmd(uint32_t cmd, size_t num_params,
1440 			struct optee_msg_param *params)
1441 {
1442 	uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { OPTEE_SMC_RETURN_RPC_CMD };
1443 	struct optee_msg_arg *arg;
1444 	uint64_t carg;
1445 	size_t n;
1446 
1447 	/* The source CRYPTO_RNG_SRC_JITTER_RPC is safe to use here */
1448 	plat_prng_add_jitter_entropy(CRYPTO_RNG_SRC_JITTER_RPC,
1449 				     &thread_rpc_pnum);
1450 
1451 	if (!get_rpc_arg(cmd, num_params, &arg, &carg))
1452 		return TEE_ERROR_OUT_OF_MEMORY;
1453 
1454 	memcpy(arg->params, params, sizeof(*params) * num_params);
1455 
1456 	reg_pair_from_64(carg, rpc_args + 1, rpc_args + 2);
1457 	thread_rpc(rpc_args);
1458 	for (n = 0; n < num_params; n++) {
1459 		switch (params[n].attr & OPTEE_MSG_ATTR_TYPE_MASK) {
1460 		case OPTEE_MSG_ATTR_TYPE_VALUE_OUTPUT:
1461 		case OPTEE_MSG_ATTR_TYPE_VALUE_INOUT:
1462 		case OPTEE_MSG_ATTR_TYPE_RMEM_OUTPUT:
1463 		case OPTEE_MSG_ATTR_TYPE_RMEM_INOUT:
1464 		case OPTEE_MSG_ATTR_TYPE_TMEM_OUTPUT:
1465 		case OPTEE_MSG_ATTR_TYPE_TMEM_INOUT:
1466 			params[n] = arg->params[n];
1467 			break;
1468 		default:
1469 			break;
1470 		}
1471 	}
1472 	return arg->ret;
1473 }
1474 
1475 /**
1476  * Free physical memory previously allocated with thread_rpc_alloc()
1477  *
1478  * @cookie:	cookie received when allocating the buffer
1479  * @bt:		must be the same as supplied when allocating
1480  * @mobj:	mobj that describes allocated buffer
1481  *
1482  * This function also frees corresponding mobj.
1483  */
1484 static void thread_rpc_free(unsigned int bt, uint64_t cookie, struct mobj *mobj)
1485 {
1486 	uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { OPTEE_SMC_RETURN_RPC_CMD };
1487 	struct optee_msg_arg *arg;
1488 	uint64_t carg;
1489 
1490 	if (!get_rpc_arg(OPTEE_MSG_RPC_CMD_SHM_FREE, 1, &arg, &carg))
1491 		return;
1492 
1493 	arg->params[0].attr = OPTEE_MSG_ATTR_TYPE_VALUE_INPUT;
1494 	arg->params[0].u.value.a = bt;
1495 	arg->params[0].u.value.b = cookie;
1496 	arg->params[0].u.value.c = 0;
1497 
1498 	mobj_free(mobj);
1499 
1500 	reg_pair_from_64(carg, rpc_args + 1, rpc_args + 2);
1501 	thread_rpc(rpc_args);
1502 }
1503 
1504 /**
1505  * Allocates shared memory buffer via RPC
1506  *
1507  * @size:	size in bytes of shared memory buffer
1508  * @align:	required alignment of buffer
1509  * @bt:		buffer type OPTEE_MSG_RPC_SHM_TYPE_*
1510  * @payload:	returned physical pointer to buffer, 0 if allocation
1511  *		failed.
1512  * @cookie:	returned cookie used when freeing the buffer
1513  */
1514 static struct mobj *thread_rpc_alloc(size_t size, size_t align, unsigned int bt,
1515 				     uint64_t *cookie)
1516 {
1517 	uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { OPTEE_SMC_RETURN_RPC_CMD };
1518 	struct optee_msg_arg *arg;
1519 	uint64_t carg;
1520 	struct mobj *mobj = NULL;
1521 
1522 	if (!get_rpc_arg(OPTEE_MSG_RPC_CMD_SHM_ALLOC, 1, &arg, &carg))
1523 		goto fail;
1524 
1525 	arg->params[0].attr = OPTEE_MSG_ATTR_TYPE_VALUE_INPUT;
1526 	arg->params[0].u.value.a = bt;
1527 	arg->params[0].u.value.b = size;
1528 	arg->params[0].u.value.c = align;
1529 
1530 	reg_pair_from_64(carg, rpc_args + 1, rpc_args + 2);
1531 	thread_rpc(rpc_args);
1532 
1533 	if (arg->ret != TEE_SUCCESS)
1534 		goto fail;
1535 
1536 	if (arg->num_params != 1)
1537 		goto fail;
1538 
1539 	if (arg->params[0].attr == OPTEE_MSG_ATTR_TYPE_TMEM_OUTPUT) {
1540 		*cookie = arg->params[0].u.tmem.shm_ref;
1541 		mobj = mobj_shm_alloc(arg->params[0].u.tmem.buf_ptr,
1542 				      arg->params[0].u.tmem.size);
1543 	} else if (arg->params[0].attr == (OPTEE_MSG_ATTR_TYPE_TMEM_OUTPUT |
1544 					   OPTEE_MSG_ATTR_NONCONTIG)) {
1545 		*cookie = arg->params[0].u.tmem.shm_ref;
1546 		mobj = msg_param_mobj_from_noncontig(
1547 			arg->params[0].u.tmem.buf_ptr,
1548 			arg->params[0].u.tmem.size,
1549 			*cookie,
1550 			true);
1551 	} else
1552 		goto fail;
1553 
1554 	if (!mobj)
1555 		goto free_first;
1556 
1557 	assert(mobj_is_nonsec(mobj));
1558 	return mobj;
1559 
1560 free_first:
1561 	thread_rpc_free(bt, *cookie, mobj);
1562 fail:
1563 	*cookie = 0;
1564 	return NULL;
1565 }
1566 
1567 struct mobj *thread_rpc_alloc_payload(size_t size, uint64_t *cookie)
1568 {
1569 	return thread_rpc_alloc(size, 8, OPTEE_MSG_RPC_SHM_TYPE_APPL, cookie);
1570 }
1571 
1572 void thread_rpc_free_payload(uint64_t cookie, struct mobj *mobj)
1573 {
1574 	thread_rpc_free(OPTEE_MSG_RPC_SHM_TYPE_APPL, cookie, mobj);
1575 }
1576