1 // SPDX-License-Identifier: BSD-2-Clause 2 /* 3 * Copyright (c) 2016, Linaro Limited 4 * Copyright (c) 2014, STMicroelectronics International N.V. 5 */ 6 7 #include <platform_config.h> 8 9 #include <arm.h> 10 #include <assert.h> 11 #include <io.h> 12 #include <keep.h> 13 #include <kernel/asan.h> 14 #include <kernel/linker.h> 15 #include <kernel/lockdep.h> 16 #include <kernel/misc.h> 17 #include <kernel/panic.h> 18 #include <kernel/spinlock.h> 19 #include <kernel/tee_ta_manager.h> 20 #include <kernel/thread_defs.h> 21 #include <kernel/thread.h> 22 #include <kernel/virtualization.h> 23 #include <mm/core_memprot.h> 24 #include <mm/mobj.h> 25 #include <mm/tee_mm.h> 26 #include <mm/tee_mmu.h> 27 #include <mm/tee_pager.h> 28 #include <smccc.h> 29 #include <sm/sm.h> 30 #include <trace.h> 31 #include <util.h> 32 33 #include "thread_private.h" 34 35 #ifdef CFG_WITH_ARM_TRUSTED_FW 36 #define STACK_TMP_OFFS 0 37 #else 38 #define STACK_TMP_OFFS SM_STACK_TMP_RESERVE_SIZE 39 #endif 40 41 42 #ifdef ARM32 43 #ifdef CFG_CORE_SANITIZE_KADDRESS 44 #define STACK_TMP_SIZE (3072 + STACK_TMP_OFFS) 45 #else 46 #define STACK_TMP_SIZE (2048 + STACK_TMP_OFFS) 47 #endif 48 #define STACK_THREAD_SIZE 8192 49 50 #if defined(CFG_CORE_SANITIZE_KADDRESS) || defined(__clang__) 51 #define STACK_ABT_SIZE 3072 52 #else 53 #define STACK_ABT_SIZE 2048 54 #endif 55 56 #endif /*ARM32*/ 57 58 #ifdef ARM64 59 #if defined(__clang__) && !defined(CFG_CC_OPTIMIZE_FOR_SIZE) 60 #define STACK_TMP_SIZE (4096 + STACK_TMP_OFFS) 61 #else 62 #define STACK_TMP_SIZE (2048 + STACK_TMP_OFFS) 63 #endif 64 #define STACK_THREAD_SIZE 8192 65 66 #if TRACE_LEVEL > 0 67 #define STACK_ABT_SIZE 3072 68 #else 69 #define STACK_ABT_SIZE 1024 70 #endif 71 #endif /*ARM64*/ 72 73 struct thread_ctx threads[CFG_NUM_THREADS]; 74 75 struct thread_core_local thread_core_local[CFG_TEE_CORE_NB_CORE] __nex_bss; 76 77 #ifdef CFG_WITH_STACK_CANARIES 78 #ifdef ARM32 79 #define STACK_CANARY_SIZE (4 * sizeof(uint32_t)) 80 #endif 81 #ifdef ARM64 82 #define STACK_CANARY_SIZE (8 * sizeof(uint32_t)) 83 #endif 84 #define START_CANARY_VALUE 0xdededede 85 #define END_CANARY_VALUE 0xabababab 86 #define GET_START_CANARY(name, stack_num) name[stack_num][0] 87 #define GET_END_CANARY(name, stack_num) \ 88 name[stack_num][sizeof(name[stack_num]) / sizeof(uint32_t) - 1] 89 #else 90 #define STACK_CANARY_SIZE 0 91 #endif 92 93 #define DECLARE_STACK(name, num_stacks, stack_size, linkage) \ 94 linkage uint32_t name[num_stacks] \ 95 [ROUNDUP(stack_size + STACK_CANARY_SIZE, STACK_ALIGNMENT) / \ 96 sizeof(uint32_t)] \ 97 __attribute__((section(".nozi_stack." # name), \ 98 aligned(STACK_ALIGNMENT))) 99 100 #define STACK_SIZE(stack) (sizeof(stack) - STACK_CANARY_SIZE / 2) 101 102 #define GET_STACK(stack) \ 103 ((vaddr_t)(stack) + STACK_SIZE(stack)) 104 105 DECLARE_STACK(stack_tmp, CFG_TEE_CORE_NB_CORE, STACK_TMP_SIZE, static); 106 DECLARE_STACK(stack_abt, CFG_TEE_CORE_NB_CORE, STACK_ABT_SIZE, static); 107 #ifndef CFG_WITH_PAGER 108 DECLARE_STACK(stack_thread, CFG_NUM_THREADS, STACK_THREAD_SIZE, static); 109 #endif 110 111 const void *stack_tmp_export __section(".identity_map.stack_tmp_export") = 112 (uint8_t *)stack_tmp + sizeof(stack_tmp[0]) - 113 (STACK_TMP_OFFS + STACK_CANARY_SIZE / 2); 114 const uint32_t stack_tmp_stride __section(".identity_map.stack_tmp_stride") = 115 sizeof(stack_tmp[0]); 116 117 /* 118 * These stack setup info are required by secondary boot cores before they 119 * each locally enable the pager (the mmu). Hence kept in pager sections. 120 */ 121 DECLARE_KEEP_PAGER(stack_tmp_export); 122 DECLARE_KEEP_PAGER(stack_tmp_stride); 123 124 thread_pm_handler_t thread_cpu_on_handler_ptr __nex_bss; 125 thread_pm_handler_t thread_cpu_off_handler_ptr __nex_bss; 126 thread_pm_handler_t thread_cpu_suspend_handler_ptr __nex_bss; 127 thread_pm_handler_t thread_cpu_resume_handler_ptr __nex_bss; 128 thread_pm_handler_t thread_system_off_handler_ptr __nex_bss; 129 thread_pm_handler_t thread_system_reset_handler_ptr __nex_bss; 130 131 #ifdef CFG_CORE_UNMAP_CORE_AT_EL0 132 static vaddr_t thread_user_kcode_va __nex_bss; 133 long thread_user_kcode_offset __nex_bss; 134 static size_t thread_user_kcode_size __nex_bss; 135 #endif 136 137 #if defined(CFG_CORE_UNMAP_CORE_AT_EL0) && \ 138 defined(CFG_CORE_WORKAROUND_SPECTRE_BP_SEC) && defined(ARM64) 139 long thread_user_kdata_sp_offset __nex_bss; 140 static uint8_t thread_user_kdata_page[ 141 ROUNDUP(sizeof(thread_core_local), SMALL_PAGE_SIZE)] 142 __aligned(SMALL_PAGE_SIZE) 143 #ifndef CFG_VIRTUALIZATION 144 __section(".nozi.kdata_page"); 145 #else 146 __section(".nex_nozi.kdata_page"); 147 #endif 148 #endif 149 150 static unsigned int thread_global_lock __nex_bss = SPINLOCK_UNLOCK; 151 152 static void init_canaries(void) 153 { 154 #ifdef CFG_WITH_STACK_CANARIES 155 size_t n; 156 #define INIT_CANARY(name) \ 157 for (n = 0; n < ARRAY_SIZE(name); n++) { \ 158 uint32_t *start_canary = &GET_START_CANARY(name, n); \ 159 uint32_t *end_canary = &GET_END_CANARY(name, n); \ 160 \ 161 *start_canary = START_CANARY_VALUE; \ 162 *end_canary = END_CANARY_VALUE; \ 163 DMSG("#Stack canaries for %s[%zu] with top at %p", \ 164 #name, n, (void *)(end_canary - 1)); \ 165 DMSG("watch *%p", (void *)end_canary); \ 166 } 167 168 INIT_CANARY(stack_tmp); 169 INIT_CANARY(stack_abt); 170 #if !defined(CFG_WITH_PAGER) && !defined(CFG_VIRTUALIZATION) 171 INIT_CANARY(stack_thread); 172 #endif 173 #endif/*CFG_WITH_STACK_CANARIES*/ 174 } 175 176 #define CANARY_DIED(stack, loc, n) \ 177 do { \ 178 EMSG_RAW("Dead canary at %s of '%s[%zu]'", #loc, #stack, n); \ 179 panic(); \ 180 } while (0) 181 182 void thread_check_canaries(void) 183 { 184 #ifdef CFG_WITH_STACK_CANARIES 185 size_t n; 186 187 for (n = 0; n < ARRAY_SIZE(stack_tmp); n++) { 188 if (GET_START_CANARY(stack_tmp, n) != START_CANARY_VALUE) 189 CANARY_DIED(stack_tmp, start, n); 190 if (GET_END_CANARY(stack_tmp, n) != END_CANARY_VALUE) 191 CANARY_DIED(stack_tmp, end, n); 192 } 193 194 for (n = 0; n < ARRAY_SIZE(stack_abt); n++) { 195 if (GET_START_CANARY(stack_abt, n) != START_CANARY_VALUE) 196 CANARY_DIED(stack_abt, start, n); 197 if (GET_END_CANARY(stack_abt, n) != END_CANARY_VALUE) 198 CANARY_DIED(stack_abt, end, n); 199 200 } 201 #if !defined(CFG_WITH_PAGER) && !defined(CFG_VIRTUALIZATION) 202 for (n = 0; n < ARRAY_SIZE(stack_thread); n++) { 203 if (GET_START_CANARY(stack_thread, n) != START_CANARY_VALUE) 204 CANARY_DIED(stack_thread, start, n); 205 if (GET_END_CANARY(stack_thread, n) != END_CANARY_VALUE) 206 CANARY_DIED(stack_thread, end, n); 207 } 208 #endif 209 #endif/*CFG_WITH_STACK_CANARIES*/ 210 } 211 212 void thread_lock_global(void) 213 { 214 cpu_spin_lock(&thread_global_lock); 215 } 216 217 void thread_unlock_global(void) 218 { 219 cpu_spin_unlock(&thread_global_lock); 220 } 221 222 #ifdef ARM32 223 uint32_t thread_get_exceptions(void) 224 { 225 uint32_t cpsr = read_cpsr(); 226 227 return (cpsr >> CPSR_F_SHIFT) & THREAD_EXCP_ALL; 228 } 229 230 void thread_set_exceptions(uint32_t exceptions) 231 { 232 uint32_t cpsr = read_cpsr(); 233 234 /* Foreign interrupts must not be unmasked while holding a spinlock */ 235 if (!(exceptions & THREAD_EXCP_FOREIGN_INTR)) 236 assert_have_no_spinlock(); 237 238 cpsr &= ~(THREAD_EXCP_ALL << CPSR_F_SHIFT); 239 cpsr |= ((exceptions & THREAD_EXCP_ALL) << CPSR_F_SHIFT); 240 write_cpsr(cpsr); 241 } 242 #endif /*ARM32*/ 243 244 #ifdef ARM64 245 uint32_t thread_get_exceptions(void) 246 { 247 uint32_t daif = read_daif(); 248 249 return (daif >> DAIF_F_SHIFT) & THREAD_EXCP_ALL; 250 } 251 252 void thread_set_exceptions(uint32_t exceptions) 253 { 254 uint32_t daif = read_daif(); 255 256 /* Foreign interrupts must not be unmasked while holding a spinlock */ 257 if (!(exceptions & THREAD_EXCP_FOREIGN_INTR)) 258 assert_have_no_spinlock(); 259 260 daif &= ~(THREAD_EXCP_ALL << DAIF_F_SHIFT); 261 daif |= ((exceptions & THREAD_EXCP_ALL) << DAIF_F_SHIFT); 262 write_daif(daif); 263 } 264 #endif /*ARM64*/ 265 266 uint32_t thread_mask_exceptions(uint32_t exceptions) 267 { 268 uint32_t state = thread_get_exceptions(); 269 270 thread_set_exceptions(state | (exceptions & THREAD_EXCP_ALL)); 271 return state; 272 } 273 274 void thread_unmask_exceptions(uint32_t state) 275 { 276 thread_set_exceptions(state & THREAD_EXCP_ALL); 277 } 278 279 280 struct thread_core_local *thread_get_core_local(void) 281 { 282 uint32_t cpu_id = get_core_pos(); 283 284 /* 285 * Foreign interrupts must be disabled before playing with core_local 286 * since we otherwise may be rescheduled to a different core in the 287 * middle of this function. 288 */ 289 assert(thread_get_exceptions() & THREAD_EXCP_FOREIGN_INTR); 290 291 assert(cpu_id < CFG_TEE_CORE_NB_CORE); 292 return &thread_core_local[cpu_id]; 293 } 294 295 static void thread_lazy_save_ns_vfp(void) 296 { 297 #ifdef CFG_WITH_VFP 298 struct thread_ctx *thr = threads + thread_get_id(); 299 300 thr->vfp_state.ns_saved = false; 301 vfp_lazy_save_state_init(&thr->vfp_state.ns); 302 #endif /*CFG_WITH_VFP*/ 303 } 304 305 static void thread_lazy_restore_ns_vfp(void) 306 { 307 #ifdef CFG_WITH_VFP 308 struct thread_ctx *thr = threads + thread_get_id(); 309 struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp; 310 311 assert(!thr->vfp_state.sec_lazy_saved && !thr->vfp_state.sec_saved); 312 313 if (tuv && tuv->lazy_saved && !tuv->saved) { 314 vfp_lazy_save_state_final(&tuv->vfp, false /*!force_save*/); 315 tuv->saved = true; 316 } 317 318 vfp_lazy_restore_state(&thr->vfp_state.ns, thr->vfp_state.ns_saved); 319 thr->vfp_state.ns_saved = false; 320 #endif /*CFG_WITH_VFP*/ 321 } 322 323 #ifdef ARM32 324 static void init_regs(struct thread_ctx *thread, uint32_t a0, uint32_t a1, 325 uint32_t a2, uint32_t a3) 326 { 327 thread->regs.pc = (uint32_t)thread_std_smc_entry; 328 329 /* 330 * Stdcalls starts in SVC mode with masked foreign interrupts, masked 331 * Asynchronous abort and unmasked native interrupts. 332 */ 333 thread->regs.cpsr = read_cpsr() & ARM32_CPSR_E; 334 thread->regs.cpsr |= CPSR_MODE_SVC | CPSR_A | 335 (THREAD_EXCP_FOREIGN_INTR << ARM32_CPSR_F_SHIFT); 336 /* Enable thumb mode if it's a thumb instruction */ 337 if (thread->regs.pc & 1) 338 thread->regs.cpsr |= CPSR_T; 339 /* Reinitialize stack pointer */ 340 thread->regs.svc_sp = thread->stack_va_end; 341 342 /* 343 * Copy arguments into context. This will make the 344 * arguments appear in r0-r7 when thread is started. 345 */ 346 thread->regs.r0 = a0; 347 thread->regs.r1 = a1; 348 thread->regs.r2 = a2; 349 thread->regs.r3 = a3; 350 thread->regs.r4 = 0; 351 thread->regs.r5 = 0; 352 thread->regs.r6 = 0; 353 thread->regs.r7 = 0; 354 } 355 #endif /*ARM32*/ 356 357 #ifdef ARM64 358 static void init_regs(struct thread_ctx *thread, uint32_t a0, uint32_t a1, 359 uint32_t a2, uint32_t a3) 360 { 361 thread->regs.pc = (uint64_t)thread_std_smc_entry; 362 363 /* 364 * Stdcalls starts in SVC mode with masked foreign interrupts, masked 365 * Asynchronous abort and unmasked native interrupts. 366 */ 367 thread->regs.cpsr = SPSR_64(SPSR_64_MODE_EL1, SPSR_64_MODE_SP_EL0, 368 THREAD_EXCP_FOREIGN_INTR | DAIFBIT_ABT); 369 /* Reinitialize stack pointer */ 370 thread->regs.sp = thread->stack_va_end; 371 372 /* 373 * Copy arguments into context. This will make the 374 * arguments appear in x0-x7 when thread is started. 375 */ 376 thread->regs.x[0] = a0; 377 thread->regs.x[1] = a1; 378 thread->regs.x[2] = a2; 379 thread->regs.x[3] = a3; 380 thread->regs.x[4] = 0; 381 thread->regs.x[5] = 0; 382 thread->regs.x[6] = 0; 383 thread->regs.x[7] = 0; 384 385 /* Set up frame pointer as per the Aarch64 AAPCS */ 386 thread->regs.x[29] = 0; 387 } 388 #endif /*ARM64*/ 389 390 void thread_init_boot_thread(void) 391 { 392 struct thread_core_local *l = thread_get_core_local(); 393 394 thread_init_threads(); 395 396 l->curr_thread = 0; 397 threads[0].state = THREAD_STATE_ACTIVE; 398 } 399 400 void thread_clr_boot_thread(void) 401 { 402 struct thread_core_local *l = thread_get_core_local(); 403 404 assert(l->curr_thread >= 0 && l->curr_thread < CFG_NUM_THREADS); 405 assert(threads[l->curr_thread].state == THREAD_STATE_ACTIVE); 406 threads[l->curr_thread].state = THREAD_STATE_FREE; 407 l->curr_thread = -1; 408 } 409 410 void thread_alloc_and_run(uint32_t a0, uint32_t a1, uint32_t a2, uint32_t a3) 411 { 412 size_t n; 413 struct thread_core_local *l = thread_get_core_local(); 414 bool found_thread = false; 415 416 assert(l->curr_thread == -1); 417 418 thread_lock_global(); 419 420 for (n = 0; n < CFG_NUM_THREADS; n++) { 421 if (threads[n].state == THREAD_STATE_FREE) { 422 threads[n].state = THREAD_STATE_ACTIVE; 423 found_thread = true; 424 break; 425 } 426 } 427 428 thread_unlock_global(); 429 430 if (!found_thread) 431 return; 432 433 l->curr_thread = n; 434 435 threads[n].flags = 0; 436 init_regs(threads + n, a0, a1, a2, a3); 437 438 thread_lazy_save_ns_vfp(); 439 thread_resume(&threads[n].regs); 440 /*NOTREACHED*/ 441 panic(); 442 } 443 444 #ifdef ARM32 445 static void copy_a0_to_a3(struct thread_ctx_regs *regs, uint32_t a0, 446 uint32_t a1, uint32_t a2, uint32_t a3) 447 { 448 /* 449 * Update returned values from RPC, values will appear in 450 * r0-r3 when thread is resumed. 451 */ 452 regs->r0 = a0; 453 regs->r1 = a1; 454 regs->r2 = a2; 455 regs->r3 = a3; 456 } 457 #endif /*ARM32*/ 458 459 #ifdef ARM64 460 static void copy_a0_to_a3(struct thread_ctx_regs *regs, uint32_t a0, 461 uint32_t a1, uint32_t a2, uint32_t a3) 462 { 463 /* 464 * Update returned values from RPC, values will appear in 465 * x0-x3 when thread is resumed. 466 */ 467 regs->x[0] = a0; 468 regs->x[1] = a1; 469 regs->x[2] = a2; 470 regs->x[3] = a3; 471 } 472 #endif /*ARM64*/ 473 474 #ifdef ARM32 475 static bool is_from_user(uint32_t cpsr) 476 { 477 return (cpsr & ARM32_CPSR_MODE_MASK) == ARM32_CPSR_MODE_USR; 478 } 479 #endif 480 481 #ifdef ARM64 482 static bool is_from_user(uint32_t cpsr) 483 { 484 if (cpsr & (SPSR_MODE_RW_32 << SPSR_MODE_RW_SHIFT)) 485 return true; 486 if (((cpsr >> SPSR_64_MODE_EL_SHIFT) & SPSR_64_MODE_EL_MASK) == 487 SPSR_64_MODE_EL0) 488 return true; 489 return false; 490 } 491 #endif 492 493 #ifdef CFG_SYSCALL_FTRACE 494 static void __noprof ftrace_suspend(void) 495 { 496 struct tee_ta_session *s = TAILQ_FIRST(&thread_get_tsd()->sess_stack); 497 498 if (!s) 499 return; 500 501 if (s->fbuf) 502 s->fbuf->syscall_trace_suspended = true; 503 } 504 505 static void __noprof ftrace_resume(void) 506 { 507 struct tee_ta_session *s = TAILQ_FIRST(&thread_get_tsd()->sess_stack); 508 509 if (!s) 510 return; 511 512 if (s->fbuf) 513 s->fbuf->syscall_trace_suspended = false; 514 } 515 #else 516 static void __noprof ftrace_suspend(void) 517 { 518 } 519 520 static void __noprof ftrace_resume(void) 521 { 522 } 523 #endif 524 525 static bool is_user_mode(struct thread_ctx_regs *regs) 526 { 527 return is_from_user((uint32_t)regs->cpsr); 528 } 529 530 void thread_resume_from_rpc(uint32_t thread_id, uint32_t a0, uint32_t a1, 531 uint32_t a2, uint32_t a3) 532 { 533 size_t n = thread_id; 534 struct thread_core_local *l = thread_get_core_local(); 535 bool found_thread = false; 536 537 assert(l->curr_thread == -1); 538 539 thread_lock_global(); 540 541 if (n < CFG_NUM_THREADS && threads[n].state == THREAD_STATE_SUSPENDED) { 542 threads[n].state = THREAD_STATE_ACTIVE; 543 found_thread = true; 544 } 545 546 thread_unlock_global(); 547 548 if (!found_thread) 549 return; 550 551 l->curr_thread = n; 552 553 if (threads[n].have_user_map) { 554 core_mmu_set_user_map(&threads[n].user_map); 555 if (threads[n].flags & THREAD_FLAGS_EXIT_ON_FOREIGN_INTR) 556 tee_ta_ftrace_update_times_resume(); 557 } 558 559 if (is_user_mode(&threads[n].regs)) 560 tee_ta_update_session_utime_resume(); 561 562 /* 563 * Return from RPC to request service of a foreign interrupt must not 564 * get parameters from non-secure world. 565 */ 566 if (threads[n].flags & THREAD_FLAGS_COPY_ARGS_ON_RETURN) { 567 copy_a0_to_a3(&threads[n].regs, a0, a1, a2, a3); 568 threads[n].flags &= ~THREAD_FLAGS_COPY_ARGS_ON_RETURN; 569 } 570 571 thread_lazy_save_ns_vfp(); 572 573 if (threads[n].have_user_map) 574 ftrace_resume(); 575 576 thread_resume(&threads[n].regs); 577 /*NOTREACHED*/ 578 panic(); 579 } 580 581 void *thread_get_tmp_sp(void) 582 { 583 struct thread_core_local *l = thread_get_core_local(); 584 585 return (void *)l->tmp_stack_va_end; 586 } 587 588 #ifdef ARM64 589 vaddr_t thread_get_saved_thread_sp(void) 590 { 591 struct thread_core_local *l = thread_get_core_local(); 592 int ct = l->curr_thread; 593 594 assert(ct != -1); 595 return threads[ct].kern_sp; 596 } 597 #endif /*ARM64*/ 598 599 vaddr_t thread_stack_start(void) 600 { 601 struct thread_ctx *thr; 602 int ct = thread_get_id_may_fail(); 603 604 if (ct == -1) 605 return 0; 606 607 thr = threads + ct; 608 return thr->stack_va_end - STACK_THREAD_SIZE; 609 } 610 611 size_t thread_stack_size(void) 612 { 613 return STACK_THREAD_SIZE; 614 } 615 616 bool thread_is_from_abort_mode(void) 617 { 618 struct thread_core_local *l = thread_get_core_local(); 619 620 return (l->flags >> THREAD_CLF_SAVED_SHIFT) & THREAD_CLF_ABORT; 621 } 622 623 #ifdef ARM32 624 bool thread_is_in_normal_mode(void) 625 { 626 return (read_cpsr() & ARM32_CPSR_MODE_MASK) == ARM32_CPSR_MODE_SVC; 627 } 628 #endif 629 630 #ifdef ARM64 631 bool thread_is_in_normal_mode(void) 632 { 633 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR); 634 struct thread_core_local *l = thread_get_core_local(); 635 bool ret; 636 637 /* If any bit in l->flags is set we're handling some exception. */ 638 ret = !l->flags; 639 thread_unmask_exceptions(exceptions); 640 641 return ret; 642 } 643 #endif 644 645 void thread_state_free(void) 646 { 647 struct thread_core_local *l = thread_get_core_local(); 648 int ct = l->curr_thread; 649 650 assert(ct != -1); 651 652 thread_lazy_restore_ns_vfp(); 653 tee_pager_release_phys( 654 (void *)(threads[ct].stack_va_end - STACK_THREAD_SIZE), 655 STACK_THREAD_SIZE); 656 657 thread_lock_global(); 658 659 assert(threads[ct].state == THREAD_STATE_ACTIVE); 660 threads[ct].state = THREAD_STATE_FREE; 661 threads[ct].flags = 0; 662 l->curr_thread = -1; 663 664 #ifdef CFG_VIRTUALIZATION 665 virt_unset_guest(); 666 #endif 667 thread_unlock_global(); 668 } 669 670 #ifdef CFG_WITH_PAGER 671 static void release_unused_kernel_stack(struct thread_ctx *thr, 672 uint32_t cpsr __maybe_unused) 673 { 674 #ifdef ARM64 675 /* 676 * If we're from user mode then thr->regs.sp is the saved user 677 * stack pointer and thr->kern_sp holds the last kernel stack 678 * pointer. But if we're from kernel mode then thr->kern_sp isn't 679 * up to date so we need to read from thr->regs.sp instead. 680 */ 681 vaddr_t sp = is_from_user(cpsr) ? thr->kern_sp : thr->regs.sp; 682 #else 683 vaddr_t sp = thr->regs.svc_sp; 684 #endif 685 vaddr_t base = thr->stack_va_end - STACK_THREAD_SIZE; 686 size_t len = sp - base; 687 688 tee_pager_release_phys((void *)base, len); 689 } 690 #else 691 static void release_unused_kernel_stack(struct thread_ctx *thr __unused, 692 uint32_t cpsr __unused) 693 { 694 } 695 #endif 696 697 int thread_state_suspend(uint32_t flags, uint32_t cpsr, vaddr_t pc) 698 { 699 struct thread_core_local *l = thread_get_core_local(); 700 int ct = l->curr_thread; 701 702 assert(ct != -1); 703 704 if (core_mmu_user_mapping_is_active()) 705 ftrace_suspend(); 706 707 thread_check_canaries(); 708 709 release_unused_kernel_stack(threads + ct, cpsr); 710 711 if (is_from_user(cpsr)) { 712 thread_user_save_vfp(); 713 tee_ta_update_session_utime_suspend(); 714 tee_ta_gprof_sample_pc(pc); 715 } 716 thread_lazy_restore_ns_vfp(); 717 718 thread_lock_global(); 719 720 assert(threads[ct].state == THREAD_STATE_ACTIVE); 721 threads[ct].flags |= flags; 722 threads[ct].regs.cpsr = cpsr; 723 threads[ct].regs.pc = pc; 724 threads[ct].state = THREAD_STATE_SUSPENDED; 725 726 threads[ct].have_user_map = core_mmu_user_mapping_is_active(); 727 if (threads[ct].have_user_map) { 728 if (threads[ct].flags & THREAD_FLAGS_EXIT_ON_FOREIGN_INTR) 729 tee_ta_ftrace_update_times_suspend(); 730 core_mmu_get_user_map(&threads[ct].user_map); 731 core_mmu_set_user_map(NULL); 732 } 733 734 l->curr_thread = -1; 735 736 #ifdef CFG_VIRTUALIZATION 737 virt_unset_guest(); 738 #endif 739 740 thread_unlock_global(); 741 742 return ct; 743 } 744 745 #ifdef ARM32 746 static void set_tmp_stack(struct thread_core_local *l, vaddr_t sp) 747 { 748 l->tmp_stack_va_end = sp; 749 thread_set_irq_sp(sp); 750 thread_set_fiq_sp(sp); 751 } 752 753 static void set_abt_stack(struct thread_core_local *l, vaddr_t sp) 754 { 755 l->abt_stack_va_end = sp; 756 thread_set_abt_sp((vaddr_t)l); 757 thread_set_und_sp((vaddr_t)l); 758 } 759 #endif /*ARM32*/ 760 761 #ifdef ARM64 762 static void set_tmp_stack(struct thread_core_local *l, vaddr_t sp) 763 { 764 /* 765 * We're already using the tmp stack when this function is called 766 * so there's no need to assign it to any stack pointer. However, 767 * we'll need to restore it at different times so store it here. 768 */ 769 l->tmp_stack_va_end = sp; 770 } 771 772 static void set_abt_stack(struct thread_core_local *l, vaddr_t sp) 773 { 774 l->abt_stack_va_end = sp; 775 } 776 #endif /*ARM64*/ 777 778 bool thread_init_stack(uint32_t thread_id, vaddr_t sp) 779 { 780 if (thread_id >= CFG_NUM_THREADS) 781 return false; 782 threads[thread_id].stack_va_end = sp; 783 return true; 784 } 785 786 int thread_get_id_may_fail(void) 787 { 788 /* 789 * thread_get_core_local() requires foreign interrupts to be disabled 790 */ 791 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR); 792 struct thread_core_local *l = thread_get_core_local(); 793 int ct = l->curr_thread; 794 795 thread_unmask_exceptions(exceptions); 796 return ct; 797 } 798 799 int thread_get_id(void) 800 { 801 int ct = thread_get_id_may_fail(); 802 803 assert(ct >= 0 && ct < CFG_NUM_THREADS); 804 return ct; 805 } 806 807 static void init_handlers(const struct thread_handlers *handlers) 808 { 809 thread_cpu_on_handler_ptr = handlers->cpu_on; 810 thread_cpu_off_handler_ptr = handlers->cpu_off; 811 thread_cpu_suspend_handler_ptr = handlers->cpu_suspend; 812 thread_cpu_resume_handler_ptr = handlers->cpu_resume; 813 thread_system_off_handler_ptr = handlers->system_off; 814 thread_system_reset_handler_ptr = handlers->system_reset; 815 } 816 817 #ifdef CFG_WITH_PAGER 818 static void init_thread_stacks(void) 819 { 820 size_t n = 0; 821 822 /* 823 * Allocate virtual memory for thread stacks. 824 */ 825 for (n = 0; n < CFG_NUM_THREADS; n++) { 826 tee_mm_entry_t *mm = NULL; 827 vaddr_t sp = 0; 828 size_t num_pages = 0; 829 struct fobj *fobj = NULL; 830 831 /* Find vmem for thread stack and its protection gap */ 832 mm = tee_mm_alloc(&tee_mm_vcore, 833 SMALL_PAGE_SIZE + STACK_THREAD_SIZE); 834 assert(mm); 835 836 /* Claim eventual physical page */ 837 tee_pager_add_pages(tee_mm_get_smem(mm), tee_mm_get_size(mm), 838 true); 839 840 num_pages = tee_mm_get_bytes(mm) / SMALL_PAGE_SIZE - 1; 841 fobj = fobj_locked_paged_alloc(num_pages); 842 843 /* Add the area to the pager */ 844 tee_pager_add_core_area(tee_mm_get_smem(mm) + SMALL_PAGE_SIZE, 845 PAGER_AREA_TYPE_LOCK, fobj); 846 fobj_put(fobj); 847 848 /* init effective stack */ 849 sp = tee_mm_get_smem(mm) + tee_mm_get_bytes(mm); 850 asan_tag_access((void *)tee_mm_get_smem(mm), (void *)sp); 851 if (!thread_init_stack(n, sp)) 852 panic("init stack failed"); 853 } 854 } 855 #else 856 static void init_thread_stacks(void) 857 { 858 size_t n; 859 860 /* Assign the thread stacks */ 861 for (n = 0; n < CFG_NUM_THREADS; n++) { 862 if (!thread_init_stack(n, GET_STACK(stack_thread[n]))) 863 panic("thread_init_stack failed"); 864 } 865 } 866 #endif /*CFG_WITH_PAGER*/ 867 868 static void init_user_kcode(void) 869 { 870 #ifdef CFG_CORE_UNMAP_CORE_AT_EL0 871 vaddr_t v = (vaddr_t)thread_excp_vect; 872 vaddr_t ve = (vaddr_t)thread_excp_vect_end; 873 874 thread_user_kcode_va = ROUNDDOWN(v, CORE_MMU_USER_CODE_SIZE); 875 ve = ROUNDUP(ve, CORE_MMU_USER_CODE_SIZE); 876 thread_user_kcode_size = ve - thread_user_kcode_va; 877 878 core_mmu_get_user_va_range(&v, NULL); 879 thread_user_kcode_offset = thread_user_kcode_va - v; 880 881 #if defined(CFG_CORE_WORKAROUND_SPECTRE_BP_SEC) && defined(ARM64) 882 /* 883 * When transitioning to EL0 subtract SP with this much to point to 884 * this special kdata page instead. SP is restored by add this much 885 * while transitioning back to EL1. 886 */ 887 v += thread_user_kcode_size; 888 thread_user_kdata_sp_offset = (vaddr_t)thread_core_local - v; 889 #endif 890 #endif /*CFG_CORE_UNMAP_CORE_AT_EL0*/ 891 } 892 893 void thread_init_threads(void) 894 { 895 size_t n = 0; 896 897 init_thread_stacks(); 898 pgt_init(); 899 900 mutex_lockdep_init(); 901 902 for (n = 0; n < CFG_NUM_THREADS; n++) { 903 TAILQ_INIT(&threads[n].tsd.sess_stack); 904 SLIST_INIT(&threads[n].tsd.pgt_cache); 905 } 906 } 907 908 void thread_clr_thread_core_local(void) 909 { 910 size_t n = 0; 911 912 for (n = 0; n < CFG_TEE_CORE_NB_CORE; n++) 913 thread_core_local[n].curr_thread = -1; 914 } 915 916 void thread_init_primary(const struct thread_handlers *handlers) 917 { 918 init_handlers(handlers); 919 920 /* Initialize canaries around the stacks */ 921 init_canaries(); 922 923 init_user_kcode(); 924 } 925 926 static void init_sec_mon(size_t pos __maybe_unused) 927 { 928 #if !defined(CFG_WITH_ARM_TRUSTED_FW) 929 /* Initialize secure monitor */ 930 sm_init(GET_STACK(stack_tmp[pos])); 931 #endif 932 } 933 934 static uint32_t __maybe_unused get_midr_implementer(uint32_t midr) 935 { 936 return (midr >> MIDR_IMPLEMENTER_SHIFT) & MIDR_IMPLEMENTER_MASK; 937 } 938 939 static uint32_t __maybe_unused get_midr_primary_part(uint32_t midr) 940 { 941 return (midr >> MIDR_PRIMARY_PART_NUM_SHIFT) & 942 MIDR_PRIMARY_PART_NUM_MASK; 943 } 944 945 #ifdef ARM64 946 static bool probe_workaround_available(void) 947 { 948 int32_t r; 949 950 r = thread_smc(SMCCC_VERSION, 0, 0, 0); 951 if (r < 0) 952 return false; 953 if (r < 0x10001) /* compare with version 1.1 */ 954 return false; 955 956 /* Version >= 1.1, so SMCCC_ARCH_FEATURES is available */ 957 r = thread_smc(SMCCC_ARCH_FEATURES, SMCCC_ARCH_WORKAROUND_1, 0, 0); 958 return r >= 0; 959 } 960 961 static vaddr_t __maybe_unused select_vector(vaddr_t a) 962 { 963 if (probe_workaround_available()) { 964 DMSG("SMCCC_ARCH_WORKAROUND_1 (%#08" PRIx32 ") available", 965 SMCCC_ARCH_WORKAROUND_1); 966 DMSG("SMC Workaround for CVE-2017-5715 used"); 967 return a; 968 } 969 970 DMSG("SMCCC_ARCH_WORKAROUND_1 (%#08" PRIx32 ") unavailable", 971 SMCCC_ARCH_WORKAROUND_1); 972 DMSG("SMC Workaround for CVE-2017-5715 not needed (if ARM-TF is up to date)"); 973 return (vaddr_t)thread_excp_vect; 974 } 975 #else 976 static vaddr_t __maybe_unused select_vector(vaddr_t a) 977 { 978 return a; 979 } 980 #endif 981 982 static vaddr_t get_excp_vect(void) 983 { 984 #ifdef CFG_CORE_WORKAROUND_SPECTRE_BP_SEC 985 uint32_t midr = read_midr(); 986 987 if (get_midr_implementer(midr) != MIDR_IMPLEMENTER_ARM) 988 return (vaddr_t)thread_excp_vect; 989 990 switch (get_midr_primary_part(midr)) { 991 #ifdef ARM32 992 case CORTEX_A8_PART_NUM: 993 case CORTEX_A9_PART_NUM: 994 case CORTEX_A17_PART_NUM: 995 #endif 996 case CORTEX_A57_PART_NUM: 997 case CORTEX_A72_PART_NUM: 998 case CORTEX_A73_PART_NUM: 999 case CORTEX_A75_PART_NUM: 1000 return select_vector((vaddr_t)thread_excp_vect_workaround); 1001 #ifdef ARM32 1002 case CORTEX_A15_PART_NUM: 1003 return select_vector((vaddr_t)thread_excp_vect_workaround_a15); 1004 #endif 1005 default: 1006 return (vaddr_t)thread_excp_vect; 1007 } 1008 #endif /*CFG_CORE_WORKAROUND_SPECTRE_BP_SEC*/ 1009 1010 return (vaddr_t)thread_excp_vect; 1011 } 1012 1013 void thread_init_per_cpu(void) 1014 { 1015 size_t pos = get_core_pos(); 1016 struct thread_core_local *l = thread_get_core_local(); 1017 1018 init_sec_mon(pos); 1019 1020 set_tmp_stack(l, GET_STACK(stack_tmp[pos]) - STACK_TMP_OFFS); 1021 set_abt_stack(l, GET_STACK(stack_abt[pos])); 1022 1023 thread_init_vbar(get_excp_vect()); 1024 1025 #ifdef CFG_FTRACE_SUPPORT 1026 /* 1027 * Enable accesses to frequency register and physical counter 1028 * register in EL0/PL0 required for timestamping during 1029 * function tracing. 1030 */ 1031 write_cntkctl(read_cntkctl() | CNTKCTL_PL0PCTEN); 1032 #endif 1033 } 1034 1035 struct thread_specific_data *thread_get_tsd(void) 1036 { 1037 return &threads[thread_get_id()].tsd; 1038 } 1039 1040 struct thread_ctx_regs *thread_get_ctx_regs(void) 1041 { 1042 struct thread_core_local *l = thread_get_core_local(); 1043 1044 assert(l->curr_thread != -1); 1045 return &threads[l->curr_thread].regs; 1046 } 1047 1048 void thread_set_foreign_intr(bool enable) 1049 { 1050 /* thread_get_core_local() requires foreign interrupts to be disabled */ 1051 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR); 1052 struct thread_core_local *l; 1053 1054 l = thread_get_core_local(); 1055 1056 assert(l->curr_thread != -1); 1057 1058 if (enable) { 1059 threads[l->curr_thread].flags |= 1060 THREAD_FLAGS_FOREIGN_INTR_ENABLE; 1061 thread_set_exceptions(exceptions & ~THREAD_EXCP_FOREIGN_INTR); 1062 } else { 1063 /* 1064 * No need to disable foreign interrupts here since they're 1065 * already disabled above. 1066 */ 1067 threads[l->curr_thread].flags &= 1068 ~THREAD_FLAGS_FOREIGN_INTR_ENABLE; 1069 } 1070 } 1071 1072 void thread_restore_foreign_intr(void) 1073 { 1074 /* thread_get_core_local() requires foreign interrupts to be disabled */ 1075 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR); 1076 struct thread_core_local *l; 1077 1078 l = thread_get_core_local(); 1079 1080 assert(l->curr_thread != -1); 1081 1082 if (threads[l->curr_thread].flags & THREAD_FLAGS_FOREIGN_INTR_ENABLE) 1083 thread_set_exceptions(exceptions & ~THREAD_EXCP_FOREIGN_INTR); 1084 } 1085 1086 #ifdef CFG_WITH_VFP 1087 uint32_t thread_kernel_enable_vfp(void) 1088 { 1089 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR); 1090 struct thread_ctx *thr = threads + thread_get_id(); 1091 struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp; 1092 1093 assert(!vfp_is_enabled()); 1094 1095 if (!thr->vfp_state.ns_saved) { 1096 vfp_lazy_save_state_final(&thr->vfp_state.ns, 1097 true /*force_save*/); 1098 thr->vfp_state.ns_saved = true; 1099 } else if (thr->vfp_state.sec_lazy_saved && 1100 !thr->vfp_state.sec_saved) { 1101 /* 1102 * This happens when we're handling an abort while the 1103 * thread was using the VFP state. 1104 */ 1105 vfp_lazy_save_state_final(&thr->vfp_state.sec, 1106 false /*!force_save*/); 1107 thr->vfp_state.sec_saved = true; 1108 } else if (tuv && tuv->lazy_saved && !tuv->saved) { 1109 /* 1110 * This can happen either during syscall or abort 1111 * processing (while processing a syscall). 1112 */ 1113 vfp_lazy_save_state_final(&tuv->vfp, false /*!force_save*/); 1114 tuv->saved = true; 1115 } 1116 1117 vfp_enable(); 1118 return exceptions; 1119 } 1120 1121 void thread_kernel_disable_vfp(uint32_t state) 1122 { 1123 uint32_t exceptions; 1124 1125 assert(vfp_is_enabled()); 1126 1127 vfp_disable(); 1128 exceptions = thread_get_exceptions(); 1129 assert(exceptions & THREAD_EXCP_FOREIGN_INTR); 1130 exceptions &= ~THREAD_EXCP_FOREIGN_INTR; 1131 exceptions |= state & THREAD_EXCP_FOREIGN_INTR; 1132 thread_set_exceptions(exceptions); 1133 } 1134 1135 void thread_kernel_save_vfp(void) 1136 { 1137 struct thread_ctx *thr = threads + thread_get_id(); 1138 1139 assert(thread_get_exceptions() & THREAD_EXCP_FOREIGN_INTR); 1140 if (vfp_is_enabled()) { 1141 vfp_lazy_save_state_init(&thr->vfp_state.sec); 1142 thr->vfp_state.sec_lazy_saved = true; 1143 } 1144 } 1145 1146 void thread_kernel_restore_vfp(void) 1147 { 1148 struct thread_ctx *thr = threads + thread_get_id(); 1149 1150 assert(thread_get_exceptions() & THREAD_EXCP_FOREIGN_INTR); 1151 assert(!vfp_is_enabled()); 1152 if (thr->vfp_state.sec_lazy_saved) { 1153 vfp_lazy_restore_state(&thr->vfp_state.sec, 1154 thr->vfp_state.sec_saved); 1155 thr->vfp_state.sec_saved = false; 1156 thr->vfp_state.sec_lazy_saved = false; 1157 } 1158 } 1159 1160 void thread_user_enable_vfp(struct thread_user_vfp_state *uvfp) 1161 { 1162 struct thread_ctx *thr = threads + thread_get_id(); 1163 struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp; 1164 1165 assert(thread_get_exceptions() & THREAD_EXCP_FOREIGN_INTR); 1166 assert(!vfp_is_enabled()); 1167 1168 if (!thr->vfp_state.ns_saved) { 1169 vfp_lazy_save_state_final(&thr->vfp_state.ns, 1170 true /*force_save*/); 1171 thr->vfp_state.ns_saved = true; 1172 } else if (tuv && uvfp != tuv) { 1173 if (tuv->lazy_saved && !tuv->saved) { 1174 vfp_lazy_save_state_final(&tuv->vfp, 1175 false /*!force_save*/); 1176 tuv->saved = true; 1177 } 1178 } 1179 1180 if (uvfp->lazy_saved) 1181 vfp_lazy_restore_state(&uvfp->vfp, uvfp->saved); 1182 uvfp->lazy_saved = false; 1183 uvfp->saved = false; 1184 1185 thr->vfp_state.uvfp = uvfp; 1186 vfp_enable(); 1187 } 1188 1189 void thread_user_save_vfp(void) 1190 { 1191 struct thread_ctx *thr = threads + thread_get_id(); 1192 struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp; 1193 1194 assert(thread_get_exceptions() & THREAD_EXCP_FOREIGN_INTR); 1195 if (!vfp_is_enabled()) 1196 return; 1197 1198 assert(tuv && !tuv->lazy_saved && !tuv->saved); 1199 vfp_lazy_save_state_init(&tuv->vfp); 1200 tuv->lazy_saved = true; 1201 } 1202 1203 void thread_user_clear_vfp(struct thread_user_vfp_state *uvfp) 1204 { 1205 struct thread_ctx *thr = threads + thread_get_id(); 1206 1207 if (uvfp == thr->vfp_state.uvfp) 1208 thr->vfp_state.uvfp = NULL; 1209 uvfp->lazy_saved = false; 1210 uvfp->saved = false; 1211 } 1212 #endif /*CFG_WITH_VFP*/ 1213 1214 #ifdef ARM32 1215 static bool get_spsr(bool is_32bit, unsigned long entry_func, uint32_t *spsr) 1216 { 1217 uint32_t s; 1218 1219 if (!is_32bit) 1220 return false; 1221 1222 s = read_cpsr(); 1223 s &= ~(CPSR_MODE_MASK | CPSR_T | CPSR_IT_MASK1 | CPSR_IT_MASK2); 1224 s |= CPSR_MODE_USR; 1225 if (entry_func & 1) 1226 s |= CPSR_T; 1227 *spsr = s; 1228 return true; 1229 } 1230 #endif 1231 1232 #ifdef ARM64 1233 static bool get_spsr(bool is_32bit, unsigned long entry_func, uint32_t *spsr) 1234 { 1235 uint32_t s; 1236 1237 if (is_32bit) { 1238 s = read_daif() & (SPSR_32_AIF_MASK << SPSR_32_AIF_SHIFT); 1239 s |= SPSR_MODE_RW_32 << SPSR_MODE_RW_SHIFT; 1240 s |= (entry_func & SPSR_32_T_MASK) << SPSR_32_T_SHIFT; 1241 } else { 1242 s = read_daif() & (SPSR_64_DAIF_MASK << SPSR_64_DAIF_SHIFT); 1243 } 1244 1245 *spsr = s; 1246 return true; 1247 } 1248 #endif 1249 1250 static void set_ctx_regs(struct thread_ctx_regs *regs, unsigned long a0, 1251 unsigned long a1, unsigned long a2, unsigned long a3, 1252 unsigned long user_sp, unsigned long entry_func, 1253 uint32_t spsr) 1254 { 1255 /* 1256 * First clear all registers to avoid leaking information from 1257 * other TAs or even the Core itself. 1258 */ 1259 *regs = (struct thread_ctx_regs){ }; 1260 #ifdef ARM32 1261 regs->r0 = a0; 1262 regs->r1 = a1; 1263 regs->r2 = a2; 1264 regs->r3 = a3; 1265 regs->usr_sp = user_sp; 1266 regs->pc = entry_func; 1267 regs->cpsr = spsr; 1268 #endif 1269 #ifdef ARM64 1270 regs->x[0] = a0; 1271 regs->x[1] = a1; 1272 regs->x[2] = a2; 1273 regs->x[3] = a3; 1274 regs->sp = user_sp; 1275 regs->pc = entry_func; 1276 regs->cpsr = spsr; 1277 regs->x[13] = user_sp; /* Used when running TA in Aarch32 */ 1278 regs->sp = user_sp; /* Used when running TA in Aarch64 */ 1279 /* Set frame pointer (user stack can't be unwound past this point) */ 1280 regs->x[29] = 0; 1281 #endif 1282 } 1283 1284 uint32_t thread_enter_user_mode(unsigned long a0, unsigned long a1, 1285 unsigned long a2, unsigned long a3, unsigned long user_sp, 1286 unsigned long entry_func, bool is_32bit, 1287 uint32_t *exit_status0, uint32_t *exit_status1) 1288 { 1289 uint32_t spsr = 0; 1290 uint32_t exceptions = 0; 1291 uint32_t rc = 0; 1292 struct thread_ctx_regs *regs = NULL; 1293 1294 tee_ta_update_session_utime_resume(); 1295 1296 /* Derive SPSR from current CPSR/PSTATE readout. */ 1297 if (!get_spsr(is_32bit, entry_func, &spsr)) { 1298 *exit_status0 = 1; /* panic */ 1299 *exit_status1 = 0xbadbadba; 1300 return 0; 1301 } 1302 1303 exceptions = thread_mask_exceptions(THREAD_EXCP_ALL); 1304 /* 1305 * We're using the per thread location of saved context registers 1306 * for temporary storage. Now that exceptions are masked they will 1307 * not be used for any thing else until they are eventually 1308 * unmasked when user mode has been entered. 1309 */ 1310 regs = thread_get_ctx_regs(); 1311 set_ctx_regs(regs, a0, a1, a2, a3, user_sp, entry_func, spsr); 1312 rc = __thread_enter_user_mode(regs, exit_status0, exit_status1); 1313 thread_unmask_exceptions(exceptions); 1314 return rc; 1315 } 1316 1317 #ifdef CFG_CORE_UNMAP_CORE_AT_EL0 1318 void thread_get_user_kcode(struct mobj **mobj, size_t *offset, 1319 vaddr_t *va, size_t *sz) 1320 { 1321 core_mmu_get_user_va_range(va, NULL); 1322 *mobj = mobj_tee_ram; 1323 *offset = thread_user_kcode_va - VCORE_START_VA; 1324 *sz = thread_user_kcode_size; 1325 } 1326 #endif 1327 1328 #if defined(CFG_CORE_UNMAP_CORE_AT_EL0) && \ 1329 defined(CFG_CORE_WORKAROUND_SPECTRE_BP_SEC) && defined(ARM64) 1330 void thread_get_user_kdata(struct mobj **mobj, size_t *offset, 1331 vaddr_t *va, size_t *sz) 1332 { 1333 vaddr_t v; 1334 1335 core_mmu_get_user_va_range(&v, NULL); 1336 *va = v + thread_user_kcode_size; 1337 *mobj = mobj_tee_ram; 1338 *offset = (vaddr_t)thread_user_kdata_page - VCORE_START_VA; 1339 *sz = sizeof(thread_user_kdata_page); 1340 } 1341 #endif 1342 1343 static void setup_unwind_user_mode(struct thread_svc_regs *regs) 1344 { 1345 #ifdef ARM32 1346 regs->lr = (uintptr_t)thread_unwind_user_mode; 1347 regs->spsr = read_cpsr(); 1348 #endif 1349 #ifdef ARM64 1350 regs->elr = (uintptr_t)thread_unwind_user_mode; 1351 regs->spsr = SPSR_64(SPSR_64_MODE_EL1, SPSR_64_MODE_SP_EL0, 0); 1352 regs->spsr |= read_daif(); 1353 /* 1354 * Regs is the value of stack pointer before calling the SVC 1355 * handler. By the addition matches for the reserved space at the 1356 * beginning of el0_sync_svc(). This prepares the stack when 1357 * returning to thread_unwind_user_mode instead of a normal 1358 * exception return. 1359 */ 1360 regs->sp_el0 = (uint64_t)(regs + 1); 1361 #endif 1362 } 1363 1364 /* 1365 * Note: this function is weak just to make it possible to exclude it from 1366 * the unpaged area. 1367 */ 1368 void __weak thread_svc_handler(struct thread_svc_regs *regs) 1369 { 1370 struct tee_ta_session *sess = NULL; 1371 uint32_t state = 0; 1372 1373 /* Enable native interrupts */ 1374 state = thread_get_exceptions(); 1375 thread_unmask_exceptions(state & ~THREAD_EXCP_NATIVE_INTR); 1376 1377 thread_user_save_vfp(); 1378 1379 /* TA has just entered kernel mode */ 1380 tee_ta_update_session_utime_suspend(); 1381 1382 /* Restore foreign interrupts which are disabled on exception entry */ 1383 thread_restore_foreign_intr(); 1384 1385 tee_ta_get_current_session(&sess); 1386 assert(sess && sess->ctx->ops && sess->ctx->ops->handle_svc); 1387 if (sess->ctx->ops->handle_svc(regs)) { 1388 /* We're about to switch back to user mode */ 1389 tee_ta_update_session_utime_resume(); 1390 } else { 1391 /* We're returning from __thread_enter_user_mode() */ 1392 setup_unwind_user_mode(regs); 1393 } 1394 } 1395