xref: /optee_os/core/arch/arm/kernel/thread.c (revision a50cb361d9e5735f197ccc87beb0d24af8315369)
1 /*
2  * Copyright (c) 2016, Linaro Limited
3  * Copyright (c) 2014, STMicroelectronics International N.V.
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions are met:
8  *
9  * 1. Redistributions of source code must retain the above copyright notice,
10  * this list of conditions and the following disclaimer.
11  *
12  * 2. Redistributions in binary form must reproduce the above copyright notice,
13  * this list of conditions and the following disclaimer in the documentation
14  * and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
20  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26  * POSSIBILITY OF SUCH DAMAGE.
27  */
28 
29 #include <platform_config.h>
30 
31 #include <arm.h>
32 #include <assert.h>
33 #include <keep.h>
34 #include <kernel/misc.h>
35 #include <kernel/panic.h>
36 #include <kernel/tee_ta_manager.h>
37 #include <kernel/thread.h>
38 #include <kernel/thread_defs.h>
39 #include <kernel/tz_proc.h>
40 #include <kernel/tz_proc_def.h>
41 #include <mm/core_memprot.h>
42 #include <mm/tee_mm.h>
43 #include <mm/tee_mmu.h>
44 #include <mm/tee_mmu_defs.h>
45 #include <mm/tee_pager.h>
46 #include <optee_msg.h>
47 #include <sm/optee_smc.h>
48 #include <sm/sm_defs.h>
49 #include <sm/sm.h>
50 #include <trace.h>
51 #include <util.h>
52 
53 #include "thread_private.h"
54 
55 #ifdef ARM32
56 #define STACK_TMP_SIZE		1024
57 #define STACK_THREAD_SIZE	8192
58 
59 #if TRACE_LEVEL > 0
60 #define STACK_ABT_SIZE		2048
61 #else
62 #define STACK_ABT_SIZE		1024
63 #endif
64 
65 #endif /*ARM32*/
66 
67 #ifdef ARM64
68 #define STACK_TMP_SIZE		2048
69 #define STACK_THREAD_SIZE	8192
70 
71 #if TRACE_LEVEL > 0
72 #define STACK_ABT_SIZE		3072
73 #else
74 #define STACK_ABT_SIZE		1024
75 #endif
76 #endif /*ARM64*/
77 
78 #define RPC_MAX_NUM_PARAMS	2
79 
80 struct thread_ctx threads[CFG_NUM_THREADS];
81 
82 static struct thread_core_local thread_core_local[CFG_TEE_CORE_NB_CORE];
83 
84 #ifdef CFG_WITH_STACK_CANARIES
85 #ifdef ARM32
86 #define STACK_CANARY_SIZE	(4 * sizeof(uint32_t))
87 #endif
88 #ifdef ARM64
89 #define STACK_CANARY_SIZE	(8 * sizeof(uint32_t))
90 #endif
91 #define START_CANARY_VALUE	0xdededede
92 #define END_CANARY_VALUE	0xabababab
93 #define GET_START_CANARY(name, stack_num) name[stack_num][0]
94 #define GET_END_CANARY(name, stack_num) \
95 	name[stack_num][sizeof(name[stack_num]) / sizeof(uint32_t) - 1]
96 #else
97 #define STACK_CANARY_SIZE	0
98 #endif
99 
100 #define DECLARE_STACK(name, num_stacks, stack_size, linkage) \
101 linkage uint32_t name[num_stacks] \
102 		[ROUNDUP(stack_size + STACK_CANARY_SIZE, STACK_ALIGNMENT) / \
103 		sizeof(uint32_t)] \
104 		__attribute__((section(".nozi.stack"), \
105 			       aligned(STACK_ALIGNMENT)))
106 
107 #define STACK_SIZE(stack) (sizeof(stack) - STACK_CANARY_SIZE / 2)
108 
109 #define GET_STACK(stack) \
110 	((vaddr_t)(stack) + STACK_SIZE(stack))
111 
112 DECLARE_STACK(stack_tmp, CFG_TEE_CORE_NB_CORE, STACK_TMP_SIZE, /* global */);
113 DECLARE_STACK(stack_abt, CFG_TEE_CORE_NB_CORE, STACK_ABT_SIZE, static);
114 #if !defined(CFG_WITH_ARM_TRUSTED_FW)
115 DECLARE_STACK(stack_sm, CFG_TEE_CORE_NB_CORE, SM_STACK_SIZE, static);
116 #endif
117 #ifndef CFG_WITH_PAGER
118 DECLARE_STACK(stack_thread, CFG_NUM_THREADS, STACK_THREAD_SIZE, static);
119 #endif
120 
121 const uint32_t stack_tmp_stride = STACK_SIZE(stack_tmp[0]);
122 
123 KEEP_PAGER(stack_tmp);
124 KEEP_PAGER(stack_tmp_stride);
125 
126 thread_smc_handler_t thread_std_smc_handler_ptr;
127 static thread_smc_handler_t thread_fast_smc_handler_ptr;
128 thread_fiq_handler_t thread_fiq_handler_ptr;
129 thread_pm_handler_t thread_cpu_on_handler_ptr;
130 thread_pm_handler_t thread_cpu_off_handler_ptr;
131 thread_pm_handler_t thread_cpu_suspend_handler_ptr;
132 thread_pm_handler_t thread_cpu_resume_handler_ptr;
133 thread_pm_handler_t thread_system_off_handler_ptr;
134 thread_pm_handler_t thread_system_reset_handler_ptr;
135 
136 
137 static unsigned int thread_global_lock = SPINLOCK_UNLOCK;
138 static bool thread_prealloc_rpc_cache;
139 
140 static void init_canaries(void)
141 {
142 #ifdef CFG_WITH_STACK_CANARIES
143 	size_t n;
144 #define INIT_CANARY(name)						\
145 	for (n = 0; n < ARRAY_SIZE(name); n++) {			\
146 		uint32_t *start_canary = &GET_START_CANARY(name, n);	\
147 		uint32_t *end_canary = &GET_END_CANARY(name, n);	\
148 									\
149 		*start_canary = START_CANARY_VALUE;			\
150 		*end_canary = END_CANARY_VALUE;				\
151 		DMSG("#Stack canaries for %s[%zu] with top at %p\n",	\
152 			#name, n, (void *)(end_canary - 1));		\
153 		DMSG("watch *%p\n", (void *)end_canary);		\
154 	}
155 
156 	INIT_CANARY(stack_tmp);
157 	INIT_CANARY(stack_abt);
158 #if !defined(CFG_WITH_ARM_TRUSTED_FW)
159 	INIT_CANARY(stack_sm);
160 #endif
161 #ifndef CFG_WITH_PAGER
162 	INIT_CANARY(stack_thread);
163 #endif
164 #endif/*CFG_WITH_STACK_CANARIES*/
165 }
166 
167 #define CANARY_DIED(stack, loc, n) \
168 	do { \
169 		EMSG_RAW("Dead canary at %s of '%s[%zu]'", #loc, #stack, n); \
170 		panic(); \
171 	} while (0)
172 
173 void thread_check_canaries(void)
174 {
175 #ifdef CFG_WITH_STACK_CANARIES
176 	size_t n;
177 
178 	for (n = 0; n < ARRAY_SIZE(stack_tmp); n++) {
179 		if (GET_START_CANARY(stack_tmp, n) != START_CANARY_VALUE)
180 			CANARY_DIED(stack_tmp, start, n);
181 		if (GET_END_CANARY(stack_tmp, n) != END_CANARY_VALUE)
182 			CANARY_DIED(stack_tmp, end, n);
183 	}
184 
185 	for (n = 0; n < ARRAY_SIZE(stack_abt); n++) {
186 		if (GET_START_CANARY(stack_abt, n) != START_CANARY_VALUE)
187 			CANARY_DIED(stack_abt, start, n);
188 		if (GET_END_CANARY(stack_abt, n) != END_CANARY_VALUE)
189 			CANARY_DIED(stack_abt, end, n);
190 
191 	}
192 #if !defined(CFG_WITH_ARM_TRUSTED_FW)
193 	for (n = 0; n < ARRAY_SIZE(stack_sm); n++) {
194 		if (GET_START_CANARY(stack_sm, n) != START_CANARY_VALUE)
195 			CANARY_DIED(stack_sm, start, n);
196 		if (GET_END_CANARY(stack_sm, n) != END_CANARY_VALUE)
197 			CANARY_DIED(stack_sm, end, n);
198 	}
199 #endif
200 #ifndef CFG_WITH_PAGER
201 	for (n = 0; n < ARRAY_SIZE(stack_thread); n++) {
202 		if (GET_START_CANARY(stack_thread, n) != START_CANARY_VALUE)
203 			CANARY_DIED(stack_thread, start, n);
204 		if (GET_END_CANARY(stack_thread, n) != END_CANARY_VALUE)
205 			CANARY_DIED(stack_thread, end, n);
206 	}
207 #endif
208 #endif/*CFG_WITH_STACK_CANARIES*/
209 }
210 
211 static void lock_global(void)
212 {
213 	cpu_spin_lock(&thread_global_lock);
214 }
215 
216 static void unlock_global(void)
217 {
218 	cpu_spin_unlock(&thread_global_lock);
219 }
220 
221 #ifdef ARM32
222 uint32_t thread_get_exceptions(void)
223 {
224 	uint32_t cpsr = read_cpsr();
225 
226 	return (cpsr >> CPSR_F_SHIFT) & THREAD_EXCP_ALL;
227 }
228 
229 void thread_set_exceptions(uint32_t exceptions)
230 {
231 	uint32_t cpsr = read_cpsr();
232 
233 	cpsr &= ~(THREAD_EXCP_ALL << CPSR_F_SHIFT);
234 	cpsr |= ((exceptions & THREAD_EXCP_ALL) << CPSR_F_SHIFT);
235 	write_cpsr(cpsr);
236 }
237 #endif /*ARM32*/
238 
239 #ifdef ARM64
240 uint32_t thread_get_exceptions(void)
241 {
242 	uint32_t daif = read_daif();
243 
244 	return (daif >> DAIF_F_SHIFT) & THREAD_EXCP_ALL;
245 }
246 
247 void thread_set_exceptions(uint32_t exceptions)
248 {
249 	uint32_t daif = read_daif();
250 
251 	daif &= ~(THREAD_EXCP_ALL << DAIF_F_SHIFT);
252 	daif |= ((exceptions & THREAD_EXCP_ALL) << DAIF_F_SHIFT);
253 	write_daif(daif);
254 }
255 #endif /*ARM64*/
256 
257 uint32_t thread_mask_exceptions(uint32_t exceptions)
258 {
259 	uint32_t state = thread_get_exceptions();
260 
261 	thread_set_exceptions(state | (exceptions & THREAD_EXCP_ALL));
262 	return state;
263 }
264 
265 void thread_unmask_exceptions(uint32_t state)
266 {
267 	thread_set_exceptions(state & THREAD_EXCP_ALL);
268 }
269 
270 
271 struct thread_core_local *thread_get_core_local(void)
272 {
273 	uint32_t cpu_id = get_core_pos();
274 
275 	/*
276 	 * IRQs must be disabled before playing with core_local since
277 	 * we otherwise may be rescheduled to a different core in the
278 	 * middle of this function.
279 	 */
280 	assert(thread_get_exceptions() & THREAD_EXCP_IRQ);
281 
282 	assert(cpu_id < CFG_TEE_CORE_NB_CORE);
283 	return &thread_core_local[cpu_id];
284 }
285 
286 static void thread_lazy_save_ns_vfp(void)
287 {
288 #ifdef CFG_WITH_VFP
289 	struct thread_ctx *thr = threads + thread_get_id();
290 
291 	thr->vfp_state.ns_saved = false;
292 #if defined(ARM64) && defined(CFG_WITH_ARM_TRUSTED_FW)
293 	/*
294 	 * ARM TF saves and restores CPACR_EL1, so we must assume NS world
295 	 * uses VFP and always preserve the register file when secure world
296 	 * is about to use it
297 	 */
298 	thr->vfp_state.ns.force_save = true;
299 #endif
300 	vfp_lazy_save_state_init(&thr->vfp_state.ns);
301 #endif /*CFG_WITH_VFP*/
302 }
303 
304 static void thread_lazy_restore_ns_vfp(void)
305 {
306 #ifdef CFG_WITH_VFP
307 	struct thread_ctx *thr = threads + thread_get_id();
308 	struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp;
309 
310 	assert(!thr->vfp_state.sec_lazy_saved && !thr->vfp_state.sec_saved);
311 
312 	if (tuv && tuv->lazy_saved && !tuv->saved) {
313 		vfp_lazy_save_state_final(&tuv->vfp);
314 		tuv->saved = true;
315 	}
316 
317 	vfp_lazy_restore_state(&thr->vfp_state.ns, thr->vfp_state.ns_saved);
318 	thr->vfp_state.ns_saved = false;
319 #endif /*CFG_WITH_VFP*/
320 }
321 
322 #ifdef ARM32
323 static void init_regs(struct thread_ctx *thread,
324 		struct thread_smc_args *args)
325 {
326 	thread->regs.pc = (uint32_t)thread_std_smc_entry;
327 
328 	/*
329 	 * Stdcalls starts in SVC mode with masked IRQ, masked Asynchronous
330 	 * abort and unmasked FIQ.
331 	  */
332 	thread->regs.cpsr = read_cpsr() & ARM32_CPSR_E;
333 	thread->regs.cpsr |= CPSR_MODE_SVC | CPSR_I | CPSR_A;
334 	/* Enable thumb mode if it's a thumb instruction */
335 	if (thread->regs.pc & 1)
336 		thread->regs.cpsr |= CPSR_T;
337 	/* Reinitialize stack pointer */
338 	thread->regs.svc_sp = thread->stack_va_end;
339 
340 	/*
341 	 * Copy arguments into context. This will make the
342 	 * arguments appear in r0-r7 when thread is started.
343 	 */
344 	thread->regs.r0 = args->a0;
345 	thread->regs.r1 = args->a1;
346 	thread->regs.r2 = args->a2;
347 	thread->regs.r3 = args->a3;
348 	thread->regs.r4 = args->a4;
349 	thread->regs.r5 = args->a5;
350 	thread->regs.r6 = args->a6;
351 	thread->regs.r7 = args->a7;
352 }
353 #endif /*ARM32*/
354 
355 #ifdef ARM64
356 static void init_regs(struct thread_ctx *thread,
357 		struct thread_smc_args *args)
358 {
359 	thread->regs.pc = (uint64_t)thread_std_smc_entry;
360 
361 	/*
362 	 * Stdcalls starts in SVC mode with masked IRQ, masked Asynchronous
363 	 * abort and unmasked FIQ.
364 	  */
365 	thread->regs.cpsr = SPSR_64(SPSR_64_MODE_EL1, SPSR_64_MODE_SP_EL0,
366 				    DAIFBIT_IRQ | DAIFBIT_ABT);
367 	/* Reinitialize stack pointer */
368 	thread->regs.sp = thread->stack_va_end;
369 
370 	/*
371 	 * Copy arguments into context. This will make the
372 	 * arguments appear in x0-x7 when thread is started.
373 	 */
374 	thread->regs.x[0] = args->a0;
375 	thread->regs.x[1] = args->a1;
376 	thread->regs.x[2] = args->a2;
377 	thread->regs.x[3] = args->a3;
378 	thread->regs.x[4] = args->a4;
379 	thread->regs.x[5] = args->a5;
380 	thread->regs.x[6] = args->a6;
381 	thread->regs.x[7] = args->a7;
382 
383 	/* Set up frame pointer as per the Aarch64 AAPCS */
384 	thread->regs.x[29] = 0;
385 }
386 #endif /*ARM64*/
387 
388 void thread_init_boot_thread(void)
389 {
390 	struct thread_core_local *l = thread_get_core_local();
391 	size_t n;
392 
393 	for (n = 0; n < CFG_NUM_THREADS; n++) {
394 		TAILQ_INIT(&threads[n].mutexes);
395 		TAILQ_INIT(&threads[n].tsd.sess_stack);
396 #ifdef CFG_SMALL_PAGE_USER_TA
397 		SLIST_INIT(&threads[n].tsd.pgt_cache);
398 #endif
399 	}
400 
401 	for (n = 0; n < CFG_TEE_CORE_NB_CORE; n++)
402 		thread_core_local[n].curr_thread = -1;
403 
404 	l->curr_thread = 0;
405 	threads[0].state = THREAD_STATE_ACTIVE;
406 }
407 
408 void thread_clr_boot_thread(void)
409 {
410 	struct thread_core_local *l = thread_get_core_local();
411 
412 	assert(l->curr_thread >= 0 && l->curr_thread < CFG_NUM_THREADS);
413 	assert(threads[l->curr_thread].state == THREAD_STATE_ACTIVE);
414 	assert(TAILQ_EMPTY(&threads[l->curr_thread].mutexes));
415 	threads[l->curr_thread].state = THREAD_STATE_FREE;
416 	l->curr_thread = -1;
417 }
418 
419 static void thread_alloc_and_run(struct thread_smc_args *args)
420 {
421 	size_t n;
422 	struct thread_core_local *l = thread_get_core_local();
423 	bool found_thread = false;
424 
425 	assert(l->curr_thread == -1);
426 
427 	lock_global();
428 
429 	for (n = 0; n < CFG_NUM_THREADS; n++) {
430 		if (threads[n].state == THREAD_STATE_FREE) {
431 			threads[n].state = THREAD_STATE_ACTIVE;
432 			found_thread = true;
433 			break;
434 		}
435 	}
436 
437 	unlock_global();
438 
439 	if (!found_thread) {
440 		args->a0 = OPTEE_SMC_RETURN_ETHREAD_LIMIT;
441 		return;
442 	}
443 
444 	l->curr_thread = n;
445 
446 	threads[n].flags = 0;
447 	init_regs(threads + n, args);
448 
449 	/* Save Hypervisor Client ID */
450 	threads[n].hyp_clnt_id = args->a7;
451 
452 	thread_lazy_save_ns_vfp();
453 	thread_resume(&threads[n].regs);
454 }
455 
456 #ifdef ARM32
457 static void copy_a0_to_a5(struct thread_ctx_regs *regs,
458 		struct thread_smc_args *args)
459 {
460 	/*
461 	 * Update returned values from RPC, values will appear in
462 	 * r0-r3 when thread is resumed.
463 	 */
464 	regs->r0 = args->a0;
465 	regs->r1 = args->a1;
466 	regs->r2 = args->a2;
467 	regs->r3 = args->a3;
468 	regs->r4 = args->a4;
469 	regs->r5 = args->a5;
470 }
471 #endif /*ARM32*/
472 
473 #ifdef ARM64
474 static void copy_a0_to_a5(struct thread_ctx_regs *regs,
475 		struct thread_smc_args *args)
476 {
477 	/*
478 	 * Update returned values from RPC, values will appear in
479 	 * x0-x3 when thread is resumed.
480 	 */
481 	regs->x[0] = args->a0;
482 	regs->x[1] = args->a1;
483 	regs->x[2] = args->a2;
484 	regs->x[3] = args->a3;
485 	regs->x[4] = args->a4;
486 	regs->x[5] = args->a5;
487 }
488 #endif /*ARM64*/
489 
490 static void thread_resume_from_rpc(struct thread_smc_args *args)
491 {
492 	size_t n = args->a3; /* thread id */
493 	struct thread_core_local *l = thread_get_core_local();
494 	uint32_t rv = 0;
495 
496 	assert(l->curr_thread == -1);
497 
498 	lock_global();
499 
500 	if (n < CFG_NUM_THREADS &&
501 	    threads[n].state == THREAD_STATE_SUSPENDED &&
502 	    args->a7 == threads[n].hyp_clnt_id)
503 		threads[n].state = THREAD_STATE_ACTIVE;
504 	else
505 		rv = OPTEE_SMC_RETURN_ERESUME;
506 
507 	unlock_global();
508 
509 	if (rv) {
510 		args->a0 = rv;
511 		return;
512 	}
513 
514 	l->curr_thread = n;
515 
516 	if (threads[n].have_user_map)
517 		core_mmu_set_user_map(&threads[n].user_map);
518 
519 	/*
520 	 * Return from RPC to request service of an IRQ must not
521 	 * get parameters from non-secure world.
522 	 */
523 	if (threads[n].flags & THREAD_FLAGS_COPY_ARGS_ON_RETURN) {
524 		copy_a0_to_a5(&threads[n].regs, args);
525 		threads[n].flags &= ~THREAD_FLAGS_COPY_ARGS_ON_RETURN;
526 	}
527 
528 	thread_lazy_save_ns_vfp();
529 	thread_resume(&threads[n].regs);
530 }
531 
532 void thread_handle_fast_smc(struct thread_smc_args *args)
533 {
534 	thread_check_canaries();
535 	thread_fast_smc_handler_ptr(args);
536 	/* Fast handlers must not unmask any exceptions */
537 	assert(thread_get_exceptions() == THREAD_EXCP_ALL);
538 }
539 
540 void thread_handle_std_smc(struct thread_smc_args *args)
541 {
542 	thread_check_canaries();
543 
544 	if (args->a0 == OPTEE_SMC_CALL_RETURN_FROM_RPC)
545 		thread_resume_from_rpc(args);
546 	else
547 		thread_alloc_and_run(args);
548 }
549 
550 /* Helper routine for the assembly function thread_std_smc_entry() */
551 void __thread_std_smc_entry(struct thread_smc_args *args)
552 {
553 	struct thread_ctx *thr = threads + thread_get_id();
554 
555 	if (!thr->rpc_arg) {
556 		paddr_t parg;
557 		uint64_t carg;
558 		void *arg;
559 
560 		thread_rpc_alloc_arg(
561 			OPTEE_MSG_GET_ARG_SIZE(RPC_MAX_NUM_PARAMS),
562 			&parg, &carg);
563 		if (!parg || !ALIGNMENT_IS_OK(parg, struct optee_msg_arg) ||
564 		    !(arg = phys_to_virt(parg, CORE_MEM_NSEC_SHM))) {
565 			thread_rpc_free_arg(carg);
566 			args->a0 = OPTEE_SMC_RETURN_ENOMEM;
567 			return;
568 		}
569 
570 		thr->rpc_arg = arg;
571 		thr->rpc_carg = carg;
572 	}
573 
574 	thread_std_smc_handler_ptr(args);
575 
576 	if (!thread_prealloc_rpc_cache) {
577 		thread_rpc_free_arg(thr->rpc_carg);
578 		thr->rpc_carg = 0;
579 		thr->rpc_arg = 0;
580 	}
581 }
582 
583 void *thread_get_tmp_sp(void)
584 {
585 	struct thread_core_local *l = thread_get_core_local();
586 
587 	return (void *)l->tmp_stack_va_end;
588 }
589 
590 #ifdef ARM64
591 vaddr_t thread_get_saved_thread_sp(void)
592 {
593 	struct thread_core_local *l = thread_get_core_local();
594 	int ct = l->curr_thread;
595 
596 	assert(ct != -1);
597 	return threads[ct].kern_sp;
598 }
599 #endif /*ARM64*/
600 
601 bool thread_addr_is_in_stack(vaddr_t va)
602 {
603 	struct thread_ctx *thr = threads + thread_get_id();
604 
605 	return va < thr->stack_va_end &&
606 	       va >= (thr->stack_va_end - STACK_THREAD_SIZE);
607 }
608 
609 void thread_state_free(void)
610 {
611 	struct thread_core_local *l = thread_get_core_local();
612 	int ct = l->curr_thread;
613 
614 	assert(ct != -1);
615 	assert(TAILQ_EMPTY(&threads[ct].mutexes));
616 
617 	thread_lazy_restore_ns_vfp();
618 	tee_pager_release_phys(
619 		(void *)(threads[ct].stack_va_end - STACK_THREAD_SIZE),
620 		STACK_THREAD_SIZE);
621 
622 	lock_global();
623 
624 	assert(threads[ct].state == THREAD_STATE_ACTIVE);
625 	threads[ct].state = THREAD_STATE_FREE;
626 	threads[ct].flags = 0;
627 	l->curr_thread = -1;
628 
629 	unlock_global();
630 }
631 
632 #ifdef ARM32
633 static bool is_from_user(uint32_t cpsr)
634 {
635 	return (cpsr & ARM32_CPSR_MODE_MASK) == ARM32_CPSR_MODE_USR;
636 }
637 #endif
638 
639 #ifdef ARM64
640 static bool is_from_user(uint32_t cpsr)
641 {
642 	if (cpsr & (SPSR_MODE_RW_32 << SPSR_MODE_RW_SHIFT))
643 		return true;
644 	if (((cpsr >> SPSR_64_MODE_EL_SHIFT) & SPSR_64_MODE_EL_MASK) ==
645 	     SPSR_64_MODE_EL0)
646 		return true;
647 	return false;
648 }
649 #endif
650 
651 #ifdef CFG_WITH_PAGER
652 static void release_unused_kernel_stack(struct thread_ctx *thr)
653 {
654 	vaddr_t sp = thr->regs.svc_sp;
655 	vaddr_t base = thr->stack_va_end - STACK_THREAD_SIZE;
656 	size_t len = sp - base;
657 
658 	tee_pager_release_phys((void *)base, len);
659 }
660 #else
661 static void release_unused_kernel_stack(struct thread_ctx *thr __unused)
662 {
663 }
664 #endif
665 
666 int thread_state_suspend(uint32_t flags, uint32_t cpsr, vaddr_t pc)
667 {
668 	struct thread_core_local *l = thread_get_core_local();
669 	int ct = l->curr_thread;
670 
671 	assert(ct != -1);
672 
673 	thread_check_canaries();
674 
675 	release_unused_kernel_stack(threads + ct);
676 
677 	if (is_from_user(cpsr))
678 		thread_user_save_vfp();
679 	thread_lazy_restore_ns_vfp();
680 
681 	lock_global();
682 
683 	assert(threads[ct].state == THREAD_STATE_ACTIVE);
684 	threads[ct].flags |= flags;
685 	threads[ct].regs.cpsr = cpsr;
686 	threads[ct].regs.pc = pc;
687 	threads[ct].state = THREAD_STATE_SUSPENDED;
688 
689 	threads[ct].have_user_map = core_mmu_user_mapping_is_active();
690 	if (threads[ct].have_user_map) {
691 		core_mmu_get_user_map(&threads[ct].user_map);
692 		core_mmu_set_user_map(NULL);
693 	}
694 
695 	l->curr_thread = -1;
696 
697 	unlock_global();
698 
699 	return ct;
700 }
701 
702 #ifdef ARM32
703 static void set_tmp_stack(struct thread_core_local *l, vaddr_t sp)
704 {
705 	l->tmp_stack_va_end = sp;
706 	thread_set_irq_sp(sp);
707 	thread_set_fiq_sp(sp);
708 }
709 
710 static void set_abt_stack(struct thread_core_local *l __unused, vaddr_t sp)
711 {
712 	thread_set_abt_sp(sp);
713 }
714 #endif /*ARM32*/
715 
716 #ifdef ARM64
717 static void set_tmp_stack(struct thread_core_local *l, vaddr_t sp)
718 {
719 	/*
720 	 * We're already using the tmp stack when this function is called
721 	 * so there's no need to assign it to any stack pointer. However,
722 	 * we'll need to restore it at different times so store it here.
723 	 */
724 	l->tmp_stack_va_end = sp;
725 }
726 
727 static void set_abt_stack(struct thread_core_local *l, vaddr_t sp)
728 {
729 	l->abt_stack_va_end = sp;
730 }
731 #endif /*ARM64*/
732 
733 bool thread_init_stack(uint32_t thread_id, vaddr_t sp)
734 {
735 	if (thread_id >= CFG_NUM_THREADS)
736 		return false;
737 	threads[thread_id].stack_va_end = sp;
738 	return true;
739 }
740 
741 int thread_get_id_may_fail(void)
742 {
743 	/* thread_get_core_local() requires IRQs to be disabled */
744 	uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_IRQ);
745 	struct thread_core_local *l = thread_get_core_local();
746 	int ct = l->curr_thread;
747 
748 	thread_unmask_exceptions(exceptions);
749 	return ct;
750 }
751 
752 int thread_get_id(void)
753 {
754 	int ct = thread_get_id_may_fail();
755 
756 	assert(ct >= 0 && ct < CFG_NUM_THREADS);
757 	return ct;
758 }
759 
760 static void init_handlers(const struct thread_handlers *handlers)
761 {
762 	thread_std_smc_handler_ptr = handlers->std_smc;
763 	thread_fast_smc_handler_ptr = handlers->fast_smc;
764 	thread_fiq_handler_ptr = handlers->fiq;
765 	thread_cpu_on_handler_ptr = handlers->cpu_on;
766 	thread_cpu_off_handler_ptr = handlers->cpu_off;
767 	thread_cpu_suspend_handler_ptr = handlers->cpu_suspend;
768 	thread_cpu_resume_handler_ptr = handlers->cpu_resume;
769 	thread_system_off_handler_ptr = handlers->system_off;
770 	thread_system_reset_handler_ptr = handlers->system_reset;
771 }
772 
773 #ifdef CFG_WITH_PAGER
774 static void init_thread_stacks(void)
775 {
776 	size_t n;
777 
778 	/*
779 	 * Allocate virtual memory for thread stacks.
780 	 */
781 	for (n = 0; n < CFG_NUM_THREADS; n++) {
782 		tee_mm_entry_t *mm;
783 		vaddr_t sp;
784 
785 		/* Find vmem for thread stack and its protection gap */
786 		mm = tee_mm_alloc(&tee_mm_vcore,
787 				  SMALL_PAGE_SIZE + STACK_THREAD_SIZE);
788 		assert(mm);
789 
790 		/* Claim eventual physical page */
791 		tee_pager_add_pages(tee_mm_get_smem(mm), tee_mm_get_size(mm),
792 				    true);
793 
794 		/* Add the area to the pager */
795 		tee_pager_add_core_area(tee_mm_get_smem(mm) + SMALL_PAGE_SIZE,
796 					tee_mm_get_bytes(mm) - SMALL_PAGE_SIZE,
797 					TEE_MATTR_PRW | TEE_MATTR_LOCKED,
798 					NULL, NULL);
799 
800 		/* init effective stack */
801 		sp = tee_mm_get_smem(mm) + tee_mm_get_bytes(mm);
802 		if (!thread_init_stack(n, sp))
803 			panic("init stack failed");
804 	}
805 }
806 #else
807 static void init_thread_stacks(void)
808 {
809 	size_t n;
810 
811 	/* Assign the thread stacks */
812 	for (n = 0; n < CFG_NUM_THREADS; n++) {
813 		if (!thread_init_stack(n, GET_STACK(stack_thread[n])))
814 			panic("thread_init_stack failed");
815 	}
816 }
817 #endif /*CFG_WITH_PAGER*/
818 
819 void thread_init_primary(const struct thread_handlers *handlers)
820 {
821 	init_handlers(handlers);
822 
823 	/* Initialize canaries around the stacks */
824 	init_canaries();
825 
826 	init_thread_stacks();
827 	pgt_init();
828 }
829 
830 static void init_sec_mon(size_t pos __maybe_unused)
831 {
832 #if !defined(CFG_WITH_ARM_TRUSTED_FW)
833 	/* Initialize secure monitor */
834 	sm_init(GET_STACK(stack_sm[pos]));
835 	sm_set_entry_vector(thread_vector_table);
836 #endif
837 }
838 
839 void thread_init_per_cpu(void)
840 {
841 	size_t pos = get_core_pos();
842 	struct thread_core_local *l = thread_get_core_local();
843 
844 	init_sec_mon(pos);
845 
846 	set_tmp_stack(l, GET_STACK(stack_tmp[pos]));
847 	set_abt_stack(l, GET_STACK(stack_abt[pos]));
848 
849 	thread_init_vbar();
850 }
851 
852 struct thread_specific_data *thread_get_tsd(void)
853 {
854 	return &threads[thread_get_id()].tsd;
855 }
856 
857 struct thread_ctx_regs *thread_get_ctx_regs(void)
858 {
859 	struct thread_core_local *l = thread_get_core_local();
860 
861 	assert(l->curr_thread != -1);
862 	return &threads[l->curr_thread].regs;
863 }
864 
865 void thread_set_irq(bool enable)
866 {
867 	/* thread_get_core_local() requires IRQs to be disabled */
868 	uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_IRQ);
869 	struct thread_core_local *l;
870 
871 	l = thread_get_core_local();
872 
873 	assert(l->curr_thread != -1);
874 
875 	if (enable) {
876 		threads[l->curr_thread].flags |= THREAD_FLAGS_IRQ_ENABLE;
877 		thread_set_exceptions(exceptions & ~THREAD_EXCP_IRQ);
878 	} else {
879 		/*
880 		 * No need to disable IRQ here since it's already disabled
881 		 * above.
882 		 */
883 		threads[l->curr_thread].flags &= ~THREAD_FLAGS_IRQ_ENABLE;
884 	}
885 }
886 
887 void thread_restore_irq(void)
888 {
889 	/* thread_get_core_local() requires IRQs to be disabled */
890 	uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_IRQ);
891 	struct thread_core_local *l;
892 
893 	l = thread_get_core_local();
894 
895 	assert(l->curr_thread != -1);
896 
897 	if (threads[l->curr_thread].flags & THREAD_FLAGS_IRQ_ENABLE)
898 		thread_set_exceptions(exceptions & ~THREAD_EXCP_IRQ);
899 }
900 
901 #ifdef CFG_WITH_VFP
902 uint32_t thread_kernel_enable_vfp(void)
903 {
904 	uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_IRQ);
905 	struct thread_ctx *thr = threads + thread_get_id();
906 	struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp;
907 
908 	assert(!vfp_is_enabled());
909 
910 	if (!thr->vfp_state.ns_saved) {
911 		vfp_lazy_save_state_final(&thr->vfp_state.ns);
912 		thr->vfp_state.ns_saved = true;
913 	} else if (thr->vfp_state.sec_lazy_saved &&
914 		   !thr->vfp_state.sec_saved) {
915 		/*
916 		 * This happens when we're handling an abort while the
917 		 * thread was using the VFP state.
918 		 */
919 		vfp_lazy_save_state_final(&thr->vfp_state.sec);
920 		thr->vfp_state.sec_saved = true;
921 	} else if (tuv && tuv->lazy_saved && !tuv->saved) {
922 		/*
923 		 * This can happen either during syscall or abort
924 		 * processing (while processing a syscall).
925 		 */
926 		vfp_lazy_save_state_final(&tuv->vfp);
927 		tuv->saved = true;
928 	}
929 
930 	vfp_enable();
931 	return exceptions;
932 }
933 
934 void thread_kernel_disable_vfp(uint32_t state)
935 {
936 	uint32_t exceptions;
937 
938 	assert(vfp_is_enabled());
939 
940 	vfp_disable();
941 	exceptions = thread_get_exceptions();
942 	assert(exceptions & THREAD_EXCP_IRQ);
943 	exceptions &= ~THREAD_EXCP_IRQ;
944 	exceptions |= state & THREAD_EXCP_IRQ;
945 	thread_set_exceptions(exceptions);
946 }
947 
948 void thread_kernel_save_vfp(void)
949 {
950 	struct thread_ctx *thr = threads + thread_get_id();
951 
952 	assert(thread_get_exceptions() & THREAD_EXCP_IRQ);
953 	if (vfp_is_enabled()) {
954 		vfp_lazy_save_state_init(&thr->vfp_state.sec);
955 		thr->vfp_state.sec_lazy_saved = true;
956 	}
957 }
958 
959 void thread_kernel_restore_vfp(void)
960 {
961 	struct thread_ctx *thr = threads + thread_get_id();
962 
963 	assert(thread_get_exceptions() & THREAD_EXCP_IRQ);
964 	assert(!vfp_is_enabled());
965 	if (thr->vfp_state.sec_lazy_saved) {
966 		vfp_lazy_restore_state(&thr->vfp_state.sec,
967 				       thr->vfp_state.sec_saved);
968 		thr->vfp_state.sec_saved = false;
969 		thr->vfp_state.sec_lazy_saved = false;
970 	}
971 }
972 
973 void thread_user_enable_vfp(struct thread_user_vfp_state *uvfp)
974 {
975 	struct thread_ctx *thr = threads + thread_get_id();
976 	struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp;
977 
978 	assert(thread_get_exceptions() & THREAD_EXCP_IRQ);
979 	assert(!vfp_is_enabled());
980 
981 	if (!thr->vfp_state.ns_saved) {
982 		vfp_lazy_save_state_final(&thr->vfp_state.ns);
983 		thr->vfp_state.ns_saved = true;
984 	} else if (tuv && uvfp != tuv) {
985 		if (tuv->lazy_saved && !tuv->saved) {
986 			vfp_lazy_save_state_final(&tuv->vfp);
987 			tuv->saved = true;
988 		}
989 	}
990 
991 	if (uvfp->lazy_saved)
992 		vfp_lazy_restore_state(&uvfp->vfp, uvfp->saved);
993 	uvfp->lazy_saved = false;
994 	uvfp->saved = false;
995 
996 	thr->vfp_state.uvfp = uvfp;
997 	vfp_enable();
998 }
999 
1000 void thread_user_save_vfp(void)
1001 {
1002 	struct thread_ctx *thr = threads + thread_get_id();
1003 	struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp;
1004 
1005 	assert(thread_get_exceptions() & THREAD_EXCP_IRQ);
1006 	if (!vfp_is_enabled())
1007 		return;
1008 
1009 	assert(tuv && !tuv->lazy_saved && !tuv->saved);
1010 	vfp_lazy_save_state_init(&tuv->vfp);
1011 	tuv->lazy_saved = true;
1012 }
1013 
1014 void thread_user_clear_vfp(struct thread_user_vfp_state *uvfp)
1015 {
1016 	struct thread_ctx *thr = threads + thread_get_id();
1017 
1018 	if (uvfp == thr->vfp_state.uvfp)
1019 		thr->vfp_state.uvfp = NULL;
1020 	uvfp->lazy_saved = false;
1021 	uvfp->saved = false;
1022 }
1023 #endif /*CFG_WITH_VFP*/
1024 
1025 #ifdef ARM32
1026 static bool get_spsr(bool is_32bit, unsigned long entry_func, uint32_t *spsr)
1027 {
1028 	uint32_t s;
1029 
1030 	if (!is_32bit)
1031 		return false;
1032 
1033 	s = read_spsr();
1034 	s &= ~(CPSR_MODE_MASK | CPSR_T | CPSR_IT_MASK1 | CPSR_IT_MASK2);
1035 	s |= CPSR_MODE_USR;
1036 	if (entry_func & 1)
1037 		s |= CPSR_T;
1038 	*spsr = s;
1039 	return true;
1040 }
1041 #endif
1042 
1043 #ifdef ARM64
1044 static bool get_spsr(bool is_32bit, unsigned long entry_func, uint32_t *spsr)
1045 {
1046 	uint32_t s;
1047 
1048 	if (is_32bit) {
1049 		s = read_daif() & (SPSR_32_AIF_MASK << SPSR_32_AIF_SHIFT);
1050 		s |= SPSR_MODE_RW_32 << SPSR_MODE_RW_SHIFT;
1051 		s |= (entry_func & SPSR_32_T_MASK) << SPSR_32_T_SHIFT;
1052 	} else {
1053 		s = read_daif() & (SPSR_64_DAIF_MASK << SPSR_64_DAIF_SHIFT);
1054 	}
1055 
1056 	*spsr = s;
1057 	return true;
1058 }
1059 #endif
1060 
1061 uint32_t thread_enter_user_mode(unsigned long a0, unsigned long a1,
1062 		unsigned long a2, unsigned long a3, unsigned long user_sp,
1063 		unsigned long entry_func, bool is_32bit,
1064 		uint32_t *exit_status0, uint32_t *exit_status1)
1065 {
1066 	uint32_t spsr;
1067 
1068 	if (!get_spsr(is_32bit, entry_func, &spsr)) {
1069 		*exit_status0 = 1; /* panic */
1070 		*exit_status1 = 0xbadbadba;
1071 		return 0;
1072 	}
1073 	return __thread_enter_user_mode(a0, a1, a2, a3, user_sp, entry_func,
1074 					spsr, exit_status0, exit_status1);
1075 }
1076 
1077 void thread_add_mutex(struct mutex *m)
1078 {
1079 	struct thread_core_local *l = thread_get_core_local();
1080 	int ct = l->curr_thread;
1081 
1082 	assert(ct != -1 && threads[ct].state == THREAD_STATE_ACTIVE);
1083 	assert(m->owner_id == -1);
1084 	m->owner_id = ct;
1085 	TAILQ_INSERT_TAIL(&threads[ct].mutexes, m, link);
1086 }
1087 
1088 void thread_rem_mutex(struct mutex *m)
1089 {
1090 	struct thread_core_local *l = thread_get_core_local();
1091 	int ct = l->curr_thread;
1092 
1093 	assert(ct != -1 && threads[ct].state == THREAD_STATE_ACTIVE);
1094 	assert(m->owner_id == ct);
1095 	m->owner_id = -1;
1096 	TAILQ_REMOVE(&threads[ct].mutexes, m, link);
1097 }
1098 
1099 bool thread_disable_prealloc_rpc_cache(uint64_t *cookie)
1100 {
1101 	bool rv;
1102 	size_t n;
1103 	uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_IRQ);
1104 
1105 	lock_global();
1106 
1107 	for (n = 0; n < CFG_NUM_THREADS; n++) {
1108 		if (threads[n].state != THREAD_STATE_FREE) {
1109 			rv = false;
1110 			goto out;
1111 		}
1112 	}
1113 
1114 	rv = true;
1115 	for (n = 0; n < CFG_NUM_THREADS; n++) {
1116 		if (threads[n].rpc_arg) {
1117 			*cookie = threads[n].rpc_carg;
1118 			threads[n].rpc_carg = 0;
1119 			threads[n].rpc_arg = NULL;
1120 			goto out;
1121 		}
1122 	}
1123 
1124 	*cookie = 0;
1125 	thread_prealloc_rpc_cache = false;
1126 out:
1127 	unlock_global();
1128 	thread_unmask_exceptions(exceptions);
1129 	return rv;
1130 }
1131 
1132 bool thread_enable_prealloc_rpc_cache(void)
1133 {
1134 	bool rv;
1135 	size_t n;
1136 	uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_IRQ);
1137 
1138 	lock_global();
1139 
1140 	for (n = 0; n < CFG_NUM_THREADS; n++) {
1141 		if (threads[n].state != THREAD_STATE_FREE) {
1142 			rv = false;
1143 			goto out;
1144 		}
1145 	}
1146 
1147 	rv = true;
1148 	thread_prealloc_rpc_cache = true;
1149 out:
1150 	unlock_global();
1151 	thread_unmask_exceptions(exceptions);
1152 	return rv;
1153 }
1154 
1155 static uint32_t rpc_cmd_nolock(uint32_t cmd, size_t num_params,
1156 		struct optee_msg_param *params)
1157 {
1158 	uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { OPTEE_SMC_RETURN_RPC_CMD };
1159 	struct thread_ctx *thr = threads + thread_get_id();
1160 	struct optee_msg_arg *arg = thr->rpc_arg;
1161 	uint64_t carg = thr->rpc_carg;
1162 	const size_t params_size = sizeof(struct optee_msg_param) * num_params;
1163 	size_t n;
1164 
1165 	assert(arg && carg && num_params <= RPC_MAX_NUM_PARAMS);
1166 
1167 	memset(arg, 0, OPTEE_MSG_GET_ARG_SIZE(RPC_MAX_NUM_PARAMS));
1168 	arg->cmd = cmd;
1169 	arg->ret = TEE_ERROR_GENERIC; /* in case value isn't updated */
1170 	arg->num_params = num_params;
1171 	memcpy(OPTEE_MSG_GET_PARAMS(arg), params, params_size);
1172 
1173 	reg_pair_from_64(carg, rpc_args + 1, rpc_args + 2);
1174 	thread_rpc(rpc_args);
1175 	for (n = 0; n < num_params; n++) {
1176 		switch (params[n].attr & OPTEE_MSG_ATTR_TYPE_MASK) {
1177 		case OPTEE_MSG_ATTR_TYPE_VALUE_OUTPUT:
1178 		case OPTEE_MSG_ATTR_TYPE_VALUE_INOUT:
1179 		case OPTEE_MSG_ATTR_TYPE_RMEM_OUTPUT:
1180 		case OPTEE_MSG_ATTR_TYPE_RMEM_INOUT:
1181 		case OPTEE_MSG_ATTR_TYPE_TMEM_OUTPUT:
1182 		case OPTEE_MSG_ATTR_TYPE_TMEM_INOUT:
1183 			memcpy(params + n, OPTEE_MSG_GET_PARAMS(arg) + n,
1184 			       sizeof(struct optee_msg_param));
1185 			break;
1186 		default:
1187 			break;
1188 		}
1189 	}
1190 	return arg->ret;
1191 }
1192 
1193 uint32_t thread_rpc_cmd(uint32_t cmd, size_t num_params,
1194 		struct optee_msg_param *params)
1195 {
1196 	uint32_t ret;
1197 
1198 	ret = rpc_cmd_nolock(cmd, num_params, params);
1199 
1200 	return ret;
1201 }
1202 
1203 static bool check_alloced_shm(paddr_t pa, size_t len, size_t align)
1204 {
1205 	if (pa & (align - 1))
1206 		return false;
1207 	return core_pbuf_is(CORE_MEM_NSEC_SHM, pa, len);
1208 }
1209 
1210 void thread_rpc_free_arg(uint64_t cookie)
1211 {
1212 	if (cookie) {
1213 		uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = {
1214 			OPTEE_SMC_RETURN_RPC_FREE
1215 		};
1216 
1217 		reg_pair_from_64(cookie, rpc_args + 1, rpc_args + 2);
1218 		thread_rpc(rpc_args);
1219 	}
1220 }
1221 
1222 void thread_rpc_alloc_arg(size_t size, paddr_t *arg, uint64_t *cookie)
1223 {
1224 	paddr_t pa;
1225 	uint64_t co;
1226 	uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = {
1227 		OPTEE_SMC_RETURN_RPC_ALLOC, size
1228 	};
1229 
1230 	thread_rpc(rpc_args);
1231 
1232 	pa = reg_pair_to_64(rpc_args[1], rpc_args[2]);
1233 	co = reg_pair_to_64(rpc_args[4], rpc_args[5]);
1234 	if (!check_alloced_shm(pa, size, sizeof(uint64_t))) {
1235 		thread_rpc_free_arg(co);
1236 		pa = 0;
1237 		co = 0;
1238 	}
1239 
1240 	*arg = pa;
1241 	*cookie = co;
1242 }
1243 
1244 /**
1245  * Free physical memory previously allocated with thread_rpc_alloc()
1246  *
1247  * @cookie:	cookie received when allocating the buffer
1248  * @bt:		 must be the same as supplied when allocating
1249  */
1250 static void thread_rpc_free(unsigned int bt, uint64_t cookie)
1251 {
1252 	uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { OPTEE_SMC_RETURN_RPC_CMD };
1253 	struct thread_ctx *thr = threads + thread_get_id();
1254 	struct optee_msg_arg *arg = thr->rpc_arg;
1255 	uint64_t carg = thr->rpc_carg;
1256 	struct optee_msg_param *params = OPTEE_MSG_GET_PARAMS(arg);
1257 
1258 	memset(arg, 0, OPTEE_MSG_GET_ARG_SIZE(1));
1259 	arg->cmd = OPTEE_MSG_RPC_CMD_SHM_FREE;
1260 	arg->ret = TEE_ERROR_GENERIC; /* in case value isn't updated */
1261 	arg->num_params = 1;
1262 
1263 	params[0].attr = OPTEE_MSG_ATTR_TYPE_VALUE_INPUT;
1264 	params[0].u.value.a = bt;
1265 	params[0].u.value.b = cookie;
1266 	params[0].u.value.c = 0;
1267 
1268 	reg_pair_from_64(carg, rpc_args + 1, rpc_args + 2);
1269 	thread_rpc(rpc_args);
1270 }
1271 
1272 /**
1273  * Allocates shared memory buffer via RPC
1274  *
1275  * @size:	size in bytes of shared memory buffer
1276  * @align:	required alignment of buffer
1277  * @bt:		buffer type OPTEE_MSG_RPC_SHM_TYPE_*
1278  * @payload:	returned physical pointer to buffer, 0 if allocation
1279  *		failed.
1280  * @cookie:	returned cookie used when freeing the buffer
1281  */
1282 static void thread_rpc_alloc(size_t size, size_t align, unsigned int bt,
1283 			paddr_t *payload, uint64_t *cookie)
1284 {
1285 	uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { OPTEE_SMC_RETURN_RPC_CMD };
1286 	struct thread_ctx *thr = threads + thread_get_id();
1287 	struct optee_msg_arg *arg = thr->rpc_arg;
1288 	uint64_t carg = thr->rpc_carg;
1289 	struct optee_msg_param *params = OPTEE_MSG_GET_PARAMS(arg);
1290 
1291 	memset(arg, 0, OPTEE_MSG_GET_ARG_SIZE(1));
1292 	arg->cmd = OPTEE_MSG_RPC_CMD_SHM_ALLOC;
1293 	arg->ret = TEE_ERROR_GENERIC; /* in case value isn't updated */
1294 	arg->num_params = 1;
1295 
1296 	params[0].attr = OPTEE_MSG_ATTR_TYPE_VALUE_INPUT;
1297 	params[0].u.value.a = bt;
1298 	params[0].u.value.b = size;
1299 	params[0].u.value.c = align;
1300 
1301 	reg_pair_from_64(carg, rpc_args + 1, rpc_args + 2);
1302 	thread_rpc(rpc_args);
1303 	if (arg->ret != TEE_SUCCESS)
1304 		goto fail;
1305 
1306 	if (arg->num_params != 1)
1307 		goto fail;
1308 
1309 	if (params[0].attr != OPTEE_MSG_ATTR_TYPE_TMEM_OUTPUT)
1310 		goto fail;
1311 
1312 	if (!check_alloced_shm(params[0].u.tmem.buf_ptr, size, align)) {
1313 		thread_rpc_free(bt, params[0].u.tmem.shm_ref);
1314 		goto fail;
1315 	}
1316 
1317 	*payload = params[0].u.tmem.buf_ptr;
1318 	*cookie = params[0].u.tmem.shm_ref;
1319 	return;
1320 fail:
1321 	*payload = 0;
1322 	*cookie = 0;
1323 }
1324 
1325 void thread_rpc_alloc_payload(size_t size, paddr_t *payload, uint64_t *cookie)
1326 {
1327 	thread_rpc_alloc(size, 8, OPTEE_MSG_RPC_SHM_TYPE_APPL, payload, cookie);
1328 }
1329 
1330 void thread_rpc_free_payload(uint64_t cookie)
1331 {
1332 	thread_rpc_free(OPTEE_MSG_RPC_SHM_TYPE_APPL, cookie);
1333 }
1334