1 /* 2 * Copyright (c) 2014, STMicroelectronics International N.V. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, 9 * this list of conditions and the following disclaimer. 10 * 11 * 2. Redistributions in binary form must reproduce the above copyright notice, 12 * this list of conditions and the following disclaimer in the documentation 13 * and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 */ 27 #include <platform_config.h> 28 29 #include <kernel/panic.h> 30 #include <kernel/thread.h> 31 #include <kernel/thread_defs.h> 32 #include "thread_private.h" 33 #include <sm/sm_defs.h> 34 #include <sm/sm.h> 35 #include <sm/teesmc.h> 36 #include <sm/teesmc_optee.h> 37 #include <arm.h> 38 #include <kernel/tz_proc_def.h> 39 #include <kernel/tz_proc.h> 40 #include <kernel/misc.h> 41 #include <mm/tee_mmu.h> 42 #include <mm/tee_mmu_defs.h> 43 #include <mm/tee_mm.h> 44 #include <mm/tee_pager.h> 45 #include <kernel/tee_ta_manager.h> 46 #include <util.h> 47 #include <trace.h> 48 49 #include <assert.h> 50 51 #ifdef ARM32 52 #define STACK_TMP_SIZE 1024 53 #define STACK_THREAD_SIZE 8192 54 55 #if TRACE_LEVEL > 0 56 #define STACK_ABT_SIZE 2048 57 #else 58 #define STACK_ABT_SIZE 1024 59 #endif 60 61 #endif /*ARM32*/ 62 63 #ifdef ARM64 64 #define STACK_TMP_SIZE 2048 65 #define STACK_THREAD_SIZE 8192 66 67 #if TRACE_LEVEL > 0 68 #define STACK_ABT_SIZE 3072 69 #else 70 #define STACK_ABT_SIZE 1024 71 #endif 72 #endif /*ARM64*/ 73 74 #define RPC_MAX_PARAMS 2 75 76 struct thread_ctx threads[CFG_NUM_THREADS]; 77 78 static struct thread_core_local thread_core_local[CFG_TEE_CORE_NB_CORE]; 79 80 #ifdef CFG_WITH_VFP 81 struct thread_vfp_state { 82 bool ns_saved; 83 bool sec_saved; 84 bool sec_lazy_saved; 85 struct vfp_state ns; 86 struct vfp_state sec; 87 }; 88 89 static struct thread_vfp_state thread_vfp_state; 90 #endif /*CFG_WITH_VFP*/ 91 92 #ifdef CFG_WITH_STACK_CANARIES 93 #ifdef ARM32 94 #define STACK_CANARY_SIZE (4 * sizeof(uint32_t)) 95 #endif 96 #ifdef ARM64 97 #define STACK_CANARY_SIZE (8 * sizeof(uint32_t)) 98 #endif 99 #define START_CANARY_VALUE 0xdededede 100 #define END_CANARY_VALUE 0xabababab 101 #define GET_START_CANARY(name, stack_num) name[stack_num][0] 102 #define GET_END_CANARY(name, stack_num) \ 103 name[stack_num][sizeof(name[stack_num]) / sizeof(uint32_t) - 1] 104 #else 105 #define STACK_CANARY_SIZE 0 106 #endif 107 108 #define DECLARE_STACK(name, num_stacks, stack_size) \ 109 static uint32_t name[num_stacks][ \ 110 ROUNDUP(stack_size + STACK_CANARY_SIZE, STACK_ALIGNMENT) / \ 111 sizeof(uint32_t)] \ 112 __attribute__((section(".nozi.stack"), \ 113 aligned(STACK_ALIGNMENT))) 114 115 #define GET_STACK(stack) \ 116 ((vaddr_t)(stack) + sizeof(stack) - STACK_CANARY_SIZE / 2) 117 118 DECLARE_STACK(stack_tmp, CFG_TEE_CORE_NB_CORE, STACK_TMP_SIZE); 119 DECLARE_STACK(stack_abt, CFG_TEE_CORE_NB_CORE, STACK_ABT_SIZE); 120 #if !defined(CFG_WITH_ARM_TRUSTED_FW) 121 DECLARE_STACK(stack_sm, CFG_TEE_CORE_NB_CORE, SM_STACK_SIZE); 122 #endif 123 #ifndef CFG_WITH_PAGER 124 DECLARE_STACK(stack_thread, CFG_NUM_THREADS, STACK_THREAD_SIZE); 125 #endif 126 127 const vaddr_t stack_tmp_top[CFG_TEE_CORE_NB_CORE] = { 128 GET_STACK(stack_tmp[0]), 129 #if CFG_TEE_CORE_NB_CORE > 1 130 GET_STACK(stack_tmp[1]), 131 #endif 132 #if CFG_TEE_CORE_NB_CORE > 2 133 GET_STACK(stack_tmp[2]), 134 #endif 135 #if CFG_TEE_CORE_NB_CORE > 3 136 GET_STACK(stack_tmp[3]), 137 #endif 138 #if CFG_TEE_CORE_NB_CORE > 4 139 GET_STACK(stack_tmp[4]), 140 #endif 141 #if CFG_TEE_CORE_NB_CORE > 5 142 GET_STACK(stack_tmp[5]), 143 #endif 144 #if CFG_TEE_CORE_NB_CORE > 6 145 GET_STACK(stack_tmp[6]), 146 #endif 147 #if CFG_TEE_CORE_NB_CORE > 7 148 GET_STACK(stack_tmp[7]), 149 #endif 150 #if CFG_TEE_CORE_NB_CORE > 8 151 #error "Top of tmp stacks aren't defined for more than 8 CPUS" 152 #endif 153 }; 154 155 thread_smc_handler_t thread_std_smc_handler_ptr; 156 static thread_smc_handler_t thread_fast_smc_handler_ptr; 157 thread_fiq_handler_t thread_fiq_handler_ptr; 158 thread_svc_handler_t thread_svc_handler_ptr; 159 static thread_abort_handler_t thread_abort_handler_ptr; 160 thread_pm_handler_t thread_cpu_on_handler_ptr; 161 thread_pm_handler_t thread_cpu_off_handler_ptr; 162 thread_pm_handler_t thread_cpu_suspend_handler_ptr; 163 thread_pm_handler_t thread_cpu_resume_handler_ptr; 164 thread_pm_handler_t thread_system_off_handler_ptr; 165 thread_pm_handler_t thread_system_reset_handler_ptr; 166 167 168 static unsigned int thread_global_lock = SPINLOCK_UNLOCK; 169 170 static void init_canaries(void) 171 { 172 #ifdef CFG_WITH_STACK_CANARIES 173 size_t n; 174 #define INIT_CANARY(name) \ 175 for (n = 0; n < ARRAY_SIZE(name); n++) { \ 176 uint32_t *start_canary = &GET_START_CANARY(name, n); \ 177 uint32_t *end_canary = &GET_END_CANARY(name, n); \ 178 \ 179 *start_canary = START_CANARY_VALUE; \ 180 *end_canary = END_CANARY_VALUE; \ 181 DMSG("#Stack canaries for %s[%zu] with top at %p\n", \ 182 #name, n, (void *)(end_canary - 1)); \ 183 DMSG("watch *%p\n", (void *)end_canary); \ 184 } 185 186 INIT_CANARY(stack_tmp); 187 INIT_CANARY(stack_abt); 188 #if !defined(CFG_WITH_ARM_TRUSTED_FW) 189 INIT_CANARY(stack_sm); 190 #endif 191 #ifndef CFG_WITH_PAGER 192 INIT_CANARY(stack_thread); 193 #endif 194 #endif/*CFG_WITH_STACK_CANARIES*/ 195 } 196 197 void thread_check_canaries(void) 198 { 199 #ifdef CFG_WITH_STACK_CANARIES 200 size_t n; 201 202 for (n = 0; n < ARRAY_SIZE(stack_tmp); n++) { 203 assert(GET_START_CANARY(stack_tmp, n) == START_CANARY_VALUE); 204 assert(GET_END_CANARY(stack_tmp, n) == END_CANARY_VALUE); 205 } 206 207 for (n = 0; n < ARRAY_SIZE(stack_abt); n++) { 208 assert(GET_START_CANARY(stack_abt, n) == START_CANARY_VALUE); 209 assert(GET_END_CANARY(stack_abt, n) == END_CANARY_VALUE); 210 } 211 #if !defined(CFG_WITH_ARM_TRUSTED_FW) 212 for (n = 0; n < ARRAY_SIZE(stack_sm); n++) { 213 assert(GET_START_CANARY(stack_sm, n) == START_CANARY_VALUE); 214 assert(GET_END_CANARY(stack_sm, n) == END_CANARY_VALUE); 215 } 216 #endif 217 #ifndef CFG_WITH_PAGER 218 for (n = 0; n < ARRAY_SIZE(stack_thread); n++) { 219 assert(GET_START_CANARY(stack_thread, n) == START_CANARY_VALUE); 220 assert(GET_END_CANARY(stack_thread, n) == END_CANARY_VALUE); 221 } 222 #endif 223 #endif/*CFG_WITH_STACK_CANARIES*/ 224 } 225 226 static void lock_global(void) 227 { 228 cpu_spin_lock(&thread_global_lock); 229 } 230 231 static void unlock_global(void) 232 { 233 cpu_spin_unlock(&thread_global_lock); 234 } 235 236 #ifdef ARM32 237 uint32_t thread_get_exceptions(void) 238 { 239 uint32_t cpsr = read_cpsr(); 240 241 return (cpsr >> CPSR_F_SHIFT) & THREAD_EXCP_ALL; 242 } 243 244 void thread_set_exceptions(uint32_t exceptions) 245 { 246 uint32_t cpsr = read_cpsr(); 247 248 cpsr &= ~(THREAD_EXCP_ALL << CPSR_F_SHIFT); 249 cpsr |= ((exceptions & THREAD_EXCP_ALL) << CPSR_F_SHIFT); 250 write_cpsr(cpsr); 251 } 252 #endif /*ARM32*/ 253 254 #ifdef ARM64 255 uint32_t thread_get_exceptions(void) 256 { 257 uint32_t daif = read_daif(); 258 259 return (daif >> DAIF_F_SHIFT) & THREAD_EXCP_ALL; 260 } 261 262 void thread_set_exceptions(uint32_t exceptions) 263 { 264 uint32_t daif = read_daif(); 265 266 daif &= ~(THREAD_EXCP_ALL << DAIF_F_SHIFT); 267 daif |= ((exceptions & THREAD_EXCP_ALL) << DAIF_F_SHIFT); 268 write_daif(daif); 269 } 270 #endif /*ARM64*/ 271 272 uint32_t thread_mask_exceptions(uint32_t exceptions) 273 { 274 uint32_t state = thread_get_exceptions(); 275 276 thread_set_exceptions(state | (exceptions & THREAD_EXCP_ALL)); 277 return state; 278 } 279 280 void thread_unmask_exceptions(uint32_t state) 281 { 282 thread_set_exceptions(state & THREAD_EXCP_ALL); 283 } 284 285 286 struct thread_core_local *thread_get_core_local(void) 287 { 288 uint32_t cpu_id = get_core_pos(); 289 290 /* 291 * IRQs must be disabled before playing with core_local since 292 * we otherwise may be rescheduled to a different core in the 293 * middle of this function. 294 */ 295 assert(thread_get_exceptions() & THREAD_EXCP_IRQ); 296 297 assert(cpu_id < CFG_TEE_CORE_NB_CORE); 298 return &thread_core_local[cpu_id]; 299 } 300 301 static bool have_one_active_thread(void) 302 { 303 size_t n; 304 305 for (n = 0; n < CFG_NUM_THREADS; n++) { 306 if (threads[n].state == THREAD_STATE_ACTIVE) 307 return true; 308 } 309 310 return false; 311 } 312 313 static bool have_one_preempted_thread(void) 314 { 315 size_t n; 316 317 for (n = 0; n < CFG_NUM_THREADS; n++) { 318 if (threads[n].state == THREAD_STATE_SUSPENDED && 319 (threads[n].flags & THREAD_FLAGS_EXIT_ON_IRQ)) 320 return true; 321 } 322 323 return false; 324 } 325 326 static void thread_lazy_save_ns_vfp(void) 327 { 328 #ifdef CFG_WITH_VFP 329 thread_vfp_state.ns_saved = false; 330 #if defined(ARM64) && defined(CFG_WITH_ARM_TRUSTED_FW) 331 /* 332 * ARM TF saves and restores CPACR_EL1, so we must assume NS world 333 * uses VFP and always preserve the register file when secure world 334 * is about to use it 335 */ 336 thread_vfp_state.ns.force_save = true; 337 #endif 338 vfp_lazy_save_state_init(&thread_vfp_state.ns); 339 #endif /*CFG_WITH_VFP*/ 340 } 341 342 static void thread_lazy_restore_ns_vfp(void) 343 { 344 #ifdef CFG_WITH_VFP 345 assert(!thread_vfp_state.sec_lazy_saved && !thread_vfp_state.sec_saved); 346 vfp_lazy_restore_state(&thread_vfp_state.ns, thread_vfp_state.ns_saved); 347 thread_vfp_state.ns_saved = false; 348 #endif /*CFG_WITH_VFP*/ 349 } 350 351 #ifdef ARM32 352 static void init_regs(struct thread_ctx *thread, 353 struct thread_smc_args *args) 354 { 355 thread->regs.pc = (uint32_t)thread_std_smc_entry; 356 357 /* 358 * Stdcalls starts in SVC mode with masked IRQ, masked Asynchronous 359 * abort and unmasked FIQ. 360 */ 361 thread->regs.cpsr = CPSR_MODE_SVC | CPSR_I | CPSR_A; 362 /* Enable thumb mode if it's a thumb instruction */ 363 if (thread->regs.pc & 1) 364 thread->regs.cpsr |= CPSR_T; 365 /* Reinitialize stack pointer */ 366 thread->regs.svc_sp = thread->stack_va_end; 367 368 /* 369 * Copy arguments into context. This will make the 370 * arguments appear in r0-r7 when thread is started. 371 */ 372 thread->regs.r0 = args->a0; 373 thread->regs.r1 = args->a1; 374 thread->regs.r2 = args->a2; 375 thread->regs.r3 = args->a3; 376 thread->regs.r4 = args->a4; 377 thread->regs.r5 = args->a5; 378 thread->regs.r6 = args->a6; 379 thread->regs.r7 = args->a7; 380 } 381 #endif /*ARM32*/ 382 383 #ifdef ARM64 384 static void init_regs(struct thread_ctx *thread, 385 struct thread_smc_args *args) 386 { 387 thread->regs.pc = (uint64_t)thread_std_smc_entry; 388 389 /* 390 * Stdcalls starts in SVC mode with masked IRQ, masked Asynchronous 391 * abort and unmasked FIQ. 392 */ 393 thread->regs.cpsr = SPSR_64(SPSR_64_MODE_EL1, SPSR_64_MODE_SP_EL0, 394 DAIFBIT_IRQ | DAIFBIT_ABT); 395 /* Reinitialize stack pointer */ 396 thread->regs.sp = thread->stack_va_end; 397 398 /* 399 * Copy arguments into context. This will make the 400 * arguments appear in x0-x7 when thread is started. 401 */ 402 thread->regs.x[0] = args->a0; 403 thread->regs.x[1] = args->a1; 404 thread->regs.x[2] = args->a2; 405 thread->regs.x[3] = args->a3; 406 thread->regs.x[4] = args->a4; 407 thread->regs.x[5] = args->a5; 408 thread->regs.x[6] = args->a6; 409 thread->regs.x[7] = args->a7; 410 } 411 #endif /*ARM64*/ 412 413 static void thread_alloc_and_run(struct thread_smc_args *args) 414 { 415 size_t n; 416 struct thread_core_local *l = thread_get_core_local(); 417 bool found_thread = false; 418 419 assert(l->curr_thread == -1); 420 421 lock_global(); 422 423 if (!have_one_active_thread() && !have_one_preempted_thread()) { 424 for (n = 0; n < CFG_NUM_THREADS; n++) { 425 if (threads[n].state == THREAD_STATE_FREE) { 426 threads[n].state = THREAD_STATE_ACTIVE; 427 found_thread = true; 428 break; 429 } 430 } 431 } 432 433 unlock_global(); 434 435 if (!found_thread) { 436 args->a0 = TEESMC_RETURN_EBUSY; 437 return; 438 } 439 440 l->curr_thread = n; 441 442 threads[n].flags = 0; 443 init_regs(threads + n, args); 444 445 /* Save Hypervisor Client ID */ 446 threads[n].hyp_clnt_id = args->a7; 447 448 thread_lazy_save_ns_vfp(); 449 thread_resume(&threads[n].regs); 450 } 451 452 #ifdef ARM32 453 static void copy_a0_to_a3(struct thread_ctx_regs *regs, 454 struct thread_smc_args *args) 455 { 456 /* 457 * Update returned values from RPC, values will appear in 458 * r0-r3 when thread is resumed. 459 */ 460 regs->r0 = args->a0; 461 regs->r1 = args->a1; 462 regs->r2 = args->a2; 463 regs->r3 = args->a3; 464 } 465 #endif /*ARM32*/ 466 467 #ifdef ARM64 468 static void copy_a0_to_a3(struct thread_ctx_regs *regs, 469 struct thread_smc_args *args) 470 { 471 /* 472 * Update returned values from RPC, values will appear in 473 * x0-x3 when thread is resumed. 474 */ 475 regs->x[0] = args->a0; 476 regs->x[1] = args->a1; 477 regs->x[2] = args->a2; 478 regs->x[3] = args->a3; 479 } 480 #endif /*ARM64*/ 481 482 static void thread_resume_from_rpc(struct thread_smc_args *args) 483 { 484 size_t n = args->a3; /* thread id */ 485 struct thread_core_local *l = thread_get_core_local(); 486 uint32_t rv = 0; 487 488 assert(l->curr_thread == -1); 489 490 lock_global(); 491 492 if (have_one_active_thread()) { 493 rv = TEESMC_RETURN_EBUSY; 494 } else if (n < CFG_NUM_THREADS && 495 threads[n].state == THREAD_STATE_SUSPENDED && 496 args->a7 == threads[n].hyp_clnt_id) { 497 /* 498 * If there's one preempted thread it has to be the one 499 * we're resuming. 500 */ 501 if (have_one_preempted_thread()) { 502 if (threads[n].flags & THREAD_FLAGS_EXIT_ON_IRQ) { 503 threads[n].flags &= ~THREAD_FLAGS_EXIT_ON_IRQ; 504 threads[n].state = THREAD_STATE_ACTIVE; 505 } else { 506 rv = TEESMC_RETURN_EBUSY; 507 } 508 } else { 509 threads[n].state = THREAD_STATE_ACTIVE; 510 } 511 } else { 512 rv = TEESMC_RETURN_ERESUME; 513 } 514 515 unlock_global(); 516 517 if (rv) { 518 args->a0 = rv; 519 return; 520 } 521 522 l->curr_thread = n; 523 524 if (threads[n].have_user_map) 525 core_mmu_set_user_map(&threads[n].user_map); 526 527 /* 528 * Return from RPC to request service of an IRQ must not 529 * get parameters from non-secure world. 530 */ 531 if (threads[n].flags & THREAD_FLAGS_COPY_ARGS_ON_RETURN) { 532 copy_a0_to_a3(&threads[n].regs, args); 533 threads[n].flags &= ~THREAD_FLAGS_COPY_ARGS_ON_RETURN; 534 } 535 536 thread_lazy_save_ns_vfp(); 537 thread_resume(&threads[n].regs); 538 } 539 540 void thread_handle_fast_smc(struct thread_smc_args *args) 541 { 542 thread_check_canaries(); 543 thread_fast_smc_handler_ptr(args); 544 /* Fast handlers must not unmask any exceptions */ 545 assert(thread_get_exceptions() == THREAD_EXCP_ALL); 546 } 547 548 void thread_handle_std_smc(struct thread_smc_args *args) 549 { 550 thread_check_canaries(); 551 552 if (args->a0 == TEESMC32_CALL_RETURN_FROM_RPC) 553 thread_resume_from_rpc(args); 554 else 555 thread_alloc_and_run(args); 556 } 557 558 /* Helper routine for the assembly function thread_std_smc_entry() */ 559 void __thread_std_smc_entry(struct thread_smc_args *args) 560 { 561 struct thread_ctx *thr = threads + thread_get_id(); 562 563 if (!thr->rpc_arg) { 564 paddr_t parg; 565 void *arg; 566 567 parg = thread_rpc_alloc_arg( 568 TEESMC32_GET_ARG_SIZE(RPC_MAX_PARAMS)); 569 if (!parg || !TEE_ALIGNMENT_IS_OK(parg, struct teesmc32_arg) || 570 core_pa2va(parg, &arg)) { 571 thread_rpc_free_arg(parg); 572 args->a0 = TEESMC_RETURN_ENOMEM; 573 return; 574 } 575 576 thr->rpc_arg = arg; 577 thr->rpc_parg = parg; 578 } 579 580 thread_std_smc_handler_ptr(args); 581 } 582 583 void thread_handle_abort(uint32_t abort_type, struct thread_abort_regs *regs) 584 { 585 #ifdef CFG_WITH_VFP 586 if (vfp_is_enabled()) { 587 vfp_lazy_save_state_init(&thread_vfp_state.sec); 588 thread_vfp_state.sec_lazy_saved = true; 589 } 590 #endif 591 592 thread_abort_handler_ptr(abort_type, regs); 593 594 #ifdef CFG_WITH_VFP 595 assert(!vfp_is_enabled()); 596 if (thread_vfp_state.sec_lazy_saved) { 597 vfp_lazy_restore_state(&thread_vfp_state.sec, 598 thread_vfp_state.sec_saved); 599 thread_vfp_state.sec_saved = false; 600 thread_vfp_state.sec_lazy_saved = false; 601 } 602 #endif 603 } 604 605 void *thread_get_tmp_sp(void) 606 { 607 struct thread_core_local *l = thread_get_core_local(); 608 609 return (void *)l->tmp_stack_va_end; 610 } 611 612 #ifdef ARM64 613 vaddr_t thread_get_saved_thread_sp(void) 614 { 615 struct thread_core_local *l = thread_get_core_local(); 616 int ct = l->curr_thread; 617 618 assert(ct != -1); 619 return threads[ct].kern_sp; 620 } 621 #endif /*ARM64*/ 622 623 void thread_state_free(void) 624 { 625 struct thread_core_local *l = thread_get_core_local(); 626 int ct = l->curr_thread; 627 628 assert(ct != -1); 629 630 thread_lazy_restore_ns_vfp(); 631 632 lock_global(); 633 634 assert(threads[ct].state == THREAD_STATE_ACTIVE); 635 threads[ct].state = THREAD_STATE_FREE; 636 threads[ct].flags = 0; 637 l->curr_thread = -1; 638 639 unlock_global(); 640 } 641 642 int thread_state_suspend(uint32_t flags, uint32_t cpsr, vaddr_t pc) 643 { 644 struct thread_core_local *l = thread_get_core_local(); 645 int ct = l->curr_thread; 646 647 assert(ct != -1); 648 649 thread_check_canaries(); 650 651 thread_lazy_restore_ns_vfp(); 652 653 lock_global(); 654 655 assert(threads[ct].state == THREAD_STATE_ACTIVE); 656 threads[ct].flags |= flags; 657 threads[ct].regs.cpsr = cpsr; 658 threads[ct].regs.pc = pc; 659 threads[ct].state = THREAD_STATE_SUSPENDED; 660 661 threads[ct].have_user_map = core_mmu_user_mapping_is_active(); 662 if (threads[ct].have_user_map) { 663 core_mmu_get_user_map(&threads[ct].user_map); 664 core_mmu_set_user_map(NULL); 665 } 666 667 668 l->curr_thread = -1; 669 670 unlock_global(); 671 672 return ct; 673 } 674 675 #ifdef ARM32 676 static void set_tmp_stack(struct thread_core_local *l, vaddr_t sp) 677 { 678 l->tmp_stack_va_end = sp; 679 thread_set_irq_sp(sp); 680 thread_set_fiq_sp(sp); 681 } 682 683 static void set_abt_stack(struct thread_core_local *l __unused, vaddr_t sp) 684 { 685 thread_set_abt_sp(sp); 686 } 687 #endif /*ARM32*/ 688 689 #ifdef ARM64 690 static void set_tmp_stack(struct thread_core_local *l, vaddr_t sp) 691 { 692 /* 693 * We're already using the tmp stack when this function is called 694 * so there's no need to assign it to any stack pointer. However, 695 * we'll need to restore it at different times so store it here. 696 */ 697 l->tmp_stack_va_end = sp; 698 } 699 700 static void set_abt_stack(struct thread_core_local *l, vaddr_t sp) 701 { 702 l->abt_stack_va_end = sp; 703 } 704 #endif /*ARM64*/ 705 706 bool thread_init_stack(uint32_t thread_id, vaddr_t sp) 707 { 708 if (thread_id >= CFG_NUM_THREADS) 709 return false; 710 if (threads[thread_id].state != THREAD_STATE_FREE) 711 return false; 712 713 threads[thread_id].stack_va_end = sp; 714 return true; 715 } 716 717 uint32_t thread_get_id(void) 718 { 719 /* thread_get_core_local() requires IRQs to be disabled */ 720 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_IRQ); 721 struct thread_core_local *l; 722 int ct; 723 724 l = thread_get_core_local(); 725 ct = l->curr_thread; 726 assert((ct >= 0) && (ct < CFG_NUM_THREADS)); 727 728 thread_unmask_exceptions(exceptions); 729 return ct; 730 } 731 732 static void init_handlers(const struct thread_handlers *handlers) 733 { 734 thread_std_smc_handler_ptr = handlers->std_smc; 735 thread_fast_smc_handler_ptr = handlers->fast_smc; 736 thread_fiq_handler_ptr = handlers->fiq; 737 thread_svc_handler_ptr = handlers->svc; 738 thread_abort_handler_ptr = handlers->abort; 739 thread_cpu_on_handler_ptr = handlers->cpu_on; 740 thread_cpu_off_handler_ptr = handlers->cpu_off; 741 thread_cpu_suspend_handler_ptr = handlers->cpu_suspend; 742 thread_cpu_resume_handler_ptr = handlers->cpu_resume; 743 thread_system_off_handler_ptr = handlers->system_off; 744 thread_system_reset_handler_ptr = handlers->system_reset; 745 } 746 747 748 #ifdef CFG_WITH_PAGER 749 static void init_thread_stacks(void) 750 { 751 size_t n; 752 753 /* 754 * Allocate virtual memory for thread stacks. 755 */ 756 for (n = 0; n < CFG_NUM_THREADS; n++) { 757 tee_mm_entry_t *mm; 758 vaddr_t sp; 759 760 /* Find vmem for thread stack and its protection gap */ 761 mm = tee_mm_alloc(&tee_mm_vcore, 762 SMALL_PAGE_SIZE + STACK_THREAD_SIZE); 763 TEE_ASSERT(mm); 764 765 /* Claim eventual physical page */ 766 tee_pager_add_pages(tee_mm_get_smem(mm), tee_mm_get_size(mm), 767 true); 768 769 /* Realloc both protection vmem and stack vmem separately */ 770 sp = tee_mm_get_smem(mm); 771 tee_mm_free(mm); 772 mm = tee_mm_alloc2(&tee_mm_vcore, sp, SMALL_PAGE_SIZE); 773 TEE_ASSERT(mm); 774 mm = tee_mm_alloc2(&tee_mm_vcore, sp + SMALL_PAGE_SIZE, 775 STACK_THREAD_SIZE); 776 TEE_ASSERT(mm); 777 778 /* init effective stack */ 779 sp = tee_mm_get_smem(mm) + tee_mm_get_bytes(mm); 780 if (!thread_init_stack(n, sp)) 781 panic(); 782 783 /* Add the area to the pager */ 784 tee_pager_add_area(mm, TEE_PAGER_AREA_RW, NULL, NULL); 785 } 786 } 787 #else 788 static void init_thread_stacks(void) 789 { 790 size_t n; 791 792 /* Assign the thread stacks */ 793 for (n = 0; n < CFG_NUM_THREADS; n++) { 794 if (!thread_init_stack(n, GET_STACK(stack_thread[n]))) 795 panic(); 796 } 797 } 798 #endif /*CFG_WITH_PAGER*/ 799 800 void thread_init_primary(const struct thread_handlers *handlers) 801 { 802 /* 803 * The COMPILE_TIME_ASSERT only works in function context. These 804 * checks verifies that the offsets used in assembly code matches 805 * what's used in C code. 806 */ 807 #ifdef ARM32 808 COMPILE_TIME_ASSERT(offsetof(struct thread_svc_regs, r0) == 809 THREAD_SVC_REG_R0_OFFS); 810 COMPILE_TIME_ASSERT(offsetof(struct thread_svc_regs, r1) == 811 THREAD_SVC_REG_R1_OFFS); 812 COMPILE_TIME_ASSERT(offsetof(struct thread_svc_regs, r2) == 813 THREAD_SVC_REG_R2_OFFS); 814 COMPILE_TIME_ASSERT(offsetof(struct thread_svc_regs, r3) == 815 THREAD_SVC_REG_R3_OFFS); 816 COMPILE_TIME_ASSERT(offsetof(struct thread_svc_regs, r4) == 817 THREAD_SVC_REG_R4_OFFS); 818 COMPILE_TIME_ASSERT(offsetof(struct thread_svc_regs, r5) == 819 THREAD_SVC_REG_R5_OFFS); 820 COMPILE_TIME_ASSERT(offsetof(struct thread_svc_regs, r6) == 821 THREAD_SVC_REG_R6_OFFS); 822 COMPILE_TIME_ASSERT(offsetof(struct thread_svc_regs, r7) == 823 THREAD_SVC_REG_R7_OFFS); 824 COMPILE_TIME_ASSERT(offsetof(struct thread_svc_regs, lr) == 825 THREAD_SVC_REG_LR_OFFS); 826 COMPILE_TIME_ASSERT(offsetof(struct thread_svc_regs, spsr) == 827 THREAD_SVC_REG_SPSR_OFFS); 828 #endif /*ARM32*/ 829 #ifdef ARM64 830 /* struct thread_abort_regs */ 831 COMPILE_TIME_ASSERT(offsetof(struct thread_abort_regs, x22) == 832 THREAD_ABT_REG_X_OFFS(22)); 833 COMPILE_TIME_ASSERT(offsetof(struct thread_abort_regs, elr) == 834 THREAD_ABT_REG_ELR_OFFS); 835 COMPILE_TIME_ASSERT(offsetof(struct thread_abort_regs, spsr) == 836 THREAD_ABT_REG_SPSR_OFFS); 837 COMPILE_TIME_ASSERT(offsetof(struct thread_abort_regs, sp_el0) == 838 THREAD_ABT_REG_SP_EL0_OFFS); 839 COMPILE_TIME_ASSERT(sizeof(struct thread_abort_regs) == 840 THREAD_ABT_REGS_SIZE); 841 842 /* struct thread_ctx */ 843 COMPILE_TIME_ASSERT(offsetof(struct thread_ctx, kern_sp) == 844 THREAD_CTX_KERN_SP_OFFSET); 845 COMPILE_TIME_ASSERT(sizeof(struct thread_ctx) == THREAD_CTX_SIZE); 846 847 /* struct thread_ctx_regs */ 848 COMPILE_TIME_ASSERT(offsetof(struct thread_ctx_regs, sp) == 849 THREAD_CTX_REGS_SP_OFFSET); 850 COMPILE_TIME_ASSERT(offsetof(struct thread_ctx_regs, pc) == 851 THREAD_CTX_REGS_PC_OFFSET); 852 COMPILE_TIME_ASSERT(offsetof(struct thread_ctx_regs, cpsr) == 853 THREAD_CTX_REGS_SPSR_OFFSET); 854 COMPILE_TIME_ASSERT(offsetof(struct thread_ctx_regs, x[23]) == 855 THREAD_CTX_REGS_X_OFFSET(23)); 856 COMPILE_TIME_ASSERT(sizeof(struct thread_ctx_regs) == 857 THREAD_CTX_REGS_SIZE); 858 859 /* struct thread_user_mode_rec */ 860 COMPILE_TIME_ASSERT( 861 offsetof(struct thread_user_mode_rec, exit_status0_ptr) == 862 THREAD_USER_MODE_REC_EXIT_STATUS0_PTR_OFFSET); 863 COMPILE_TIME_ASSERT( 864 offsetof(struct thread_user_mode_rec, exit_status1_ptr) == 865 THREAD_USER_MODE_REC_EXIT_STATUS1_PTR_OFFSET); 866 COMPILE_TIME_ASSERT( 867 offsetof(struct thread_user_mode_rec, x[1]) == 868 THREAD_USER_MODE_REC_X_OFFSET(20)); 869 COMPILE_TIME_ASSERT(sizeof(struct thread_user_mode_rec) == 870 THREAD_USER_MODE_REC_SIZE); 871 872 /* struct thread_core_local */ 873 COMPILE_TIME_ASSERT( 874 offsetof(struct thread_core_local, tmp_stack_va_end) == 875 THREAD_CORE_LOCAL_TMP_STACK_VA_END_OFFSET); 876 COMPILE_TIME_ASSERT( 877 offsetof(struct thread_core_local, curr_thread) == 878 THREAD_CORE_LOCAL_CURR_THREAD_OFFSET); 879 COMPILE_TIME_ASSERT( 880 offsetof(struct thread_core_local, flags) == 881 THREAD_CORE_LOCAL_FLAGS_OFFSET); 882 COMPILE_TIME_ASSERT( 883 offsetof(struct thread_core_local, abt_stack_va_end) == 884 THREAD_CORE_LOCAL_ABT_STACK_VA_END_OFFSET); 885 COMPILE_TIME_ASSERT( 886 offsetof(struct thread_core_local, x[3]) == 887 THREAD_CORE_LOCAL_X_OFFSET(3)); 888 COMPILE_TIME_ASSERT(sizeof(struct thread_core_local) == 889 THREAD_CORE_LOCAL_SIZE); 890 891 #endif /*ARM64*/ 892 893 init_handlers(handlers); 894 895 /* Initialize canaries around the stacks */ 896 init_canaries(); 897 898 init_thread_stacks(); 899 } 900 901 static void init_sec_mon(size_t __unused pos) 902 { 903 #if !defined(CFG_WITH_ARM_TRUSTED_FW) 904 /* Initialize secure monitor */ 905 sm_init(GET_STACK(stack_sm[pos])); 906 sm_set_entry_vector(thread_vector_table); 907 #endif 908 } 909 910 void thread_init_per_cpu(void) 911 { 912 size_t pos = get_core_pos(); 913 struct thread_core_local *l = thread_get_core_local(); 914 915 init_sec_mon(pos); 916 917 l->curr_thread = -1; 918 set_tmp_stack(l, GET_STACK(stack_tmp[pos])); 919 set_abt_stack(l, GET_STACK(stack_abt[pos])); 920 921 thread_init_vbar(); 922 } 923 924 void thread_set_tsd(void *tsd) 925 { 926 /* thread_get_core_local() requires IRQs to be disabled */ 927 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_IRQ); 928 struct thread_core_local *l; 929 int ct; 930 931 l = thread_get_core_local(); 932 ct = l->curr_thread; 933 934 assert(ct != -1); 935 assert(threads[ct].state == THREAD_STATE_ACTIVE); 936 threads[ct].tsd = tsd; 937 938 thread_unmask_exceptions(exceptions); 939 } 940 941 void *thread_get_tsd(void) 942 { 943 /* thread_get_core_local() requires IRQs to be disabled */ 944 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_IRQ); 945 struct thread_core_local *l; 946 int ct; 947 void *tsd; 948 949 l = thread_get_core_local(); 950 ct = l->curr_thread; 951 952 if (ct == -1 || threads[ct].state != THREAD_STATE_ACTIVE) 953 tsd = NULL; 954 else 955 tsd = threads[ct].tsd; 956 957 thread_unmask_exceptions(exceptions); 958 return tsd; 959 } 960 961 struct thread_ctx_regs *thread_get_ctx_regs(void) 962 { 963 struct thread_core_local *l = thread_get_core_local(); 964 965 assert(l->curr_thread != -1); 966 return &threads[l->curr_thread].regs; 967 } 968 969 void thread_set_irq(bool enable) 970 { 971 /* thread_get_core_local() requires IRQs to be disabled */ 972 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_IRQ); 973 struct thread_core_local *l; 974 975 l = thread_get_core_local(); 976 977 assert(l->curr_thread != -1); 978 979 if (enable) { 980 threads[l->curr_thread].flags |= THREAD_FLAGS_IRQ_ENABLE; 981 thread_set_exceptions(exceptions & ~THREAD_EXCP_IRQ); 982 } else { 983 /* 984 * No need to disable IRQ here since it's already disabled 985 * above. 986 */ 987 threads[l->curr_thread].flags &= ~THREAD_FLAGS_IRQ_ENABLE; 988 } 989 } 990 991 void thread_restore_irq(void) 992 { 993 /* thread_get_core_local() requires IRQs to be disabled */ 994 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_IRQ); 995 struct thread_core_local *l; 996 997 l = thread_get_core_local(); 998 999 assert(l->curr_thread != -1); 1000 1001 if (threads[l->curr_thread].flags & THREAD_FLAGS_IRQ_ENABLE) 1002 thread_set_exceptions(exceptions & ~THREAD_EXCP_IRQ); 1003 } 1004 1005 #ifdef CFG_WITH_VFP 1006 uint32_t thread_kernel_enable_vfp(void) 1007 { 1008 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_IRQ); 1009 1010 assert(!vfp_is_enabled()); 1011 1012 if (!thread_vfp_state.ns_saved) { 1013 vfp_lazy_save_state_final(&thread_vfp_state.ns); 1014 thread_vfp_state.ns_saved = true; 1015 } else if (thread_vfp_state.sec_lazy_saved && 1016 !thread_vfp_state.sec_saved) { 1017 vfp_lazy_save_state_final(&thread_vfp_state.sec); 1018 thread_vfp_state.sec_saved = true; 1019 } 1020 1021 vfp_enable(); 1022 return exceptions; 1023 } 1024 1025 void thread_kernel_disable_vfp(uint32_t state) 1026 { 1027 uint32_t exceptions; 1028 1029 assert(vfp_is_enabled()); 1030 1031 vfp_disable(); 1032 exceptions = thread_get_exceptions(); 1033 assert(exceptions & THREAD_EXCP_IRQ); 1034 exceptions &= ~THREAD_EXCP_IRQ; 1035 exceptions |= state & THREAD_EXCP_IRQ; 1036 thread_set_exceptions(exceptions); 1037 } 1038 #endif /*CFG_WITH_VFP*/ 1039 1040 1041 paddr_t thread_rpc_alloc_arg(size_t size) 1042 { 1043 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { 1044 TEESMC_RETURN_RPC_ALLOC_ARG, size}; 1045 1046 thread_rpc(rpc_args); 1047 return rpc_args[1]; 1048 } 1049 1050 paddr_t thread_rpc_alloc_payload(size_t size) 1051 { 1052 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { 1053 TEESMC_RETURN_RPC_ALLOC_PAYLOAD, size}; 1054 1055 thread_rpc(rpc_args); 1056 return rpc_args[1]; 1057 } 1058 1059 void thread_rpc_free_arg(paddr_t arg) 1060 { 1061 if (arg) { 1062 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { 1063 TEESMC_RETURN_RPC_FREE_ARG, arg}; 1064 1065 thread_rpc(rpc_args); 1066 } 1067 } 1068 void thread_rpc_free_payload(paddr_t payload) 1069 { 1070 if (payload) { 1071 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { 1072 TEESMC_RETURN_RPC_FREE_PAYLOAD, payload}; 1073 1074 thread_rpc(rpc_args); 1075 } 1076 } 1077 1078 uint32_t thread_rpc_cmd(uint32_t cmd, size_t num_params, 1079 struct teesmc32_param *params) 1080 { 1081 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { 0 }; 1082 struct thread_ctx *thr = threads + thread_get_id(); 1083 struct teesmc32_arg *arg = thr->rpc_arg; 1084 paddr_t parg = thr->rpc_parg; 1085 const size_t params_size = sizeof(struct teesmc32_param) * num_params; 1086 size_t n; 1087 1088 TEE_ASSERT(arg && parg && num_params <= RPC_MAX_PARAMS); 1089 1090 memset(arg, 0, TEESMC32_GET_ARG_SIZE(RPC_MAX_PARAMS)); 1091 arg->cmd = cmd; 1092 arg->ret = TEE_ERROR_GENERIC; /* in case value isn't updated */ 1093 arg->num_params = num_params; 1094 memcpy(TEESMC32_GET_PARAMS(arg), params, params_size); 1095 1096 rpc_args[0] = TEESMC_RETURN_RPC_CMD; 1097 rpc_args[1] = parg; 1098 thread_rpc(rpc_args); 1099 1100 for (n = 0; n < num_params; n++) { 1101 switch (params[n].attr & TEESMC_ATTR_TYPE_MASK) { 1102 case TEESMC_ATTR_TYPE_VALUE_OUTPUT: 1103 case TEESMC_ATTR_TYPE_VALUE_INOUT: 1104 case TEESMC_ATTR_TYPE_MEMREF_OUTPUT: 1105 case TEESMC_ATTR_TYPE_MEMREF_INOUT: 1106 memcpy(params + n, TEESMC32_GET_PARAMS(arg) + n, 1107 sizeof(struct teesmc32_param)); 1108 break; 1109 default: 1110 break; 1111 } 1112 } 1113 1114 return arg->ret; 1115 } 1116 1117 1118 void thread_optee_rpc_alloc_payload(size_t size, paddr_t *payload, 1119 paddr_t *cookie) 1120 { 1121 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { 1122 TEESMC_RETURN_OPTEE_RPC_ALLOC_PAYLOAD, size}; 1123 1124 thread_rpc(rpc_args); 1125 if (payload) 1126 *payload = rpc_args[1]; 1127 if (cookie) 1128 *cookie = rpc_args[2]; 1129 } 1130 1131 void thread_optee_rpc_free_payload(paddr_t cookie) 1132 { 1133 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] ={ 1134 TEESMC_RETURN_OPTEE_RPC_FREE_PAYLOAD, cookie}; 1135 1136 thread_rpc(rpc_args); 1137 } 1138