xref: /optee_os/core/arch/arm/kernel/thread.c (revision 8c1413f06ed66dfaeb06d0b6870ba427b331a48f)
1 /*
2  * Copyright (c) 2014, STMicroelectronics International N.V.
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions are met:
7  *
8  * 1. Redistributions of source code must retain the above copyright notice,
9  * this list of conditions and the following disclaimer.
10  *
11  * 2. Redistributions in binary form must reproduce the above copyright notice,
12  * this list of conditions and the following disclaimer in the documentation
13  * and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
16  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
19  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
20  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
21  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
22  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
24  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25  * POSSIBILITY OF SUCH DAMAGE.
26  */
27 #include <platform_config.h>
28 #include <kernel/panic.h>
29 #include <kernel/thread.h>
30 #include <kernel/thread_defs.h>
31 #include "thread_private.h"
32 #include <sm/sm_defs.h>
33 #include <sm/sm.h>
34 #include <sm/teesmc.h>
35 #include <sm/teesmc_optee.h>
36 #include <arm.h>
37 #include <kernel/tz_proc_def.h>
38 #include <kernel/tz_proc.h>
39 #include <kernel/misc.h>
40 #include <mm/tee_mmu.h>
41 #include <mm/tee_mmu_defs.h>
42 #include <mm/tee_mm.h>
43 #include <mm/tee_pager.h>
44 #include <kernel/tee_ta_manager.h>
45 #include <util.h>
46 #include <trace.h>
47 #include <assert.h>
48 
49 #ifdef ARM32
50 #define STACK_TMP_SIZE		1024
51 #define STACK_THREAD_SIZE	8192
52 
53 #if TRACE_LEVEL > 0
54 #define STACK_ABT_SIZE		2048
55 #else
56 #define STACK_ABT_SIZE		1024
57 #endif
58 
59 #endif /*ARM32*/
60 
61 #ifdef ARM64
62 #define STACK_TMP_SIZE		2048
63 #define STACK_THREAD_SIZE	8192
64 
65 #if TRACE_LEVEL > 0
66 #define STACK_ABT_SIZE		3072
67 #else
68 #define STACK_ABT_SIZE		1024
69 #endif
70 #endif /*ARM64*/
71 
72 #define RPC_MAX_PARAMS		2
73 
74 struct thread_ctx threads[CFG_NUM_THREADS];
75 
76 static struct thread_core_local thread_core_local[CFG_TEE_CORE_NB_CORE];
77 
78 #ifdef CFG_WITH_STACK_CANARIES
79 #ifdef ARM32
80 #define STACK_CANARY_SIZE	(4 * sizeof(uint32_t))
81 #endif
82 #ifdef ARM64
83 #define STACK_CANARY_SIZE	(8 * sizeof(uint32_t))
84 #endif
85 #define START_CANARY_VALUE	0xdededede
86 #define END_CANARY_VALUE	0xabababab
87 #define GET_START_CANARY(name, stack_num) name[stack_num][0]
88 #define GET_END_CANARY(name, stack_num) \
89 	name[stack_num][sizeof(name[stack_num]) / sizeof(uint32_t) - 1]
90 #else
91 #define STACK_CANARY_SIZE	0
92 #endif
93 
94 #define DECLARE_STACK(name, num_stacks, stack_size) \
95 	static uint32_t name[num_stacks][ \
96 		ROUNDUP(stack_size + STACK_CANARY_SIZE, STACK_ALIGNMENT) / \
97 		sizeof(uint32_t)] \
98 		__attribute__((section(".nozi.stack"), \
99 			       aligned(STACK_ALIGNMENT)))
100 
101 #define GET_STACK(stack) \
102 	((vaddr_t)(stack) + sizeof(stack) - STACK_CANARY_SIZE / 2)
103 
104 DECLARE_STACK(stack_tmp,	CFG_TEE_CORE_NB_CORE,	STACK_TMP_SIZE);
105 DECLARE_STACK(stack_abt,	CFG_TEE_CORE_NB_CORE,	STACK_ABT_SIZE);
106 #if !defined(CFG_WITH_ARM_TRUSTED_FW)
107 DECLARE_STACK(stack_sm,		CFG_TEE_CORE_NB_CORE,	SM_STACK_SIZE);
108 #endif
109 #ifndef CFG_WITH_PAGER
110 DECLARE_STACK(stack_thread,	CFG_NUM_THREADS,	STACK_THREAD_SIZE);
111 #endif
112 
113 const vaddr_t stack_tmp_top[CFG_TEE_CORE_NB_CORE] = {
114 	GET_STACK(stack_tmp[0]),
115 #if CFG_TEE_CORE_NB_CORE > 1
116 	GET_STACK(stack_tmp[1]),
117 #endif
118 #if CFG_TEE_CORE_NB_CORE > 2
119 	GET_STACK(stack_tmp[2]),
120 #endif
121 #if CFG_TEE_CORE_NB_CORE > 3
122 	GET_STACK(stack_tmp[3]),
123 #endif
124 #if CFG_TEE_CORE_NB_CORE > 4
125 	GET_STACK(stack_tmp[4]),
126 #endif
127 #if CFG_TEE_CORE_NB_CORE > 5
128 	GET_STACK(stack_tmp[5]),
129 #endif
130 #if CFG_TEE_CORE_NB_CORE > 6
131 	GET_STACK(stack_tmp[6]),
132 #endif
133 #if CFG_TEE_CORE_NB_CORE > 7
134 	GET_STACK(stack_tmp[7]),
135 #endif
136 #if CFG_TEE_CORE_NB_CORE > 8
137 #error "Top of tmp stacks aren't defined for more than 8 CPUS"
138 #endif
139 };
140 
141 thread_smc_handler_t thread_std_smc_handler_ptr;
142 static thread_smc_handler_t thread_fast_smc_handler_ptr;
143 thread_fiq_handler_t thread_fiq_handler_ptr;
144 thread_pm_handler_t thread_cpu_on_handler_ptr;
145 thread_pm_handler_t thread_cpu_off_handler_ptr;
146 thread_pm_handler_t thread_cpu_suspend_handler_ptr;
147 thread_pm_handler_t thread_cpu_resume_handler_ptr;
148 thread_pm_handler_t thread_system_off_handler_ptr;
149 thread_pm_handler_t thread_system_reset_handler_ptr;
150 
151 
152 static unsigned int thread_global_lock = SPINLOCK_UNLOCK;
153 
154 static void init_canaries(void)
155 {
156 #ifdef CFG_WITH_STACK_CANARIES
157 	size_t n;
158 #define INIT_CANARY(name)						\
159 	for (n = 0; n < ARRAY_SIZE(name); n++) {			\
160 		uint32_t *start_canary = &GET_START_CANARY(name, n);	\
161 		uint32_t *end_canary = &GET_END_CANARY(name, n);	\
162 									\
163 		*start_canary = START_CANARY_VALUE;			\
164 		*end_canary = END_CANARY_VALUE;				\
165 		DMSG("#Stack canaries for %s[%zu] with top at %p\n",	\
166 			#name, n, (void *)(end_canary - 1));		\
167 		DMSG("watch *%p\n", (void *)end_canary);		\
168 	}
169 
170 	INIT_CANARY(stack_tmp);
171 	INIT_CANARY(stack_abt);
172 #if !defined(CFG_WITH_ARM_TRUSTED_FW)
173 	INIT_CANARY(stack_sm);
174 #endif
175 #ifndef CFG_WITH_PAGER
176 	INIT_CANARY(stack_thread);
177 #endif
178 #endif/*CFG_WITH_STACK_CANARIES*/
179 }
180 
181 void thread_check_canaries(void)
182 {
183 #ifdef CFG_WITH_STACK_CANARIES
184 	size_t n;
185 
186 	for (n = 0; n < ARRAY_SIZE(stack_tmp); n++) {
187 		assert(GET_START_CANARY(stack_tmp, n) == START_CANARY_VALUE);
188 		assert(GET_END_CANARY(stack_tmp, n) == END_CANARY_VALUE);
189 	}
190 
191 	for (n = 0; n < ARRAY_SIZE(stack_abt); n++) {
192 		assert(GET_START_CANARY(stack_abt, n) == START_CANARY_VALUE);
193 		assert(GET_END_CANARY(stack_abt, n) == END_CANARY_VALUE);
194 	}
195 #if !defined(CFG_WITH_ARM_TRUSTED_FW)
196 	for (n = 0; n < ARRAY_SIZE(stack_sm); n++) {
197 		assert(GET_START_CANARY(stack_sm, n) == START_CANARY_VALUE);
198 		assert(GET_END_CANARY(stack_sm, n) == END_CANARY_VALUE);
199 	}
200 #endif
201 #ifndef CFG_WITH_PAGER
202 	for (n = 0; n < ARRAY_SIZE(stack_thread); n++) {
203 		assert(GET_START_CANARY(stack_thread, n) == START_CANARY_VALUE);
204 		assert(GET_END_CANARY(stack_thread, n) == END_CANARY_VALUE);
205 	}
206 #endif
207 #endif/*CFG_WITH_STACK_CANARIES*/
208 }
209 
210 static void lock_global(void)
211 {
212 	cpu_spin_lock(&thread_global_lock);
213 }
214 
215 static void unlock_global(void)
216 {
217 	cpu_spin_unlock(&thread_global_lock);
218 }
219 
220 #ifdef ARM32
221 uint32_t thread_get_exceptions(void)
222 {
223 	uint32_t cpsr = read_cpsr();
224 
225 	return (cpsr >> CPSR_F_SHIFT) & THREAD_EXCP_ALL;
226 }
227 
228 void thread_set_exceptions(uint32_t exceptions)
229 {
230 	uint32_t cpsr = read_cpsr();
231 
232 	cpsr &= ~(THREAD_EXCP_ALL << CPSR_F_SHIFT);
233 	cpsr |= ((exceptions & THREAD_EXCP_ALL) << CPSR_F_SHIFT);
234 	write_cpsr(cpsr);
235 }
236 #endif /*ARM32*/
237 
238 #ifdef ARM64
239 uint32_t thread_get_exceptions(void)
240 {
241 	uint32_t daif = read_daif();
242 
243 	return (daif >> DAIF_F_SHIFT) & THREAD_EXCP_ALL;
244 }
245 
246 void thread_set_exceptions(uint32_t exceptions)
247 {
248 	uint32_t daif = read_daif();
249 
250 	daif &= ~(THREAD_EXCP_ALL << DAIF_F_SHIFT);
251 	daif |= ((exceptions & THREAD_EXCP_ALL) << DAIF_F_SHIFT);
252 	write_daif(daif);
253 }
254 #endif /*ARM64*/
255 
256 uint32_t thread_mask_exceptions(uint32_t exceptions)
257 {
258 	uint32_t state = thread_get_exceptions();
259 
260 	thread_set_exceptions(state | (exceptions & THREAD_EXCP_ALL));
261 	return state;
262 }
263 
264 void thread_unmask_exceptions(uint32_t state)
265 {
266 	thread_set_exceptions(state & THREAD_EXCP_ALL);
267 }
268 
269 
270 struct thread_core_local *thread_get_core_local(void)
271 {
272 	uint32_t cpu_id = get_core_pos();
273 
274 	/*
275 	 * IRQs must be disabled before playing with core_local since
276 	 * we otherwise may be rescheduled to a different core in the
277 	 * middle of this function.
278 	 */
279 	assert(thread_get_exceptions() & THREAD_EXCP_IRQ);
280 
281 	assert(cpu_id < CFG_TEE_CORE_NB_CORE);
282 	return &thread_core_local[cpu_id];
283 }
284 
285 static void thread_lazy_save_ns_vfp(void)
286 {
287 #ifdef CFG_WITH_VFP
288 	struct thread_ctx *thr = threads + thread_get_id();
289 
290 	thr->vfp_state.ns_saved = false;
291 #if defined(ARM64) && defined(CFG_WITH_ARM_TRUSTED_FW)
292 	/*
293 	 * ARM TF saves and restores CPACR_EL1, so we must assume NS world
294 	 * uses VFP and always preserve the register file when secure world
295 	 * is about to use it
296 	 */
297 	thr->vfp_state.ns.force_save = true;
298 #endif
299 	vfp_lazy_save_state_init(&thr->vfp_state.ns);
300 #endif /*CFG_WITH_VFP*/
301 }
302 
303 static void thread_lazy_restore_ns_vfp(void)
304 {
305 #ifdef CFG_WITH_VFP
306 	struct thread_ctx *thr = threads + thread_get_id();
307 	struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp;
308 
309 	assert(!thr->vfp_state.sec_lazy_saved && !thr->vfp_state.sec_saved);
310 
311 	if (tuv && tuv->lazy_saved && !tuv->saved) {
312 		vfp_lazy_save_state_final(&tuv->vfp);
313 		tuv->saved = true;
314 	}
315 
316 	vfp_lazy_restore_state(&thr->vfp_state.ns, thr->vfp_state.ns_saved);
317 	thr->vfp_state.ns_saved = false;
318 #endif /*CFG_WITH_VFP*/
319 }
320 
321 #ifdef ARM32
322 static void init_regs(struct thread_ctx *thread,
323 		struct thread_smc_args *args)
324 {
325 	thread->regs.pc = (uint32_t)thread_std_smc_entry;
326 
327 	/*
328 	 * Stdcalls starts in SVC mode with masked IRQ, masked Asynchronous
329 	 * abort and unmasked FIQ.
330 	  */
331 	thread->regs.cpsr = read_cpsr() & ARM32_CPSR_E;
332 	thread->regs.cpsr |= CPSR_MODE_SVC | CPSR_I | CPSR_A;
333 	/* Enable thumb mode if it's a thumb instruction */
334 	if (thread->regs.pc & 1)
335 		thread->regs.cpsr |= CPSR_T;
336 	/* Reinitialize stack pointer */
337 	thread->regs.svc_sp = thread->stack_va_end;
338 
339 	/*
340 	 * Copy arguments into context. This will make the
341 	 * arguments appear in r0-r7 when thread is started.
342 	 */
343 	thread->regs.r0 = args->a0;
344 	thread->regs.r1 = args->a1;
345 	thread->regs.r2 = args->a2;
346 	thread->regs.r3 = args->a3;
347 	thread->regs.r4 = args->a4;
348 	thread->regs.r5 = args->a5;
349 	thread->regs.r6 = args->a6;
350 	thread->regs.r7 = args->a7;
351 }
352 #endif /*ARM32*/
353 
354 #ifdef ARM64
355 static void init_regs(struct thread_ctx *thread,
356 		struct thread_smc_args *args)
357 {
358 	thread->regs.pc = (uint64_t)thread_std_smc_entry;
359 
360 	/*
361 	 * Stdcalls starts in SVC mode with masked IRQ, masked Asynchronous
362 	 * abort and unmasked FIQ.
363 	  */
364 	thread->regs.cpsr = SPSR_64(SPSR_64_MODE_EL1, SPSR_64_MODE_SP_EL0,
365 				    DAIFBIT_IRQ | DAIFBIT_ABT);
366 	/* Reinitialize stack pointer */
367 	thread->regs.sp = thread->stack_va_end;
368 
369 	/*
370 	 * Copy arguments into context. This will make the
371 	 * arguments appear in x0-x7 when thread is started.
372 	 */
373 	thread->regs.x[0] = args->a0;
374 	thread->regs.x[1] = args->a1;
375 	thread->regs.x[2] = args->a2;
376 	thread->regs.x[3] = args->a3;
377 	thread->regs.x[4] = args->a4;
378 	thread->regs.x[5] = args->a5;
379 	thread->regs.x[6] = args->a6;
380 	thread->regs.x[7] = args->a7;
381 }
382 #endif /*ARM64*/
383 
384 void thread_init_boot_thread(void)
385 {
386 	struct thread_core_local *l = thread_get_core_local();
387 	size_t n;
388 
389 	for (n = 0; n < CFG_NUM_THREADS; n++)
390 		TAILQ_INIT(&threads[n].mutexes);
391 
392 	for (n = 0; n < CFG_TEE_CORE_NB_CORE; n++)
393 		thread_core_local[n].curr_thread = -1;
394 
395 	l->curr_thread = 0;
396 	threads[0].state = THREAD_STATE_ACTIVE;
397 }
398 
399 void thread_clr_boot_thread(void)
400 {
401 	struct thread_core_local *l = thread_get_core_local();
402 
403 	assert(l->curr_thread >= 0 && l->curr_thread < CFG_NUM_THREADS);
404 	assert(threads[l->curr_thread].state == THREAD_STATE_ACTIVE);
405 	assert(TAILQ_EMPTY(&threads[l->curr_thread].mutexes));
406 	threads[l->curr_thread].state = THREAD_STATE_FREE;
407 	l->curr_thread = -1;
408 }
409 
410 static void thread_alloc_and_run(struct thread_smc_args *args)
411 {
412 	size_t n;
413 	struct thread_core_local *l = thread_get_core_local();
414 	bool found_thread = false;
415 
416 	assert(l->curr_thread == -1);
417 
418 	lock_global();
419 
420 	for (n = 0; n < CFG_NUM_THREADS; n++) {
421 		if (threads[n].state == THREAD_STATE_FREE) {
422 			threads[n].state = THREAD_STATE_ACTIVE;
423 			found_thread = true;
424 			break;
425 		}
426 	}
427 
428 	unlock_global();
429 
430 	if (!found_thread) {
431 		args->a0 = TEESMC_RETURN_ETHREAD_LIMIT;
432 		return;
433 	}
434 
435 	l->curr_thread = n;
436 
437 	threads[n].flags = 0;
438 	init_regs(threads + n, args);
439 
440 	/* Save Hypervisor Client ID */
441 	threads[n].hyp_clnt_id = args->a7;
442 
443 	thread_lazy_save_ns_vfp();
444 	thread_resume(&threads[n].regs);
445 }
446 
447 #ifdef ARM32
448 static void copy_a0_to_a3(struct thread_ctx_regs *regs,
449 		struct thread_smc_args *args)
450 {
451 	/*
452 	 * Update returned values from RPC, values will appear in
453 	 * r0-r3 when thread is resumed.
454 	 */
455 	regs->r0 = args->a0;
456 	regs->r1 = args->a1;
457 	regs->r2 = args->a2;
458 	regs->r3 = args->a3;
459 }
460 #endif /*ARM32*/
461 
462 #ifdef ARM64
463 static void copy_a0_to_a3(struct thread_ctx_regs *regs,
464 		struct thread_smc_args *args)
465 {
466 	/*
467 	 * Update returned values from RPC, values will appear in
468 	 * x0-x3 when thread is resumed.
469 	 */
470 	regs->x[0] = args->a0;
471 	regs->x[1] = args->a1;
472 	regs->x[2] = args->a2;
473 	regs->x[3] = args->a3;
474 }
475 #endif /*ARM64*/
476 
477 static void thread_resume_from_rpc(struct thread_smc_args *args)
478 {
479 	size_t n = args->a3; /* thread id */
480 	struct thread_core_local *l = thread_get_core_local();
481 	uint32_t rv = 0;
482 
483 	assert(l->curr_thread == -1);
484 
485 	lock_global();
486 
487 	if (n < CFG_NUM_THREADS &&
488 	    threads[n].state == THREAD_STATE_SUSPENDED &&
489 	    args->a7 == threads[n].hyp_clnt_id)
490 		threads[n].state = THREAD_STATE_ACTIVE;
491 	else
492 		rv = TEESMC_RETURN_ERESUME;
493 
494 	unlock_global();
495 
496 	if (rv) {
497 		args->a0 = rv;
498 		return;
499 	}
500 
501 	l->curr_thread = n;
502 
503 	if (threads[n].have_user_map)
504 		core_mmu_set_user_map(&threads[n].user_map);
505 
506 	/*
507 	 * Return from RPC to request service of an IRQ must not
508 	 * get parameters from non-secure world.
509 	 */
510 	if (threads[n].flags & THREAD_FLAGS_COPY_ARGS_ON_RETURN) {
511 		copy_a0_to_a3(&threads[n].regs, args);
512 		threads[n].flags &= ~THREAD_FLAGS_COPY_ARGS_ON_RETURN;
513 	}
514 
515 	thread_lazy_save_ns_vfp();
516 	thread_resume(&threads[n].regs);
517 }
518 
519 void thread_handle_fast_smc(struct thread_smc_args *args)
520 {
521 	thread_check_canaries();
522 	thread_fast_smc_handler_ptr(args);
523 	/* Fast handlers must not unmask any exceptions */
524 	assert(thread_get_exceptions() == THREAD_EXCP_ALL);
525 }
526 
527 void thread_handle_std_smc(struct thread_smc_args *args)
528 {
529 	thread_check_canaries();
530 
531 	if (args->a0 == TEESMC32_CALL_RETURN_FROM_RPC)
532 		thread_resume_from_rpc(args);
533 	else
534 		thread_alloc_and_run(args);
535 }
536 
537 /* Helper routine for the assembly function thread_std_smc_entry() */
538 void __thread_std_smc_entry(struct thread_smc_args *args)
539 {
540 	struct thread_ctx *thr = threads + thread_get_id();
541 
542 	if (!thr->rpc_arg) {
543 		paddr_t parg;
544 		void *arg;
545 
546 		parg = thread_rpc_alloc_arg(
547 				TEESMC32_GET_ARG_SIZE(RPC_MAX_PARAMS));
548 		if (!parg || !ALIGNMENT_IS_OK(parg, struct teesmc32_arg) ||
549 		     core_pa2va(parg, &arg)) {
550 			thread_rpc_free_arg(parg);
551 			args->a0 = TEESMC_RETURN_ENOMEM;
552 			return;
553 		}
554 
555 		thr->rpc_arg = arg;
556 		thr->rpc_parg = parg;
557 	}
558 
559 	thread_std_smc_handler_ptr(args);
560 }
561 
562 void *thread_get_tmp_sp(void)
563 {
564 	struct thread_core_local *l = thread_get_core_local();
565 
566 	return (void *)l->tmp_stack_va_end;
567 }
568 
569 #ifdef ARM64
570 vaddr_t thread_get_saved_thread_sp(void)
571 {
572 	struct thread_core_local *l = thread_get_core_local();
573 	int ct = l->curr_thread;
574 
575 	assert(ct != -1);
576 	return threads[ct].kern_sp;
577 }
578 #endif /*ARM64*/
579 
580 bool thread_addr_is_in_stack(vaddr_t va)
581 {
582 	struct thread_ctx *thr = threads + thread_get_id();
583 
584 	return va < thr->stack_va_end &&
585 	       va >= (thr->stack_va_end - STACK_THREAD_SIZE);
586 }
587 
588 void thread_state_free(void)
589 {
590 	struct thread_core_local *l = thread_get_core_local();
591 	int ct = l->curr_thread;
592 
593 	assert(ct != -1);
594 	assert(TAILQ_EMPTY(&threads[ct].mutexes));
595 
596 	thread_lazy_restore_ns_vfp();
597 
598 	lock_global();
599 
600 	assert(threads[ct].state == THREAD_STATE_ACTIVE);
601 	threads[ct].state = THREAD_STATE_FREE;
602 	threads[ct].flags = 0;
603 	l->curr_thread = -1;
604 
605 	unlock_global();
606 }
607 
608 #ifdef ARM32
609 static bool is_from_user(uint32_t cpsr)
610 {
611 	return (cpsr & ARM32_CPSR_MODE_MASK) == ARM32_CPSR_MODE_USR;
612 }
613 #endif
614 
615 #ifdef ARM64
616 static bool is_from_user(uint32_t cpsr)
617 {
618 	if (cpsr & (SPSR_MODE_RW_32 << SPSR_MODE_RW_SHIFT))
619 		return true;
620 	if (((cpsr >> SPSR_64_MODE_EL_SHIFT) & SPSR_64_MODE_EL_MASK) ==
621 	     SPSR_64_MODE_EL0)
622 		return true;
623 	return false;
624 }
625 #endif
626 
627 int thread_state_suspend(uint32_t flags, uint32_t cpsr, vaddr_t pc)
628 {
629 	struct thread_core_local *l = thread_get_core_local();
630 	int ct = l->curr_thread;
631 
632 	assert(ct != -1);
633 
634 	thread_check_canaries();
635 
636 	if (is_from_user(cpsr))
637 		thread_user_save_vfp();
638 	thread_lazy_restore_ns_vfp();
639 
640 	lock_global();
641 
642 	assert(threads[ct].state == THREAD_STATE_ACTIVE);
643 	threads[ct].flags |= flags;
644 	threads[ct].regs.cpsr = cpsr;
645 	threads[ct].regs.pc = pc;
646 	threads[ct].state = THREAD_STATE_SUSPENDED;
647 
648 	threads[ct].have_user_map = core_mmu_user_mapping_is_active();
649 	if (threads[ct].have_user_map) {
650 		core_mmu_get_user_map(&threads[ct].user_map);
651 		core_mmu_set_user_map(NULL);
652 	}
653 
654 
655 	l->curr_thread = -1;
656 
657 	unlock_global();
658 
659 	return ct;
660 }
661 
662 #ifdef ARM32
663 static void set_tmp_stack(struct thread_core_local *l, vaddr_t sp)
664 {
665 	l->tmp_stack_va_end = sp;
666 	thread_set_irq_sp(sp);
667 	thread_set_fiq_sp(sp);
668 }
669 
670 static void set_abt_stack(struct thread_core_local *l __unused, vaddr_t sp)
671 {
672 	thread_set_abt_sp(sp);
673 }
674 #endif /*ARM32*/
675 
676 #ifdef ARM64
677 static void set_tmp_stack(struct thread_core_local *l, vaddr_t sp)
678 {
679 	/*
680 	 * We're already using the tmp stack when this function is called
681 	 * so there's no need to assign it to any stack pointer. However,
682 	 * we'll need to restore it at different times so store it here.
683 	 */
684 	l->tmp_stack_va_end = sp;
685 }
686 
687 static void set_abt_stack(struct thread_core_local *l, vaddr_t sp)
688 {
689 	l->abt_stack_va_end = sp;
690 }
691 #endif /*ARM64*/
692 
693 bool thread_init_stack(uint32_t thread_id, vaddr_t sp)
694 {
695 	if (thread_id >= CFG_NUM_THREADS)
696 		return false;
697 	threads[thread_id].stack_va_end = sp;
698 	return true;
699 }
700 
701 int thread_get_id_may_fail(void)
702 {
703 	/* thread_get_core_local() requires IRQs to be disabled */
704 	uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_IRQ);
705 	struct thread_core_local *l = thread_get_core_local();
706 	int ct = l->curr_thread;
707 
708 	thread_unmask_exceptions(exceptions);
709 	return ct;
710 }
711 
712 int thread_get_id(void)
713 {
714 	int ct = thread_get_id_may_fail();
715 
716 	assert((ct >= 0) && (ct < CFG_NUM_THREADS));
717 	return ct;
718 }
719 
720 static void init_handlers(const struct thread_handlers *handlers)
721 {
722 	thread_std_smc_handler_ptr = handlers->std_smc;
723 	thread_fast_smc_handler_ptr = handlers->fast_smc;
724 	thread_fiq_handler_ptr = handlers->fiq;
725 	thread_cpu_on_handler_ptr = handlers->cpu_on;
726 	thread_cpu_off_handler_ptr = handlers->cpu_off;
727 	thread_cpu_suspend_handler_ptr = handlers->cpu_suspend;
728 	thread_cpu_resume_handler_ptr = handlers->cpu_resume;
729 	thread_system_off_handler_ptr = handlers->system_off;
730 	thread_system_reset_handler_ptr = handlers->system_reset;
731 }
732 
733 
734 #ifdef CFG_WITH_PAGER
735 static void init_thread_stacks(void)
736 {
737 	size_t n;
738 
739 	/*
740 	 * Allocate virtual memory for thread stacks.
741 	 */
742 	for (n = 0; n < CFG_NUM_THREADS; n++) {
743 		tee_mm_entry_t *mm;
744 		vaddr_t sp;
745 
746 		/* Find vmem for thread stack and its protection gap */
747 		mm = tee_mm_alloc(&tee_mm_vcore,
748 				  SMALL_PAGE_SIZE + STACK_THREAD_SIZE);
749 		TEE_ASSERT(mm);
750 
751 		/* Claim eventual physical page */
752 		tee_pager_add_pages(tee_mm_get_smem(mm), tee_mm_get_size(mm),
753 				    true);
754 
755 		/* Realloc both protection vmem and stack vmem separately */
756 		sp = tee_mm_get_smem(mm);
757 		tee_mm_free(mm);
758 		mm = tee_mm_alloc2(&tee_mm_vcore, sp, SMALL_PAGE_SIZE);
759 		TEE_ASSERT(mm);
760 		mm = tee_mm_alloc2(&tee_mm_vcore, sp + SMALL_PAGE_SIZE,
761 						  STACK_THREAD_SIZE);
762 		TEE_ASSERT(mm);
763 
764 		/* init effective stack */
765 		sp = tee_mm_get_smem(mm) + tee_mm_get_bytes(mm);
766 		if (!thread_init_stack(n, sp))
767 			panic();
768 
769 		/* Add the area to the pager */
770 		tee_pager_add_area(mm, TEE_PAGER_AREA_RW, NULL, NULL);
771 	}
772 }
773 #else
774 static void init_thread_stacks(void)
775 {
776 	size_t n;
777 
778 	/* Assign the thread stacks */
779 	for (n = 0; n < CFG_NUM_THREADS; n++) {
780 		if (!thread_init_stack(n, GET_STACK(stack_thread[n])))
781 			panic();
782 	}
783 }
784 #endif /*CFG_WITH_PAGER*/
785 
786 void thread_init_primary(const struct thread_handlers *handlers)
787 {
788 	init_handlers(handlers);
789 
790 	/* Initialize canaries around the stacks */
791 	init_canaries();
792 
793 	init_thread_stacks();
794 }
795 
796 static void init_sec_mon(size_t pos __maybe_unused)
797 {
798 #if !defined(CFG_WITH_ARM_TRUSTED_FW)
799 	/* Initialize secure monitor */
800 	sm_init(GET_STACK(stack_sm[pos]));
801 	sm_set_entry_vector(thread_vector_table);
802 #endif
803 }
804 
805 void thread_init_per_cpu(void)
806 {
807 	size_t pos = get_core_pos();
808 	struct thread_core_local *l = thread_get_core_local();
809 
810 	init_sec_mon(pos);
811 
812 	set_tmp_stack(l, GET_STACK(stack_tmp[pos]));
813 	set_abt_stack(l, GET_STACK(stack_abt[pos]));
814 
815 	thread_init_vbar();
816 }
817 
818 struct thread_specific_data *thread_get_tsd(void)
819 {
820 	return &threads[thread_get_id()].tsd;
821 }
822 
823 struct thread_ctx_regs *thread_get_ctx_regs(void)
824 {
825 	struct thread_core_local *l = thread_get_core_local();
826 
827 	assert(l->curr_thread != -1);
828 	return &threads[l->curr_thread].regs;
829 }
830 
831 void thread_set_irq(bool enable)
832 {
833 	/* thread_get_core_local() requires IRQs to be disabled */
834 	uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_IRQ);
835 	struct thread_core_local *l;
836 
837 	l = thread_get_core_local();
838 
839 	assert(l->curr_thread != -1);
840 
841 	if (enable) {
842 		threads[l->curr_thread].flags |= THREAD_FLAGS_IRQ_ENABLE;
843 		thread_set_exceptions(exceptions & ~THREAD_EXCP_IRQ);
844 	} else {
845 		/*
846 		 * No need to disable IRQ here since it's already disabled
847 		 * above.
848 		 */
849 		threads[l->curr_thread].flags &= ~THREAD_FLAGS_IRQ_ENABLE;
850 	}
851 }
852 
853 void thread_restore_irq(void)
854 {
855 	/* thread_get_core_local() requires IRQs to be disabled */
856 	uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_IRQ);
857 	struct thread_core_local *l;
858 
859 	l = thread_get_core_local();
860 
861 	assert(l->curr_thread != -1);
862 
863 	if (threads[l->curr_thread].flags & THREAD_FLAGS_IRQ_ENABLE)
864 		thread_set_exceptions(exceptions & ~THREAD_EXCP_IRQ);
865 }
866 
867 #ifdef CFG_WITH_VFP
868 uint32_t thread_kernel_enable_vfp(void)
869 {
870 	uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_IRQ);
871 	struct thread_ctx *thr = threads + thread_get_id();
872 	struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp;
873 
874 	assert(!vfp_is_enabled());
875 
876 	if (!thr->vfp_state.ns_saved) {
877 		vfp_lazy_save_state_final(&thr->vfp_state.ns);
878 		thr->vfp_state.ns_saved = true;
879 	} else if (thr->vfp_state.sec_lazy_saved &&
880 		   !thr->vfp_state.sec_saved) {
881 		/*
882 		 * This happens when we're handling an abort while the
883 		 * thread was using the VFP state.
884 		 */
885 		vfp_lazy_save_state_final(&thr->vfp_state.sec);
886 		thr->vfp_state.sec_saved = true;
887 	} else if (tuv && tuv->lazy_saved && !tuv->saved) {
888 		/*
889 		 * This can happen either during syscall or abort
890 		 * processing (while processing a syscall).
891 		 */
892 		vfp_lazy_save_state_final(&tuv->vfp);
893 		tuv->saved = true;
894 	}
895 
896 	vfp_enable();
897 	return exceptions;
898 }
899 
900 void thread_kernel_disable_vfp(uint32_t state)
901 {
902 	uint32_t exceptions;
903 
904 	assert(vfp_is_enabled());
905 
906 	vfp_disable();
907 	exceptions = thread_get_exceptions();
908 	assert(exceptions & THREAD_EXCP_IRQ);
909 	exceptions &= ~THREAD_EXCP_IRQ;
910 	exceptions |= state & THREAD_EXCP_IRQ;
911 	thread_set_exceptions(exceptions);
912 }
913 
914 void thread_kernel_save_vfp(void)
915 {
916 	struct thread_ctx *thr = threads + thread_get_id();
917 
918 	assert(thread_get_exceptions() & THREAD_EXCP_IRQ);
919 	if (vfp_is_enabled()) {
920 		vfp_lazy_save_state_init(&thr->vfp_state.sec);
921 		thr->vfp_state.sec_lazy_saved = true;
922 	}
923 }
924 
925 void thread_kernel_restore_vfp(void)
926 {
927 	struct thread_ctx *thr = threads + thread_get_id();
928 
929 	assert(thread_get_exceptions() & THREAD_EXCP_IRQ);
930 	assert(!vfp_is_enabled());
931 	if (thr->vfp_state.sec_lazy_saved) {
932 		vfp_lazy_restore_state(&thr->vfp_state.sec,
933 				       thr->vfp_state.sec_saved);
934 		thr->vfp_state.sec_saved = false;
935 		thr->vfp_state.sec_lazy_saved = false;
936 	}
937 }
938 
939 void thread_user_enable_vfp(struct thread_user_vfp_state *uvfp)
940 {
941 	struct thread_ctx *thr = threads + thread_get_id();
942 	struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp;
943 
944 	assert(thread_get_exceptions() & THREAD_EXCP_IRQ);
945 	assert(!vfp_is_enabled());
946 
947 	if (!thr->vfp_state.ns_saved) {
948 		vfp_lazy_save_state_final(&thr->vfp_state.ns);
949 		thr->vfp_state.ns_saved = true;
950 	} else if (tuv && uvfp != tuv) {
951 		if (tuv->lazy_saved && !tuv->saved) {
952 			vfp_lazy_save_state_final(&tuv->vfp);
953 			tuv->saved = true;
954 		}
955 	}
956 
957 	if (uvfp->lazy_saved)
958 		vfp_lazy_restore_state(&uvfp->vfp, uvfp->saved);
959 	uvfp->lazy_saved = false;
960 	uvfp->saved = false;
961 
962 	thr->vfp_state.uvfp = uvfp;
963 	vfp_enable();
964 }
965 
966 void thread_user_save_vfp(void)
967 {
968 	struct thread_ctx *thr = threads + thread_get_id();
969 	struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp;
970 
971 	assert(thread_get_exceptions() & THREAD_EXCP_IRQ);
972 	if (!vfp_is_enabled())
973 		return;
974 
975 	assert(tuv && !tuv->lazy_saved && !tuv->saved);
976 	vfp_lazy_save_state_init(&tuv->vfp);
977 	tuv->lazy_saved = true;
978 }
979 
980 void thread_user_clear_vfp(struct thread_user_vfp_state *uvfp)
981 {
982 	struct thread_ctx *thr = threads + thread_get_id();
983 
984 	if (uvfp == thr->vfp_state.uvfp)
985 		thr->vfp_state.uvfp = NULL;
986 	uvfp->lazy_saved = false;
987 	uvfp->saved = false;
988 }
989 #endif /*CFG_WITH_VFP*/
990 
991 #ifdef ARM32
992 static bool get_spsr(bool is_32bit, unsigned long entry_func, uint32_t *spsr)
993 {
994 	uint32_t s;
995 
996 	if (!is_32bit)
997 		return false;
998 
999 	s = read_spsr();
1000 	s &= ~(CPSR_MODE_MASK | CPSR_T | CPSR_IT_MASK1 | CPSR_IT_MASK2);
1001 	s |= CPSR_MODE_USR;
1002 	if (entry_func & 1)
1003 		s |= CPSR_T;
1004 	*spsr = s;
1005 	return true;
1006 }
1007 #endif
1008 
1009 #ifdef ARM64
1010 static bool get_spsr(bool is_32bit, unsigned long entry_func, uint32_t *spsr)
1011 {
1012 	uint32_t s;
1013 
1014 	if (is_32bit) {
1015 		s = read_daif() & (SPSR_32_AIF_MASK << SPSR_32_AIF_SHIFT);
1016 		s |= SPSR_MODE_RW_32 << SPSR_MODE_RW_SHIFT;
1017 		s |= (entry_func & SPSR_32_T_MASK) << SPSR_32_T_SHIFT;
1018 	} else {
1019 		s = read_daif() & (SPSR_64_DAIF_MASK << SPSR_64_DAIF_SHIFT);
1020 	}
1021 
1022 	*spsr = s;
1023 	return true;
1024 }
1025 #endif
1026 
1027 uint32_t thread_enter_user_mode(unsigned long a0, unsigned long a1,
1028 		unsigned long a2, unsigned long a3, unsigned long user_sp,
1029 		unsigned long entry_func, bool is_32bit,
1030 		uint32_t *exit_status0, uint32_t *exit_status1)
1031 {
1032 	uint32_t spsr;
1033 
1034 	if (!get_spsr(is_32bit, entry_func, &spsr)) {
1035 		*exit_status0 = 1; /* panic */
1036 		*exit_status1 = 0xbadbadba;
1037 		return 0;
1038 	}
1039 	return __thread_enter_user_mode(a0, a1, a2, a3, user_sp, entry_func,
1040 					spsr, exit_status0, exit_status1);
1041 }
1042 
1043 void thread_add_mutex(struct mutex *m)
1044 {
1045 	struct thread_core_local *l = thread_get_core_local();
1046 	int ct = l->curr_thread;
1047 
1048 	assert(ct != -1 && threads[ct].state == THREAD_STATE_ACTIVE);
1049 	assert(m->owner_id == -1);
1050 	m->owner_id = ct;
1051 	TAILQ_INSERT_TAIL(&threads[ct].mutexes, m, link);
1052 }
1053 
1054 void thread_rem_mutex(struct mutex *m)
1055 {
1056 	struct thread_core_local *l = thread_get_core_local();
1057 	int ct = l->curr_thread;
1058 
1059 	assert(ct != -1 && threads[ct].state == THREAD_STATE_ACTIVE);
1060 	assert(m->owner_id == ct);
1061 	m->owner_id = -1;
1062 	TAILQ_REMOVE(&threads[ct].mutexes, m, link);
1063 }
1064 
1065 paddr_t thread_rpc_alloc_arg(size_t size)
1066 {
1067 	uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = {
1068 		TEESMC_RETURN_RPC_ALLOC_ARG, size};
1069 
1070 	thread_rpc(rpc_args);
1071 	return rpc_args[1];
1072 }
1073 
1074 paddr_t thread_rpc_alloc_payload(size_t size)
1075 {
1076 	uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = {
1077 		TEESMC_RETURN_RPC_ALLOC_PAYLOAD, size};
1078 
1079 	thread_rpc(rpc_args);
1080 	return rpc_args[1];
1081 }
1082 
1083 void thread_rpc_free_arg(paddr_t arg)
1084 {
1085 	if (arg) {
1086 		uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = {
1087 			TEESMC_RETURN_RPC_FREE_ARG, arg};
1088 
1089 		thread_rpc(rpc_args);
1090 	}
1091 }
1092 void thread_rpc_free_payload(paddr_t payload)
1093 {
1094 	if (payload) {
1095 		uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = {
1096 			TEESMC_RETURN_RPC_FREE_PAYLOAD, payload};
1097 
1098 		thread_rpc(rpc_args);
1099 	}
1100 }
1101 
1102 static uint32_t rpc_cmd_nolock(uint32_t cmd, size_t num_params,
1103 		struct teesmc32_param *params)
1104 {
1105 	uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { 0 };
1106 	struct thread_ctx *thr = threads + thread_get_id();
1107 	struct teesmc32_arg *arg = thr->rpc_arg;
1108 	paddr_t parg = thr->rpc_parg;
1109 	const size_t params_size = sizeof(struct teesmc32_param) * num_params;
1110 	size_t n;
1111 
1112 	TEE_ASSERT(arg && parg && num_params <= RPC_MAX_PARAMS);
1113 
1114 	memset(arg, 0, TEESMC32_GET_ARG_SIZE(RPC_MAX_PARAMS));
1115 	arg->cmd = cmd;
1116 	arg->ret = TEE_ERROR_GENERIC; /* in case value isn't updated */
1117 	arg->num_params = num_params;
1118 	memcpy(TEESMC32_GET_PARAMS(arg), params, params_size);
1119 
1120 	rpc_args[0] = TEESMC_RETURN_RPC_CMD;
1121 	rpc_args[1] = parg;
1122 	thread_rpc(rpc_args);
1123 
1124 	for (n = 0; n < num_params; n++) {
1125 		switch (params[n].attr & TEESMC_ATTR_TYPE_MASK) {
1126 		case TEESMC_ATTR_TYPE_VALUE_OUTPUT:
1127 		case TEESMC_ATTR_TYPE_VALUE_INOUT:
1128 		case TEESMC_ATTR_TYPE_MEMREF_OUTPUT:
1129 		case TEESMC_ATTR_TYPE_MEMREF_INOUT:
1130 			memcpy(params + n, TEESMC32_GET_PARAMS(arg) + n,
1131 			       sizeof(struct teesmc32_param));
1132 			break;
1133 		default:
1134 			break;
1135 		}
1136 	}
1137 
1138 	return arg->ret;
1139 }
1140 
1141 uint32_t thread_rpc_cmd(uint32_t cmd, size_t num_params,
1142 		struct teesmc32_param *params)
1143 {
1144 	uint32_t ret;
1145 
1146 	ret = rpc_cmd_nolock(cmd, num_params, params);
1147 
1148 	return ret;
1149 }
1150 
1151 void thread_optee_rpc_alloc_payload(size_t size, paddr_t *payload,
1152 		paddr_t *cookie)
1153 {
1154 	uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = {
1155 		TEESMC_RETURN_OPTEE_RPC_ALLOC_PAYLOAD, size};
1156 
1157 	thread_rpc(rpc_args);
1158 	if (payload)
1159 		*payload = rpc_args[1];
1160 	if (cookie)
1161 		*cookie = rpc_args[2];
1162 }
1163 
1164 void thread_optee_rpc_free_payload(paddr_t cookie)
1165 {
1166 	uint32_t rpc_args[THREAD_RPC_NUM_ARGS] ={
1167 		TEESMC_RETURN_OPTEE_RPC_FREE_PAYLOAD, cookie};
1168 
1169 	thread_rpc(rpc_args);
1170 }
1171