1 // SPDX-License-Identifier: BSD-2-Clause 2 /* 3 * Copyright (c) 2016, Linaro Limited 4 * Copyright (c) 2014, STMicroelectronics International N.V. 5 */ 6 7 #include <platform_config.h> 8 9 #include <arm.h> 10 #include <assert.h> 11 #include <keep.h> 12 #include <kernel/asan.h> 13 #include <kernel/lockdep.h> 14 #include <kernel/misc.h> 15 #include <kernel/msg_param.h> 16 #include <kernel/panic.h> 17 #include <kernel/spinlock.h> 18 #include <kernel/tee_ta_manager.h> 19 #include <kernel/thread_defs.h> 20 #include <kernel/thread.h> 21 #include <kernel/virtualization.h> 22 #include <mm/core_memprot.h> 23 #include <mm/mobj.h> 24 #include <mm/tee_mm.h> 25 #include <mm/tee_mmu.h> 26 #include <mm/tee_pager.h> 27 #include <optee_msg.h> 28 #include <optee_rpc_cmd.h> 29 #include <smccc.h> 30 #include <sm/optee_smc.h> 31 #include <sm/sm.h> 32 #include <tee/tee_cryp_utl.h> 33 #include <tee/tee_fs_rpc.h> 34 #include <trace.h> 35 #include <util.h> 36 37 #include "thread_private.h" 38 39 #ifdef CFG_WITH_ARM_TRUSTED_FW 40 #define STACK_TMP_OFFS 0 41 #else 42 #define STACK_TMP_OFFS SM_STACK_TMP_RESERVE_SIZE 43 #endif 44 45 46 #ifdef ARM32 47 #ifdef CFG_CORE_SANITIZE_KADDRESS 48 #define STACK_TMP_SIZE (3072 + STACK_TMP_OFFS) 49 #else 50 #define STACK_TMP_SIZE (1536 + STACK_TMP_OFFS) 51 #endif 52 #define STACK_THREAD_SIZE 8192 53 54 #ifdef CFG_CORE_SANITIZE_KADDRESS 55 #define STACK_ABT_SIZE 3072 56 #else 57 #define STACK_ABT_SIZE 2048 58 #endif 59 60 #endif /*ARM32*/ 61 62 #ifdef ARM64 63 #define STACK_TMP_SIZE (2048 + STACK_TMP_OFFS) 64 #define STACK_THREAD_SIZE 8192 65 66 #if TRACE_LEVEL > 0 67 #define STACK_ABT_SIZE 3072 68 #else 69 #define STACK_ABT_SIZE 1024 70 #endif 71 #endif /*ARM64*/ 72 73 struct thread_ctx threads[CFG_NUM_THREADS]; 74 75 struct thread_core_local thread_core_local[CFG_TEE_CORE_NB_CORE] __nex_bss; 76 77 #ifdef CFG_WITH_STACK_CANARIES 78 #ifdef ARM32 79 #define STACK_CANARY_SIZE (4 * sizeof(uint32_t)) 80 #endif 81 #ifdef ARM64 82 #define STACK_CANARY_SIZE (8 * sizeof(uint32_t)) 83 #endif 84 #define START_CANARY_VALUE 0xdededede 85 #define END_CANARY_VALUE 0xabababab 86 #define GET_START_CANARY(name, stack_num) name[stack_num][0] 87 #define GET_END_CANARY(name, stack_num) \ 88 name[stack_num][sizeof(name[stack_num]) / sizeof(uint32_t) - 1] 89 #else 90 #define STACK_CANARY_SIZE 0 91 #endif 92 93 #define DECLARE_STACK(name, num_stacks, stack_size, linkage) \ 94 linkage uint32_t name[num_stacks] \ 95 [ROUNDUP(stack_size + STACK_CANARY_SIZE, STACK_ALIGNMENT) / \ 96 sizeof(uint32_t)] \ 97 __attribute__((section(".nozi_stack." # name), \ 98 aligned(STACK_ALIGNMENT))) 99 100 #define STACK_SIZE(stack) (sizeof(stack) - STACK_CANARY_SIZE / 2) 101 102 #define GET_STACK(stack) \ 103 ((vaddr_t)(stack) + STACK_SIZE(stack)) 104 105 DECLARE_STACK(stack_tmp, CFG_TEE_CORE_NB_CORE, STACK_TMP_SIZE, static); 106 DECLARE_STACK(stack_abt, CFG_TEE_CORE_NB_CORE, STACK_ABT_SIZE, static); 107 #ifndef CFG_WITH_PAGER 108 DECLARE_STACK(stack_thread, CFG_NUM_THREADS, STACK_THREAD_SIZE, static); 109 #endif 110 111 const void *stack_tmp_export = (uint8_t *)stack_tmp + sizeof(stack_tmp[0]) - 112 (STACK_TMP_OFFS + STACK_CANARY_SIZE / 2); 113 const uint32_t stack_tmp_stride = sizeof(stack_tmp[0]); 114 115 /* 116 * These stack setup info are required by secondary boot cores before they 117 * each locally enable the pager (the mmu). Hence kept in pager sections. 118 */ 119 KEEP_PAGER(stack_tmp_export); 120 KEEP_PAGER(stack_tmp_stride); 121 122 thread_smc_handler_t thread_std_smc_handler_ptr __nex_bss; 123 static thread_smc_handler_t thread_fast_smc_handler_ptr __nex_bss; 124 thread_nintr_handler_t thread_nintr_handler_ptr __nex_bss; 125 thread_pm_handler_t thread_cpu_on_handler_ptr __nex_bss; 126 thread_pm_handler_t thread_cpu_off_handler_ptr __nex_bss; 127 thread_pm_handler_t thread_cpu_suspend_handler_ptr __nex_bss; 128 thread_pm_handler_t thread_cpu_resume_handler_ptr __nex_bss; 129 thread_pm_handler_t thread_system_off_handler_ptr __nex_bss; 130 thread_pm_handler_t thread_system_reset_handler_ptr __nex_bss; 131 132 #ifdef CFG_CORE_UNMAP_CORE_AT_EL0 133 static vaddr_t thread_user_kcode_va __nex_bss; 134 long thread_user_kcode_offset __nex_bss; 135 static size_t thread_user_kcode_size __nex_bss; 136 #endif 137 138 #if defined(CFG_CORE_UNMAP_CORE_AT_EL0) && \ 139 defined(CFG_CORE_WORKAROUND_SPECTRE_BP_SEC) && defined(ARM64) 140 long thread_user_kdata_sp_offset __nex_bss; 141 static uint8_t thread_user_kdata_page[ 142 ROUNDUP(sizeof(thread_core_local), SMALL_PAGE_SIZE)] 143 __aligned(SMALL_PAGE_SIZE) 144 #ifndef CFG_VIRTUALIZATION 145 __section(".nozi.kdata_page"); 146 #else 147 __section(".nex_nozi.kdata_page"); 148 #endif 149 #endif 150 151 static unsigned int thread_global_lock __nex_bss = SPINLOCK_UNLOCK; 152 static bool thread_prealloc_rpc_cache; 153 154 static unsigned int thread_rpc_pnum; 155 156 static void init_canaries(void) 157 { 158 #ifdef CFG_WITH_STACK_CANARIES 159 size_t n; 160 #define INIT_CANARY(name) \ 161 for (n = 0; n < ARRAY_SIZE(name); n++) { \ 162 uint32_t *start_canary = &GET_START_CANARY(name, n); \ 163 uint32_t *end_canary = &GET_END_CANARY(name, n); \ 164 \ 165 *start_canary = START_CANARY_VALUE; \ 166 *end_canary = END_CANARY_VALUE; \ 167 DMSG("#Stack canaries for %s[%zu] with top at %p", \ 168 #name, n, (void *)(end_canary - 1)); \ 169 DMSG("watch *%p", (void *)end_canary); \ 170 } 171 172 INIT_CANARY(stack_tmp); 173 INIT_CANARY(stack_abt); 174 #if !defined(CFG_WITH_PAGER) && !defined(CFG_VIRTUALIZATION) 175 INIT_CANARY(stack_thread); 176 #endif 177 #endif/*CFG_WITH_STACK_CANARIES*/ 178 } 179 180 #define CANARY_DIED(stack, loc, n) \ 181 do { \ 182 EMSG_RAW("Dead canary at %s of '%s[%zu]'", #loc, #stack, n); \ 183 panic(); \ 184 } while (0) 185 186 void thread_check_canaries(void) 187 { 188 #ifdef CFG_WITH_STACK_CANARIES 189 size_t n; 190 191 for (n = 0; n < ARRAY_SIZE(stack_tmp); n++) { 192 if (GET_START_CANARY(stack_tmp, n) != START_CANARY_VALUE) 193 CANARY_DIED(stack_tmp, start, n); 194 if (GET_END_CANARY(stack_tmp, n) != END_CANARY_VALUE) 195 CANARY_DIED(stack_tmp, end, n); 196 } 197 198 for (n = 0; n < ARRAY_SIZE(stack_abt); n++) { 199 if (GET_START_CANARY(stack_abt, n) != START_CANARY_VALUE) 200 CANARY_DIED(stack_abt, start, n); 201 if (GET_END_CANARY(stack_abt, n) != END_CANARY_VALUE) 202 CANARY_DIED(stack_abt, end, n); 203 204 } 205 #if !defined(CFG_WITH_PAGER) && !defined(CFG_VIRTUALIZATION) 206 for (n = 0; n < ARRAY_SIZE(stack_thread); n++) { 207 if (GET_START_CANARY(stack_thread, n) != START_CANARY_VALUE) 208 CANARY_DIED(stack_thread, start, n); 209 if (GET_END_CANARY(stack_thread, n) != END_CANARY_VALUE) 210 CANARY_DIED(stack_thread, end, n); 211 } 212 #endif 213 #endif/*CFG_WITH_STACK_CANARIES*/ 214 } 215 216 static void lock_global(void) 217 { 218 cpu_spin_lock(&thread_global_lock); 219 } 220 221 static void unlock_global(void) 222 { 223 cpu_spin_unlock(&thread_global_lock); 224 } 225 226 #ifdef ARM32 227 uint32_t thread_get_exceptions(void) 228 { 229 uint32_t cpsr = read_cpsr(); 230 231 return (cpsr >> CPSR_F_SHIFT) & THREAD_EXCP_ALL; 232 } 233 234 void thread_set_exceptions(uint32_t exceptions) 235 { 236 uint32_t cpsr = read_cpsr(); 237 238 /* Foreign interrupts must not be unmasked while holding a spinlock */ 239 if (!(exceptions & THREAD_EXCP_FOREIGN_INTR)) 240 assert_have_no_spinlock(); 241 242 cpsr &= ~(THREAD_EXCP_ALL << CPSR_F_SHIFT); 243 cpsr |= ((exceptions & THREAD_EXCP_ALL) << CPSR_F_SHIFT); 244 write_cpsr(cpsr); 245 } 246 #endif /*ARM32*/ 247 248 #ifdef ARM64 249 uint32_t thread_get_exceptions(void) 250 { 251 uint32_t daif = read_daif(); 252 253 return (daif >> DAIF_F_SHIFT) & THREAD_EXCP_ALL; 254 } 255 256 void thread_set_exceptions(uint32_t exceptions) 257 { 258 uint32_t daif = read_daif(); 259 260 /* Foreign interrupts must not be unmasked while holding a spinlock */ 261 if (!(exceptions & THREAD_EXCP_FOREIGN_INTR)) 262 assert_have_no_spinlock(); 263 264 daif &= ~(THREAD_EXCP_ALL << DAIF_F_SHIFT); 265 daif |= ((exceptions & THREAD_EXCP_ALL) << DAIF_F_SHIFT); 266 write_daif(daif); 267 } 268 #endif /*ARM64*/ 269 270 uint32_t thread_mask_exceptions(uint32_t exceptions) 271 { 272 uint32_t state = thread_get_exceptions(); 273 274 thread_set_exceptions(state | (exceptions & THREAD_EXCP_ALL)); 275 return state; 276 } 277 278 void thread_unmask_exceptions(uint32_t state) 279 { 280 thread_set_exceptions(state & THREAD_EXCP_ALL); 281 } 282 283 284 struct thread_core_local *thread_get_core_local(void) 285 { 286 uint32_t cpu_id = get_core_pos(); 287 288 /* 289 * Foreign interrupts must be disabled before playing with core_local 290 * since we otherwise may be rescheduled to a different core in the 291 * middle of this function. 292 */ 293 assert(thread_get_exceptions() & THREAD_EXCP_FOREIGN_INTR); 294 295 assert(cpu_id < CFG_TEE_CORE_NB_CORE); 296 return &thread_core_local[cpu_id]; 297 } 298 299 static void thread_lazy_save_ns_vfp(void) 300 { 301 #ifdef CFG_WITH_VFP 302 struct thread_ctx *thr = threads + thread_get_id(); 303 304 thr->vfp_state.ns_saved = false; 305 vfp_lazy_save_state_init(&thr->vfp_state.ns); 306 #endif /*CFG_WITH_VFP*/ 307 } 308 309 static void thread_lazy_restore_ns_vfp(void) 310 { 311 #ifdef CFG_WITH_VFP 312 struct thread_ctx *thr = threads + thread_get_id(); 313 struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp; 314 315 assert(!thr->vfp_state.sec_lazy_saved && !thr->vfp_state.sec_saved); 316 317 if (tuv && tuv->lazy_saved && !tuv->saved) { 318 vfp_lazy_save_state_final(&tuv->vfp, false /*!force_save*/); 319 tuv->saved = true; 320 } 321 322 vfp_lazy_restore_state(&thr->vfp_state.ns, thr->vfp_state.ns_saved); 323 thr->vfp_state.ns_saved = false; 324 #endif /*CFG_WITH_VFP*/ 325 } 326 327 #ifdef ARM32 328 static void init_regs(struct thread_ctx *thread, 329 struct thread_smc_args *args) 330 { 331 thread->regs.pc = (uint32_t)thread_std_smc_entry; 332 333 /* 334 * Stdcalls starts in SVC mode with masked foreign interrupts, masked 335 * Asynchronous abort and unmasked native interrupts. 336 */ 337 thread->regs.cpsr = read_cpsr() & ARM32_CPSR_E; 338 thread->regs.cpsr |= CPSR_MODE_SVC | CPSR_A | 339 (THREAD_EXCP_FOREIGN_INTR << ARM32_CPSR_F_SHIFT); 340 /* Enable thumb mode if it's a thumb instruction */ 341 if (thread->regs.pc & 1) 342 thread->regs.cpsr |= CPSR_T; 343 /* Reinitialize stack pointer */ 344 thread->regs.svc_sp = thread->stack_va_end; 345 346 /* 347 * Copy arguments into context. This will make the 348 * arguments appear in r0-r7 when thread is started. 349 */ 350 thread->regs.r0 = args->a0; 351 thread->regs.r1 = args->a1; 352 thread->regs.r2 = args->a2; 353 thread->regs.r3 = args->a3; 354 thread->regs.r4 = args->a4; 355 thread->regs.r5 = args->a5; 356 thread->regs.r6 = args->a6; 357 thread->regs.r7 = args->a7; 358 } 359 #endif /*ARM32*/ 360 361 #ifdef ARM64 362 static void init_regs(struct thread_ctx *thread, 363 struct thread_smc_args *args) 364 { 365 thread->regs.pc = (uint64_t)thread_std_smc_entry; 366 367 /* 368 * Stdcalls starts in SVC mode with masked foreign interrupts, masked 369 * Asynchronous abort and unmasked native interrupts. 370 */ 371 thread->regs.cpsr = SPSR_64(SPSR_64_MODE_EL1, SPSR_64_MODE_SP_EL0, 372 THREAD_EXCP_FOREIGN_INTR | DAIFBIT_ABT); 373 /* Reinitialize stack pointer */ 374 thread->regs.sp = thread->stack_va_end; 375 376 /* 377 * Copy arguments into context. This will make the 378 * arguments appear in x0-x7 when thread is started. 379 */ 380 thread->regs.x[0] = args->a0; 381 thread->regs.x[1] = args->a1; 382 thread->regs.x[2] = args->a2; 383 thread->regs.x[3] = args->a3; 384 thread->regs.x[4] = args->a4; 385 thread->regs.x[5] = args->a5; 386 thread->regs.x[6] = args->a6; 387 thread->regs.x[7] = args->a7; 388 389 /* Set up frame pointer as per the Aarch64 AAPCS */ 390 thread->regs.x[29] = 0; 391 } 392 #endif /*ARM64*/ 393 394 void thread_init_boot_thread(void) 395 { 396 struct thread_core_local *l = thread_get_core_local(); 397 398 thread_init_threads(); 399 400 l->curr_thread = 0; 401 threads[0].state = THREAD_STATE_ACTIVE; 402 } 403 404 void thread_clr_boot_thread(void) 405 { 406 struct thread_core_local *l = thread_get_core_local(); 407 408 assert(l->curr_thread >= 0 && l->curr_thread < CFG_NUM_THREADS); 409 assert(threads[l->curr_thread].state == THREAD_STATE_ACTIVE); 410 threads[l->curr_thread].state = THREAD_STATE_FREE; 411 l->curr_thread = -1; 412 } 413 414 static void thread_alloc_and_run(struct thread_smc_args *args) 415 { 416 size_t n; 417 struct thread_core_local *l = thread_get_core_local(); 418 bool found_thread = false; 419 420 assert(l->curr_thread == -1); 421 422 lock_global(); 423 424 for (n = 0; n < CFG_NUM_THREADS; n++) { 425 if (threads[n].state == THREAD_STATE_FREE) { 426 threads[n].state = THREAD_STATE_ACTIVE; 427 found_thread = true; 428 break; 429 } 430 } 431 432 unlock_global(); 433 434 if (!found_thread) { 435 args->a0 = OPTEE_SMC_RETURN_ETHREAD_LIMIT; 436 return; 437 } 438 439 l->curr_thread = n; 440 441 threads[n].flags = 0; 442 init_regs(threads + n, args); 443 444 /* Save Hypervisor Client ID */ 445 threads[n].hyp_clnt_id = args->a7; 446 447 thread_lazy_save_ns_vfp(); 448 thread_resume(&threads[n].regs); 449 } 450 451 #ifdef ARM32 452 static void copy_a0_to_a5(struct thread_ctx_regs *regs, 453 struct thread_smc_args *args) 454 { 455 /* 456 * Update returned values from RPC, values will appear in 457 * r0-r3 when thread is resumed. 458 */ 459 regs->r0 = args->a0; 460 regs->r1 = args->a1; 461 regs->r2 = args->a2; 462 regs->r3 = args->a3; 463 regs->r4 = args->a4; 464 regs->r5 = args->a5; 465 } 466 #endif /*ARM32*/ 467 468 #ifdef ARM64 469 static void copy_a0_to_a5(struct thread_ctx_regs *regs, 470 struct thread_smc_args *args) 471 { 472 /* 473 * Update returned values from RPC, values will appear in 474 * x0-x3 when thread is resumed. 475 */ 476 regs->x[0] = args->a0; 477 regs->x[1] = args->a1; 478 regs->x[2] = args->a2; 479 regs->x[3] = args->a3; 480 regs->x[4] = args->a4; 481 regs->x[5] = args->a5; 482 } 483 #endif /*ARM64*/ 484 485 #ifdef ARM32 486 static bool is_from_user(uint32_t cpsr) 487 { 488 return (cpsr & ARM32_CPSR_MODE_MASK) == ARM32_CPSR_MODE_USR; 489 } 490 #endif 491 492 #ifdef ARM64 493 static bool is_from_user(uint32_t cpsr) 494 { 495 if (cpsr & (SPSR_MODE_RW_32 << SPSR_MODE_RW_SHIFT)) 496 return true; 497 if (((cpsr >> SPSR_64_MODE_EL_SHIFT) & SPSR_64_MODE_EL_MASK) == 498 SPSR_64_MODE_EL0) 499 return true; 500 return false; 501 } 502 #endif 503 504 static bool is_user_mode(struct thread_ctx_regs *regs) 505 { 506 return is_from_user((uint32_t)regs->cpsr); 507 } 508 509 static void thread_resume_from_rpc(struct thread_smc_args *args) 510 { 511 size_t n = args->a3; /* thread id */ 512 struct thread_core_local *l = thread_get_core_local(); 513 uint32_t rv = 0; 514 515 assert(l->curr_thread == -1); 516 517 lock_global(); 518 519 if (n < CFG_NUM_THREADS && 520 threads[n].state == THREAD_STATE_SUSPENDED && 521 args->a7 == threads[n].hyp_clnt_id) 522 threads[n].state = THREAD_STATE_ACTIVE; 523 else 524 rv = OPTEE_SMC_RETURN_ERESUME; 525 526 unlock_global(); 527 528 if (rv) { 529 args->a0 = rv; 530 return; 531 } 532 533 l->curr_thread = n; 534 535 if (is_user_mode(&threads[n].regs)) 536 tee_ta_update_session_utime_resume(); 537 538 if (threads[n].have_user_map) 539 core_mmu_set_user_map(&threads[n].user_map); 540 541 /* 542 * Return from RPC to request service of a foreign interrupt must not 543 * get parameters from non-secure world. 544 */ 545 if (threads[n].flags & THREAD_FLAGS_COPY_ARGS_ON_RETURN) { 546 copy_a0_to_a5(&threads[n].regs, args); 547 threads[n].flags &= ~THREAD_FLAGS_COPY_ARGS_ON_RETURN; 548 } 549 550 thread_lazy_save_ns_vfp(); 551 thread_resume(&threads[n].regs); 552 } 553 554 void thread_handle_fast_smc(struct thread_smc_args *args) 555 { 556 thread_check_canaries(); 557 558 #ifdef CFG_VIRTUALIZATION 559 if (!virt_set_guest(args->a7)) { 560 args->a0 = OPTEE_SMC_RETURN_ENOTAVAIL; 561 goto out; 562 } 563 #endif 564 565 thread_fast_smc_handler_ptr(args); 566 567 #ifdef CFG_VIRTUALIZATION 568 virt_unset_guest(); 569 #endif 570 /* Fast handlers must not unmask any exceptions */ 571 out: 572 __maybe_unused; 573 assert(thread_get_exceptions() == THREAD_EXCP_ALL); 574 } 575 576 void thread_handle_std_smc(struct thread_smc_args *args) 577 { 578 thread_check_canaries(); 579 580 #ifdef CFG_VIRTUALIZATION 581 if (!virt_set_guest(args->a7)) { 582 args->a0 = OPTEE_SMC_RETURN_ENOTAVAIL; 583 return; 584 } 585 #endif 586 587 if (args->a0 == OPTEE_SMC_CALL_RETURN_FROM_RPC) 588 thread_resume_from_rpc(args); 589 else 590 thread_alloc_and_run(args); 591 592 #ifdef CFG_VIRTUALIZATION 593 virt_unset_guest(); 594 #endif 595 596 } 597 598 /** 599 * Free physical memory previously allocated with thread_rpc_alloc_arg() 600 * 601 * @cookie: cookie received when allocating the buffer 602 */ 603 static void thread_rpc_free_arg(uint64_t cookie) 604 { 605 if (cookie) { 606 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { 607 OPTEE_SMC_RETURN_RPC_FREE 608 }; 609 610 reg_pair_from_64(cookie, rpc_args + 1, rpc_args + 2); 611 thread_rpc(rpc_args); 612 } 613 } 614 615 /* 616 * Helper routine for the assembly function thread_std_smc_entry() 617 * 618 * Note: this function is weak just to make it possible to exclude it from 619 * the unpaged area. 620 */ 621 void __weak __thread_std_smc_entry(struct thread_smc_args *args) 622 { 623 #ifdef CFG_VIRTUALIZATION 624 virt_on_stdcall(); 625 #endif 626 thread_std_smc_handler_ptr(args); 627 628 if (args->a0 == OPTEE_SMC_RETURN_OK) { 629 struct thread_ctx *thr = threads + thread_get_id(); 630 631 tee_fs_rpc_cache_clear(&thr->tsd); 632 if (!thread_prealloc_rpc_cache) { 633 thread_rpc_free_arg(mobj_get_cookie(thr->rpc_mobj)); 634 mobj_free(thr->rpc_mobj); 635 thr->rpc_arg = 0; 636 thr->rpc_mobj = NULL; 637 } 638 } 639 } 640 641 void *thread_get_tmp_sp(void) 642 { 643 struct thread_core_local *l = thread_get_core_local(); 644 645 return (void *)l->tmp_stack_va_end; 646 } 647 648 #ifdef ARM64 649 vaddr_t thread_get_saved_thread_sp(void) 650 { 651 struct thread_core_local *l = thread_get_core_local(); 652 int ct = l->curr_thread; 653 654 assert(ct != -1); 655 return threads[ct].kern_sp; 656 } 657 #endif /*ARM64*/ 658 659 vaddr_t thread_stack_start(void) 660 { 661 struct thread_ctx *thr; 662 int ct = thread_get_id_may_fail(); 663 664 if (ct == -1) 665 return 0; 666 667 thr = threads + ct; 668 return thr->stack_va_end - STACK_THREAD_SIZE; 669 } 670 671 size_t thread_stack_size(void) 672 { 673 return STACK_THREAD_SIZE; 674 } 675 676 bool thread_is_from_abort_mode(void) 677 { 678 struct thread_core_local *l = thread_get_core_local(); 679 680 return (l->flags >> THREAD_CLF_SAVED_SHIFT) & THREAD_CLF_ABORT; 681 } 682 683 #ifdef ARM32 684 bool thread_is_in_normal_mode(void) 685 { 686 return (read_cpsr() & ARM32_CPSR_MODE_MASK) == ARM32_CPSR_MODE_SVC; 687 } 688 #endif 689 690 #ifdef ARM64 691 bool thread_is_in_normal_mode(void) 692 { 693 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR); 694 struct thread_core_local *l = thread_get_core_local(); 695 bool ret; 696 697 /* If any bit in l->flags is set we're handling some exception. */ 698 ret = !l->flags; 699 thread_unmask_exceptions(exceptions); 700 701 return ret; 702 } 703 #endif 704 705 void thread_state_free(void) 706 { 707 struct thread_core_local *l = thread_get_core_local(); 708 int ct = l->curr_thread; 709 710 assert(ct != -1); 711 712 thread_lazy_restore_ns_vfp(); 713 tee_pager_release_phys( 714 (void *)(threads[ct].stack_va_end - STACK_THREAD_SIZE), 715 STACK_THREAD_SIZE); 716 717 lock_global(); 718 719 assert(threads[ct].state == THREAD_STATE_ACTIVE); 720 threads[ct].state = THREAD_STATE_FREE; 721 threads[ct].flags = 0; 722 l->curr_thread = -1; 723 724 #ifdef CFG_VIRTUALIZATION 725 virt_unset_guest(); 726 #endif 727 unlock_global(); 728 } 729 730 #ifdef CFG_WITH_PAGER 731 static void release_unused_kernel_stack(struct thread_ctx *thr, 732 uint32_t cpsr __maybe_unused) 733 { 734 #ifdef ARM64 735 /* 736 * If we're from user mode then thr->regs.sp is the saved user 737 * stack pointer and thr->kern_sp holds the last kernel stack 738 * pointer. But if we're from kernel mode then thr->kern_sp isn't 739 * up to date so we need to read from thr->regs.sp instead. 740 */ 741 vaddr_t sp = is_from_user(cpsr) ? thr->kern_sp : thr->regs.sp; 742 #else 743 vaddr_t sp = thr->regs.svc_sp; 744 #endif 745 vaddr_t base = thr->stack_va_end - STACK_THREAD_SIZE; 746 size_t len = sp - base; 747 748 tee_pager_release_phys((void *)base, len); 749 } 750 #else 751 static void release_unused_kernel_stack(struct thread_ctx *thr __unused, 752 uint32_t cpsr __unused) 753 { 754 } 755 #endif 756 757 int thread_state_suspend(uint32_t flags, uint32_t cpsr, vaddr_t pc) 758 { 759 struct thread_core_local *l = thread_get_core_local(); 760 int ct = l->curr_thread; 761 762 assert(ct != -1); 763 764 thread_check_canaries(); 765 766 release_unused_kernel_stack(threads + ct, cpsr); 767 768 if (is_from_user(cpsr)) { 769 thread_user_save_vfp(); 770 tee_ta_update_session_utime_suspend(); 771 tee_ta_gprof_sample_pc(pc); 772 } 773 thread_lazy_restore_ns_vfp(); 774 775 lock_global(); 776 777 assert(threads[ct].state == THREAD_STATE_ACTIVE); 778 threads[ct].flags |= flags; 779 threads[ct].regs.cpsr = cpsr; 780 threads[ct].regs.pc = pc; 781 threads[ct].state = THREAD_STATE_SUSPENDED; 782 783 threads[ct].have_user_map = core_mmu_user_mapping_is_active(); 784 if (threads[ct].have_user_map) { 785 core_mmu_get_user_map(&threads[ct].user_map); 786 core_mmu_set_user_map(NULL); 787 } 788 789 l->curr_thread = -1; 790 791 #ifdef CFG_VIRTUALIZATION 792 virt_unset_guest(); 793 #endif 794 795 unlock_global(); 796 797 return ct; 798 } 799 800 #ifdef ARM32 801 static void set_tmp_stack(struct thread_core_local *l, vaddr_t sp) 802 { 803 l->tmp_stack_va_end = sp; 804 thread_set_irq_sp(sp); 805 thread_set_fiq_sp(sp); 806 } 807 808 static void set_abt_stack(struct thread_core_local *l, vaddr_t sp) 809 { 810 l->abt_stack_va_end = sp; 811 thread_set_abt_sp((vaddr_t)l); 812 thread_set_und_sp((vaddr_t)l); 813 } 814 #endif /*ARM32*/ 815 816 #ifdef ARM64 817 static void set_tmp_stack(struct thread_core_local *l, vaddr_t sp) 818 { 819 /* 820 * We're already using the tmp stack when this function is called 821 * so there's no need to assign it to any stack pointer. However, 822 * we'll need to restore it at different times so store it here. 823 */ 824 l->tmp_stack_va_end = sp; 825 } 826 827 static void set_abt_stack(struct thread_core_local *l, vaddr_t sp) 828 { 829 l->abt_stack_va_end = sp; 830 } 831 #endif /*ARM64*/ 832 833 bool thread_init_stack(uint32_t thread_id, vaddr_t sp) 834 { 835 if (thread_id >= CFG_NUM_THREADS) 836 return false; 837 threads[thread_id].stack_va_end = sp; 838 return true; 839 } 840 841 int thread_get_id_may_fail(void) 842 { 843 /* 844 * thread_get_core_local() requires foreign interrupts to be disabled 845 */ 846 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR); 847 struct thread_core_local *l = thread_get_core_local(); 848 int ct = l->curr_thread; 849 850 thread_unmask_exceptions(exceptions); 851 return ct; 852 } 853 854 int thread_get_id(void) 855 { 856 int ct = thread_get_id_may_fail(); 857 858 assert(ct >= 0 && ct < CFG_NUM_THREADS); 859 return ct; 860 } 861 862 static void init_handlers(const struct thread_handlers *handlers) 863 { 864 thread_std_smc_handler_ptr = handlers->std_smc; 865 thread_fast_smc_handler_ptr = handlers->fast_smc; 866 thread_nintr_handler_ptr = handlers->nintr; 867 thread_cpu_on_handler_ptr = handlers->cpu_on; 868 thread_cpu_off_handler_ptr = handlers->cpu_off; 869 thread_cpu_suspend_handler_ptr = handlers->cpu_suspend; 870 thread_cpu_resume_handler_ptr = handlers->cpu_resume; 871 thread_system_off_handler_ptr = handlers->system_off; 872 thread_system_reset_handler_ptr = handlers->system_reset; 873 } 874 875 #ifdef CFG_WITH_PAGER 876 static void init_thread_stacks(void) 877 { 878 size_t n; 879 880 /* 881 * Allocate virtual memory for thread stacks. 882 */ 883 for (n = 0; n < CFG_NUM_THREADS; n++) { 884 tee_mm_entry_t *mm; 885 vaddr_t sp; 886 887 /* Find vmem for thread stack and its protection gap */ 888 mm = tee_mm_alloc(&tee_mm_vcore, 889 SMALL_PAGE_SIZE + STACK_THREAD_SIZE); 890 assert(mm); 891 892 /* Claim eventual physical page */ 893 tee_pager_add_pages(tee_mm_get_smem(mm), tee_mm_get_size(mm), 894 true); 895 896 /* Add the area to the pager */ 897 tee_pager_add_core_area(tee_mm_get_smem(mm) + SMALL_PAGE_SIZE, 898 tee_mm_get_bytes(mm) - SMALL_PAGE_SIZE, 899 TEE_MATTR_PRW | TEE_MATTR_LOCKED, 900 NULL, NULL); 901 902 /* init effective stack */ 903 sp = tee_mm_get_smem(mm) + tee_mm_get_bytes(mm); 904 asan_tag_access((void *)tee_mm_get_smem(mm), (void *)sp); 905 if (!thread_init_stack(n, sp)) 906 panic("init stack failed"); 907 } 908 } 909 #else 910 static void init_thread_stacks(void) 911 { 912 size_t n; 913 914 /* Assign the thread stacks */ 915 for (n = 0; n < CFG_NUM_THREADS; n++) { 916 if (!thread_init_stack(n, GET_STACK(stack_thread[n]))) 917 panic("thread_init_stack failed"); 918 } 919 } 920 #endif /*CFG_WITH_PAGER*/ 921 922 static void init_user_kcode(void) 923 { 924 #ifdef CFG_CORE_UNMAP_CORE_AT_EL0 925 vaddr_t v = (vaddr_t)thread_excp_vect; 926 vaddr_t ve = (vaddr_t)thread_excp_vect_end; 927 928 thread_user_kcode_va = ROUNDDOWN(v, CORE_MMU_USER_CODE_SIZE); 929 ve = ROUNDUP(ve, CORE_MMU_USER_CODE_SIZE); 930 thread_user_kcode_size = ve - thread_user_kcode_va; 931 932 core_mmu_get_user_va_range(&v, NULL); 933 thread_user_kcode_offset = thread_user_kcode_va - v; 934 935 #if defined(CFG_CORE_WORKAROUND_SPECTRE_BP_SEC) && defined(ARM64) 936 /* 937 * When transitioning to EL0 subtract SP with this much to point to 938 * this special kdata page instead. SP is restored by add this much 939 * while transitioning back to EL1. 940 */ 941 v += thread_user_kcode_size; 942 thread_user_kdata_sp_offset = (vaddr_t)thread_core_local - v; 943 #endif 944 #endif /*CFG_CORE_UNMAP_CORE_AT_EL0*/ 945 } 946 947 void thread_init_threads(void) 948 { 949 size_t n; 950 951 init_thread_stacks(); 952 pgt_init(); 953 954 mutex_lockdep_init(); 955 956 for (n = 0; n < CFG_NUM_THREADS; n++) { 957 TAILQ_INIT(&threads[n].tsd.sess_stack); 958 SLIST_INIT(&threads[n].tsd.pgt_cache); 959 } 960 961 for (n = 0; n < CFG_TEE_CORE_NB_CORE; n++) 962 thread_core_local[n].curr_thread = -1; 963 } 964 965 void thread_init_primary(const struct thread_handlers *handlers) 966 { 967 init_handlers(handlers); 968 969 /* Initialize canaries around the stacks */ 970 init_canaries(); 971 972 init_user_kcode(); 973 } 974 975 static void init_sec_mon(size_t pos __maybe_unused) 976 { 977 #if !defined(CFG_WITH_ARM_TRUSTED_FW) 978 /* Initialize secure monitor */ 979 sm_init(GET_STACK(stack_tmp[pos])); 980 #endif 981 } 982 983 static uint32_t __maybe_unused get_midr_implementer(uint32_t midr) 984 { 985 return (midr >> MIDR_IMPLEMENTER_SHIFT) & MIDR_IMPLEMENTER_MASK; 986 } 987 988 static uint32_t __maybe_unused get_midr_primary_part(uint32_t midr) 989 { 990 return (midr >> MIDR_PRIMARY_PART_NUM_SHIFT) & 991 MIDR_PRIMARY_PART_NUM_MASK; 992 } 993 994 #ifdef ARM64 995 static bool probe_workaround_available(void) 996 { 997 int32_t r; 998 999 r = thread_smc(SMCCC_VERSION, 0, 0, 0); 1000 if (r < 0) 1001 return false; 1002 if (r < 0x10001) /* compare with version 1.1 */ 1003 return false; 1004 1005 /* Version >= 1.1, so SMCCC_ARCH_FEATURES is available */ 1006 r = thread_smc(SMCCC_ARCH_FEATURES, SMCCC_ARCH_WORKAROUND_1, 0, 0); 1007 return r >= 0; 1008 } 1009 1010 static vaddr_t __maybe_unused select_vector(vaddr_t a) 1011 { 1012 if (probe_workaround_available()) { 1013 DMSG("SMCCC_ARCH_WORKAROUND_1 (%#08" PRIx32 ") available", 1014 SMCCC_ARCH_WORKAROUND_1); 1015 DMSG("SMC Workaround for CVE-2017-5715 used"); 1016 return a; 1017 } 1018 1019 DMSG("SMCCC_ARCH_WORKAROUND_1 (%#08" PRIx32 ") unavailable", 1020 SMCCC_ARCH_WORKAROUND_1); 1021 DMSG("SMC Workaround for CVE-2017-5715 not needed (if ARM-TF is up to date)"); 1022 return (vaddr_t)thread_excp_vect; 1023 } 1024 #else 1025 static vaddr_t __maybe_unused select_vector(vaddr_t a) 1026 { 1027 return a; 1028 } 1029 #endif 1030 1031 static vaddr_t get_excp_vect(void) 1032 { 1033 #ifdef CFG_CORE_WORKAROUND_SPECTRE_BP_SEC 1034 uint32_t midr = read_midr(); 1035 1036 if (get_midr_implementer(midr) != MIDR_IMPLEMENTER_ARM) 1037 return (vaddr_t)thread_excp_vect; 1038 1039 switch (get_midr_primary_part(midr)) { 1040 #ifdef ARM32 1041 case CORTEX_A8_PART_NUM: 1042 case CORTEX_A9_PART_NUM: 1043 case CORTEX_A17_PART_NUM: 1044 #endif 1045 case CORTEX_A57_PART_NUM: 1046 case CORTEX_A72_PART_NUM: 1047 case CORTEX_A73_PART_NUM: 1048 case CORTEX_A75_PART_NUM: 1049 return select_vector((vaddr_t)thread_excp_vect_workaround); 1050 #ifdef ARM32 1051 case CORTEX_A15_PART_NUM: 1052 return select_vector((vaddr_t)thread_excp_vect_workaround_a15); 1053 #endif 1054 default: 1055 return (vaddr_t)thread_excp_vect; 1056 } 1057 #endif /*CFG_CORE_WORKAROUND_SPECTRE_BP_SEC*/ 1058 1059 return (vaddr_t)thread_excp_vect; 1060 } 1061 1062 void thread_init_per_cpu(void) 1063 { 1064 size_t pos = get_core_pos(); 1065 struct thread_core_local *l = thread_get_core_local(); 1066 1067 init_sec_mon(pos); 1068 1069 set_tmp_stack(l, GET_STACK(stack_tmp[pos]) - STACK_TMP_OFFS); 1070 set_abt_stack(l, GET_STACK(stack_abt[pos])); 1071 1072 thread_init_vbar(get_excp_vect()); 1073 } 1074 1075 struct thread_specific_data *thread_get_tsd(void) 1076 { 1077 return &threads[thread_get_id()].tsd; 1078 } 1079 1080 struct thread_ctx_regs *thread_get_ctx_regs(void) 1081 { 1082 struct thread_core_local *l = thread_get_core_local(); 1083 1084 assert(l->curr_thread != -1); 1085 return &threads[l->curr_thread].regs; 1086 } 1087 1088 void thread_set_foreign_intr(bool enable) 1089 { 1090 /* thread_get_core_local() requires foreign interrupts to be disabled */ 1091 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR); 1092 struct thread_core_local *l; 1093 1094 l = thread_get_core_local(); 1095 1096 assert(l->curr_thread != -1); 1097 1098 if (enable) { 1099 threads[l->curr_thread].flags |= 1100 THREAD_FLAGS_FOREIGN_INTR_ENABLE; 1101 thread_set_exceptions(exceptions & ~THREAD_EXCP_FOREIGN_INTR); 1102 } else { 1103 /* 1104 * No need to disable foreign interrupts here since they're 1105 * already disabled above. 1106 */ 1107 threads[l->curr_thread].flags &= 1108 ~THREAD_FLAGS_FOREIGN_INTR_ENABLE; 1109 } 1110 } 1111 1112 void thread_restore_foreign_intr(void) 1113 { 1114 /* thread_get_core_local() requires foreign interrupts to be disabled */ 1115 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR); 1116 struct thread_core_local *l; 1117 1118 l = thread_get_core_local(); 1119 1120 assert(l->curr_thread != -1); 1121 1122 if (threads[l->curr_thread].flags & THREAD_FLAGS_FOREIGN_INTR_ENABLE) 1123 thread_set_exceptions(exceptions & ~THREAD_EXCP_FOREIGN_INTR); 1124 } 1125 1126 #ifdef CFG_WITH_VFP 1127 uint32_t thread_kernel_enable_vfp(void) 1128 { 1129 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR); 1130 struct thread_ctx *thr = threads + thread_get_id(); 1131 struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp; 1132 1133 assert(!vfp_is_enabled()); 1134 1135 if (!thr->vfp_state.ns_saved) { 1136 vfp_lazy_save_state_final(&thr->vfp_state.ns, 1137 true /*force_save*/); 1138 thr->vfp_state.ns_saved = true; 1139 } else if (thr->vfp_state.sec_lazy_saved && 1140 !thr->vfp_state.sec_saved) { 1141 /* 1142 * This happens when we're handling an abort while the 1143 * thread was using the VFP state. 1144 */ 1145 vfp_lazy_save_state_final(&thr->vfp_state.sec, 1146 false /*!force_save*/); 1147 thr->vfp_state.sec_saved = true; 1148 } else if (tuv && tuv->lazy_saved && !tuv->saved) { 1149 /* 1150 * This can happen either during syscall or abort 1151 * processing (while processing a syscall). 1152 */ 1153 vfp_lazy_save_state_final(&tuv->vfp, false /*!force_save*/); 1154 tuv->saved = true; 1155 } 1156 1157 vfp_enable(); 1158 return exceptions; 1159 } 1160 1161 void thread_kernel_disable_vfp(uint32_t state) 1162 { 1163 uint32_t exceptions; 1164 1165 assert(vfp_is_enabled()); 1166 1167 vfp_disable(); 1168 exceptions = thread_get_exceptions(); 1169 assert(exceptions & THREAD_EXCP_FOREIGN_INTR); 1170 exceptions &= ~THREAD_EXCP_FOREIGN_INTR; 1171 exceptions |= state & THREAD_EXCP_FOREIGN_INTR; 1172 thread_set_exceptions(exceptions); 1173 } 1174 1175 void thread_kernel_save_vfp(void) 1176 { 1177 struct thread_ctx *thr = threads + thread_get_id(); 1178 1179 assert(thread_get_exceptions() & THREAD_EXCP_FOREIGN_INTR); 1180 if (vfp_is_enabled()) { 1181 vfp_lazy_save_state_init(&thr->vfp_state.sec); 1182 thr->vfp_state.sec_lazy_saved = true; 1183 } 1184 } 1185 1186 void thread_kernel_restore_vfp(void) 1187 { 1188 struct thread_ctx *thr = threads + thread_get_id(); 1189 1190 assert(thread_get_exceptions() & THREAD_EXCP_FOREIGN_INTR); 1191 assert(!vfp_is_enabled()); 1192 if (thr->vfp_state.sec_lazy_saved) { 1193 vfp_lazy_restore_state(&thr->vfp_state.sec, 1194 thr->vfp_state.sec_saved); 1195 thr->vfp_state.sec_saved = false; 1196 thr->vfp_state.sec_lazy_saved = false; 1197 } 1198 } 1199 1200 void thread_user_enable_vfp(struct thread_user_vfp_state *uvfp) 1201 { 1202 struct thread_ctx *thr = threads + thread_get_id(); 1203 struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp; 1204 1205 assert(thread_get_exceptions() & THREAD_EXCP_FOREIGN_INTR); 1206 assert(!vfp_is_enabled()); 1207 1208 if (!thr->vfp_state.ns_saved) { 1209 vfp_lazy_save_state_final(&thr->vfp_state.ns, 1210 true /*force_save*/); 1211 thr->vfp_state.ns_saved = true; 1212 } else if (tuv && uvfp != tuv) { 1213 if (tuv->lazy_saved && !tuv->saved) { 1214 vfp_lazy_save_state_final(&tuv->vfp, 1215 false /*!force_save*/); 1216 tuv->saved = true; 1217 } 1218 } 1219 1220 if (uvfp->lazy_saved) 1221 vfp_lazy_restore_state(&uvfp->vfp, uvfp->saved); 1222 uvfp->lazy_saved = false; 1223 uvfp->saved = false; 1224 1225 thr->vfp_state.uvfp = uvfp; 1226 vfp_enable(); 1227 } 1228 1229 void thread_user_save_vfp(void) 1230 { 1231 struct thread_ctx *thr = threads + thread_get_id(); 1232 struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp; 1233 1234 assert(thread_get_exceptions() & THREAD_EXCP_FOREIGN_INTR); 1235 if (!vfp_is_enabled()) 1236 return; 1237 1238 assert(tuv && !tuv->lazy_saved && !tuv->saved); 1239 vfp_lazy_save_state_init(&tuv->vfp); 1240 tuv->lazy_saved = true; 1241 } 1242 1243 void thread_user_clear_vfp(struct thread_user_vfp_state *uvfp) 1244 { 1245 struct thread_ctx *thr = threads + thread_get_id(); 1246 1247 if (uvfp == thr->vfp_state.uvfp) 1248 thr->vfp_state.uvfp = NULL; 1249 uvfp->lazy_saved = false; 1250 uvfp->saved = false; 1251 } 1252 #endif /*CFG_WITH_VFP*/ 1253 1254 #ifdef ARM32 1255 static bool get_spsr(bool is_32bit, unsigned long entry_func, uint32_t *spsr) 1256 { 1257 uint32_t s; 1258 1259 if (!is_32bit) 1260 return false; 1261 1262 s = read_spsr(); 1263 s &= ~(CPSR_MODE_MASK | CPSR_T | CPSR_IT_MASK1 | CPSR_IT_MASK2); 1264 s |= CPSR_MODE_USR; 1265 if (entry_func & 1) 1266 s |= CPSR_T; 1267 *spsr = s; 1268 return true; 1269 } 1270 #endif 1271 1272 #ifdef ARM64 1273 static bool get_spsr(bool is_32bit, unsigned long entry_func, uint32_t *spsr) 1274 { 1275 uint32_t s; 1276 1277 if (is_32bit) { 1278 s = read_daif() & (SPSR_32_AIF_MASK << SPSR_32_AIF_SHIFT); 1279 s |= SPSR_MODE_RW_32 << SPSR_MODE_RW_SHIFT; 1280 s |= (entry_func & SPSR_32_T_MASK) << SPSR_32_T_SHIFT; 1281 } else { 1282 s = read_daif() & (SPSR_64_DAIF_MASK << SPSR_64_DAIF_SHIFT); 1283 } 1284 1285 *spsr = s; 1286 return true; 1287 } 1288 #endif 1289 1290 uint32_t thread_enter_user_mode(unsigned long a0, unsigned long a1, 1291 unsigned long a2, unsigned long a3, unsigned long user_sp, 1292 unsigned long entry_func, bool is_32bit, 1293 uint32_t *exit_status0, uint32_t *exit_status1) 1294 { 1295 uint32_t spsr; 1296 1297 tee_ta_update_session_utime_resume(); 1298 1299 if (!get_spsr(is_32bit, entry_func, &spsr)) { 1300 *exit_status0 = 1; /* panic */ 1301 *exit_status1 = 0xbadbadba; 1302 return 0; 1303 } 1304 return __thread_enter_user_mode(a0, a1, a2, a3, user_sp, entry_func, 1305 spsr, exit_status0, exit_status1); 1306 } 1307 1308 #ifdef CFG_CORE_UNMAP_CORE_AT_EL0 1309 void thread_get_user_kcode(struct mobj **mobj, size_t *offset, 1310 vaddr_t *va, size_t *sz) 1311 { 1312 core_mmu_get_user_va_range(va, NULL); 1313 *mobj = mobj_tee_ram; 1314 *offset = thread_user_kcode_va - TEE_RAM_START; 1315 *sz = thread_user_kcode_size; 1316 } 1317 #endif 1318 1319 #if defined(CFG_CORE_UNMAP_CORE_AT_EL0) && \ 1320 defined(CFG_CORE_WORKAROUND_SPECTRE_BP_SEC) && defined(ARM64) 1321 void thread_get_user_kdata(struct mobj **mobj, size_t *offset, 1322 vaddr_t *va, size_t *sz) 1323 { 1324 vaddr_t v; 1325 1326 core_mmu_get_user_va_range(&v, NULL); 1327 *va = v + thread_user_kcode_size; 1328 *mobj = mobj_tee_ram; 1329 *offset = (vaddr_t)thread_user_kdata_page - TEE_RAM_START; 1330 *sz = sizeof(thread_user_kdata_page); 1331 } 1332 #endif 1333 1334 bool thread_disable_prealloc_rpc_cache(uint64_t *cookie) 1335 { 1336 bool rv; 1337 size_t n; 1338 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR); 1339 1340 lock_global(); 1341 1342 for (n = 0; n < CFG_NUM_THREADS; n++) { 1343 if (threads[n].state != THREAD_STATE_FREE) { 1344 rv = false; 1345 goto out; 1346 } 1347 } 1348 1349 rv = true; 1350 for (n = 0; n < CFG_NUM_THREADS; n++) { 1351 if (threads[n].rpc_arg) { 1352 *cookie = mobj_get_cookie(threads[n].rpc_mobj); 1353 mobj_free(threads[n].rpc_mobj); 1354 threads[n].rpc_arg = NULL; 1355 goto out; 1356 } 1357 } 1358 1359 *cookie = 0; 1360 thread_prealloc_rpc_cache = false; 1361 out: 1362 unlock_global(); 1363 thread_unmask_exceptions(exceptions); 1364 return rv; 1365 } 1366 1367 bool thread_enable_prealloc_rpc_cache(void) 1368 { 1369 bool rv; 1370 size_t n; 1371 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR); 1372 1373 lock_global(); 1374 1375 for (n = 0; n < CFG_NUM_THREADS; n++) { 1376 if (threads[n].state != THREAD_STATE_FREE) { 1377 rv = false; 1378 goto out; 1379 } 1380 } 1381 1382 rv = true; 1383 thread_prealloc_rpc_cache = true; 1384 out: 1385 unlock_global(); 1386 thread_unmask_exceptions(exceptions); 1387 return rv; 1388 } 1389 1390 /** 1391 * Allocates data for struct optee_msg_arg. 1392 * 1393 * @size: size in bytes of struct optee_msg_arg 1394 * 1395 * @returns mobj that describes allocated buffer or NULL on error 1396 */ 1397 static struct mobj *thread_rpc_alloc_arg(size_t size) 1398 { 1399 paddr_t pa; 1400 uint64_t co; 1401 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { 1402 OPTEE_SMC_RETURN_RPC_ALLOC, size 1403 }; 1404 struct mobj *mobj = NULL; 1405 1406 thread_rpc(rpc_args); 1407 1408 pa = reg_pair_to_64(rpc_args[1], rpc_args[2]); 1409 co = reg_pair_to_64(rpc_args[4], rpc_args[5]); 1410 1411 if (!ALIGNMENT_IS_OK(pa, struct optee_msg_arg)) 1412 goto err; 1413 1414 /* Check if this region is in static shared space */ 1415 if (core_pbuf_is(CORE_MEM_NSEC_SHM, pa, size)) 1416 mobj = mobj_shm_alloc(pa, size, co); 1417 else if ((!(pa & SMALL_PAGE_MASK)) && size <= SMALL_PAGE_SIZE) 1418 mobj = mobj_mapped_shm_alloc(&pa, 1, 0, co); 1419 1420 if (!mobj) 1421 goto err; 1422 1423 return mobj; 1424 err: 1425 thread_rpc_free_arg(co); 1426 mobj_free(mobj); 1427 return NULL; 1428 } 1429 1430 static bool set_rmem(struct optee_msg_param *param, 1431 struct thread_param *tpm) 1432 { 1433 param->attr = tpm->attr - THREAD_PARAM_ATTR_MEMREF_IN + 1434 OPTEE_MSG_ATTR_TYPE_RMEM_INPUT; 1435 param->u.rmem.offs = tpm->u.memref.offs; 1436 param->u.rmem.size = tpm->u.memref.size; 1437 if (tpm->u.memref.mobj) { 1438 param->u.rmem.shm_ref = mobj_get_cookie(tpm->u.memref.mobj); 1439 if (!param->u.rmem.shm_ref) 1440 return false; 1441 } else { 1442 param->u.rmem.shm_ref = 0; 1443 } 1444 1445 return true; 1446 } 1447 1448 static bool set_tmem(struct optee_msg_param *param, 1449 struct thread_param *tpm) 1450 { 1451 paddr_t pa = 0; 1452 uint64_t shm_ref = 0; 1453 struct mobj *mobj = tpm->u.memref.mobj; 1454 1455 param->attr = tpm->attr - THREAD_PARAM_ATTR_MEMREF_IN + 1456 OPTEE_MSG_ATTR_TYPE_TMEM_INPUT; 1457 if (mobj) { 1458 shm_ref = mobj_get_cookie(mobj); 1459 if (!shm_ref) 1460 return false; 1461 if (mobj_get_pa(mobj, tpm->u.memref.offs, 0, &pa)) 1462 return false; 1463 } 1464 1465 param->u.tmem.size = tpm->u.memref.size; 1466 param->u.tmem.buf_ptr = pa; 1467 param->u.tmem.shm_ref = shm_ref; 1468 1469 return true; 1470 } 1471 1472 static uint32_t get_rpc_arg(uint32_t cmd, size_t num_params, 1473 struct thread_param *params, void **arg_ret, 1474 uint64_t *carg_ret) 1475 { 1476 struct thread_ctx *thr = threads + thread_get_id(); 1477 struct optee_msg_arg *arg = thr->rpc_arg; 1478 size_t sz = OPTEE_MSG_GET_ARG_SIZE(THREAD_RPC_MAX_NUM_PARAMS); 1479 1480 if (num_params > THREAD_RPC_MAX_NUM_PARAMS) 1481 return TEE_ERROR_BAD_PARAMETERS; 1482 1483 if (!arg) { 1484 struct mobj *mobj = thread_rpc_alloc_arg(sz); 1485 1486 if (!mobj) 1487 return TEE_ERROR_OUT_OF_MEMORY; 1488 1489 arg = mobj_get_va(mobj, 0); 1490 if (!arg) { 1491 thread_rpc_free_arg(mobj_get_cookie(mobj)); 1492 return TEE_ERROR_OUT_OF_MEMORY; 1493 } 1494 1495 thr->rpc_arg = arg; 1496 thr->rpc_mobj = mobj; 1497 } 1498 1499 memset(arg, 0, OPTEE_MSG_GET_ARG_SIZE(num_params)); 1500 arg->cmd = cmd; 1501 arg->num_params = num_params; 1502 arg->ret = TEE_ERROR_GENERIC; /* in case value isn't updated */ 1503 1504 for (size_t n = 0; n < num_params; n++) { 1505 switch (params[n].attr) { 1506 case THREAD_PARAM_ATTR_NONE: 1507 arg->params[n].attr = OPTEE_MSG_ATTR_TYPE_NONE; 1508 break; 1509 case THREAD_PARAM_ATTR_VALUE_IN: 1510 case THREAD_PARAM_ATTR_VALUE_OUT: 1511 case THREAD_PARAM_ATTR_VALUE_INOUT: 1512 arg->params[n].attr = params[n].attr - 1513 THREAD_PARAM_ATTR_VALUE_IN + 1514 OPTEE_MSG_ATTR_TYPE_VALUE_INPUT; 1515 arg->params[n].u.value.a = params[n].u.value.a; 1516 arg->params[n].u.value.b = params[n].u.value.b; 1517 arg->params[n].u.value.c = params[n].u.value.c; 1518 break; 1519 case THREAD_PARAM_ATTR_MEMREF_IN: 1520 case THREAD_PARAM_ATTR_MEMREF_OUT: 1521 case THREAD_PARAM_ATTR_MEMREF_INOUT: 1522 if (!params[n].u.memref.mobj || 1523 mobj_matches(params[n].u.memref.mobj, 1524 CORE_MEM_NSEC_SHM)) { 1525 if (!set_tmem(arg->params + n, params + n)) 1526 return TEE_ERROR_BAD_PARAMETERS; 1527 } else if (mobj_matches(params[n].u.memref.mobj, 1528 CORE_MEM_REG_SHM)) { 1529 if (!set_rmem(arg->params + n, params + n)) 1530 return TEE_ERROR_BAD_PARAMETERS; 1531 } else { 1532 return TEE_ERROR_BAD_PARAMETERS; 1533 } 1534 break; 1535 default: 1536 return TEE_ERROR_BAD_PARAMETERS; 1537 } 1538 } 1539 1540 *arg_ret = arg; 1541 *carg_ret = mobj_get_cookie(thr->rpc_mobj); 1542 1543 return TEE_SUCCESS; 1544 } 1545 1546 static uint32_t get_rpc_arg_res(struct optee_msg_arg *arg, size_t num_params, 1547 struct thread_param *params) 1548 { 1549 for (size_t n = 0; n < num_params; n++) { 1550 switch (params[n].attr) { 1551 case THREAD_PARAM_ATTR_VALUE_OUT: 1552 case THREAD_PARAM_ATTR_VALUE_INOUT: 1553 params[n].u.value.a = arg->params[n].u.value.a; 1554 params[n].u.value.b = arg->params[n].u.value.b; 1555 params[n].u.value.c = arg->params[n].u.value.c; 1556 break; 1557 case THREAD_PARAM_ATTR_MEMREF_OUT: 1558 case THREAD_PARAM_ATTR_MEMREF_INOUT: 1559 /* 1560 * rmem.size and tmem.size is the same type and 1561 * location. 1562 */ 1563 params[n].u.memref.size = arg->params[n].u.rmem.size; 1564 break; 1565 default: 1566 break; 1567 } 1568 } 1569 1570 return arg->ret; 1571 } 1572 1573 uint32_t thread_rpc_cmd(uint32_t cmd, size_t num_params, 1574 struct thread_param *params) 1575 { 1576 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { OPTEE_SMC_RETURN_RPC_CMD }; 1577 void *arg = NULL; 1578 uint64_t carg = 0; 1579 uint32_t ret = 0; 1580 1581 /* The source CRYPTO_RNG_SRC_JITTER_RPC is safe to use here */ 1582 plat_prng_add_jitter_entropy(CRYPTO_RNG_SRC_JITTER_RPC, 1583 &thread_rpc_pnum); 1584 1585 ret = get_rpc_arg(cmd, num_params, params, &arg, &carg); 1586 if (ret) 1587 return ret; 1588 1589 reg_pair_from_64(carg, rpc_args + 1, rpc_args + 2); 1590 thread_rpc(rpc_args); 1591 1592 return get_rpc_arg_res(arg, num_params, params); 1593 } 1594 1595 /** 1596 * Free physical memory previously allocated with thread_rpc_alloc() 1597 * 1598 * @cookie: cookie received when allocating the buffer 1599 * @bt: must be the same as supplied when allocating 1600 * @mobj: mobj that describes allocated buffer 1601 * 1602 * This function also frees corresponding mobj. 1603 */ 1604 static void thread_rpc_free(unsigned int bt, uint64_t cookie, struct mobj *mobj) 1605 { 1606 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { OPTEE_SMC_RETURN_RPC_CMD }; 1607 void *arg = NULL; 1608 uint64_t carg = 0; 1609 struct thread_param param = THREAD_PARAM_VALUE(IN, bt, cookie, 0); 1610 uint32_t ret = get_rpc_arg(OPTEE_RPC_CMD_SHM_FREE, 1, ¶m, 1611 &arg, &carg); 1612 1613 mobj_free(mobj); 1614 1615 if (!ret) { 1616 reg_pair_from_64(carg, rpc_args + 1, rpc_args + 2); 1617 thread_rpc(rpc_args); 1618 } 1619 } 1620 1621 static struct mobj *get_rpc_alloc_res(struct optee_msg_arg *arg, 1622 unsigned int bt) 1623 { 1624 struct mobj *mobj = NULL; 1625 uint64_t cookie = 0; 1626 1627 if (arg->ret || arg->num_params != 1) 1628 return NULL; 1629 1630 if (arg->params[0].attr == OPTEE_MSG_ATTR_TYPE_TMEM_OUTPUT) { 1631 cookie = arg->params[0].u.tmem.shm_ref; 1632 mobj = mobj_shm_alloc(arg->params[0].u.tmem.buf_ptr, 1633 arg->params[0].u.tmem.size, 1634 cookie); 1635 } else if (arg->params[0].attr == (OPTEE_MSG_ATTR_TYPE_TMEM_OUTPUT | 1636 OPTEE_MSG_ATTR_NONCONTIG)) { 1637 cookie = arg->params[0].u.tmem.shm_ref; 1638 mobj = msg_param_mobj_from_noncontig( 1639 arg->params[0].u.tmem.buf_ptr, 1640 arg->params[0].u.tmem.size, 1641 cookie, 1642 true); 1643 } else { 1644 return NULL; 1645 } 1646 1647 if (!mobj) { 1648 thread_rpc_free(bt, cookie, mobj); 1649 return NULL; 1650 } 1651 1652 assert(mobj_is_nonsec(mobj)); 1653 1654 return mobj; 1655 } 1656 1657 /** 1658 * Allocates shared memory buffer via RPC 1659 * 1660 * @size: size in bytes of shared memory buffer 1661 * @align: required alignment of buffer 1662 * @bt: buffer type OPTEE_RPC_SHM_TYPE_* 1663 * 1664 * Returns a pointer to MOBJ for the memory on success, or NULL on failure. 1665 */ 1666 static struct mobj *thread_rpc_alloc(size_t size, size_t align, unsigned int bt) 1667 { 1668 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { OPTEE_SMC_RETURN_RPC_CMD }; 1669 void *arg = NULL; 1670 uint64_t carg = 0; 1671 struct thread_param param = THREAD_PARAM_VALUE(IN, bt, size, align); 1672 uint32_t ret = get_rpc_arg(OPTEE_RPC_CMD_SHM_ALLOC, 1, ¶m, 1673 &arg, &carg); 1674 1675 if (ret) 1676 return NULL; 1677 1678 reg_pair_from_64(carg, rpc_args + 1, rpc_args + 2); 1679 thread_rpc(rpc_args); 1680 1681 return get_rpc_alloc_res(arg, bt); 1682 } 1683 1684 struct mobj *thread_rpc_alloc_payload(size_t size) 1685 { 1686 return thread_rpc_alloc(size, 8, OPTEE_RPC_SHM_TYPE_APPL); 1687 } 1688 1689 void thread_rpc_free_payload(struct mobj *mobj) 1690 { 1691 thread_rpc_free(OPTEE_RPC_SHM_TYPE_APPL, mobj_get_cookie(mobj), 1692 mobj); 1693 } 1694 1695 struct mobj *thread_rpc_alloc_global_payload(size_t size) 1696 { 1697 return thread_rpc_alloc(size, 8, OPTEE_RPC_SHM_TYPE_GLOBAL); 1698 } 1699 1700 void thread_rpc_free_global_payload(struct mobj *mobj) 1701 { 1702 thread_rpc_free(OPTEE_RPC_SHM_TYPE_GLOBAL, mobj_get_cookie(mobj), 1703 mobj); 1704 } 1705