1 /* 2 * Copyright (c) 2014, STMicroelectronics International N.V. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, 9 * this list of conditions and the following disclaimer. 10 * 11 * 2. Redistributions in binary form must reproduce the above copyright notice, 12 * this list of conditions and the following disclaimer in the documentation 13 * and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 */ 27 #include <platform_config.h> 28 29 #include <kernel/panic.h> 30 #include <kernel/thread.h> 31 #include <kernel/thread_defs.h> 32 #include "thread_private.h" 33 #include <sm/sm_defs.h> 34 #include <sm/sm.h> 35 #include <sm/teesmc.h> 36 #include <sm/teesmc_optee.h> 37 #include <arm.h> 38 #include <kernel/tz_proc_def.h> 39 #include <kernel/tz_proc.h> 40 #include <kernel/misc.h> 41 #include <mm/tee_mmu.h> 42 #include <mm/tee_mmu_defs.h> 43 #include <mm/tee_mm.h> 44 #include <mm/tee_pager.h> 45 #include <kernel/tee_ta_manager.h> 46 #include <util.h> 47 #include <trace.h> 48 49 #include <assert.h> 50 51 #ifdef ARM32 52 #define STACK_TMP_SIZE 1024 53 #define STACK_THREAD_SIZE 8192 54 55 #if TRACE_LEVEL > 0 56 #define STACK_ABT_SIZE 2048 57 #else 58 #define STACK_ABT_SIZE 1024 59 #endif 60 61 #endif /*ARM32*/ 62 63 #ifdef ARM64 64 #define STACK_TMP_SIZE 2048 65 #define STACK_THREAD_SIZE 8192 66 67 #if TRACE_LEVEL > 0 68 #define STACK_ABT_SIZE 3072 69 #else 70 #define STACK_ABT_SIZE 1024 71 #endif 72 #endif /*ARM64*/ 73 74 #define RPC_MAX_PARAMS 2 75 76 /* 77 * The big lock for threads. Since OP-TEE currently is single threaded 78 * all standard calls (non-fast calls) must take this mutex before starting 79 * to do any real work. 80 */ 81 static struct mutex thread_big_lock = MUTEX_INITIALIZER; 82 83 struct thread_ctx threads[CFG_NUM_THREADS]; 84 85 static struct thread_core_local thread_core_local[CFG_TEE_CORE_NB_CORE]; 86 87 #ifdef CFG_WITH_VFP 88 struct thread_vfp_state { 89 bool ns_saved; 90 bool sec_saved; 91 bool sec_lazy_saved; 92 struct vfp_state ns; 93 struct vfp_state sec; 94 }; 95 96 static struct thread_vfp_state thread_vfp_state; 97 #endif /*CFG_WITH_VFP*/ 98 99 #ifdef CFG_WITH_STACK_CANARIES 100 #ifdef ARM32 101 #define STACK_CANARY_SIZE (4 * sizeof(uint32_t)) 102 #endif 103 #ifdef ARM64 104 #define STACK_CANARY_SIZE (8 * sizeof(uint32_t)) 105 #endif 106 #define START_CANARY_VALUE 0xdededede 107 #define END_CANARY_VALUE 0xabababab 108 #define GET_START_CANARY(name, stack_num) name[stack_num][0] 109 #define GET_END_CANARY(name, stack_num) \ 110 name[stack_num][sizeof(name[stack_num]) / sizeof(uint32_t) - 1] 111 #else 112 #define STACK_CANARY_SIZE 0 113 #endif 114 115 #define DECLARE_STACK(name, num_stacks, stack_size) \ 116 static uint32_t name[num_stacks][ \ 117 ROUNDUP(stack_size + STACK_CANARY_SIZE, STACK_ALIGNMENT) / \ 118 sizeof(uint32_t)] \ 119 __attribute__((section(".nozi.stack"), \ 120 aligned(STACK_ALIGNMENT))) 121 122 #define GET_STACK(stack) \ 123 ((vaddr_t)(stack) + sizeof(stack) - STACK_CANARY_SIZE / 2) 124 125 DECLARE_STACK(stack_tmp, CFG_TEE_CORE_NB_CORE, STACK_TMP_SIZE); 126 DECLARE_STACK(stack_abt, CFG_TEE_CORE_NB_CORE, STACK_ABT_SIZE); 127 #if !defined(CFG_WITH_ARM_TRUSTED_FW) 128 DECLARE_STACK(stack_sm, CFG_TEE_CORE_NB_CORE, SM_STACK_SIZE); 129 #endif 130 #ifndef CFG_WITH_PAGER 131 DECLARE_STACK(stack_thread, CFG_NUM_THREADS, STACK_THREAD_SIZE); 132 #endif 133 134 const vaddr_t stack_tmp_top[CFG_TEE_CORE_NB_CORE] = { 135 GET_STACK(stack_tmp[0]), 136 #if CFG_TEE_CORE_NB_CORE > 1 137 GET_STACK(stack_tmp[1]), 138 #endif 139 #if CFG_TEE_CORE_NB_CORE > 2 140 GET_STACK(stack_tmp[2]), 141 #endif 142 #if CFG_TEE_CORE_NB_CORE > 3 143 GET_STACK(stack_tmp[3]), 144 #endif 145 #if CFG_TEE_CORE_NB_CORE > 4 146 GET_STACK(stack_tmp[4]), 147 #endif 148 #if CFG_TEE_CORE_NB_CORE > 5 149 GET_STACK(stack_tmp[5]), 150 #endif 151 #if CFG_TEE_CORE_NB_CORE > 6 152 GET_STACK(stack_tmp[6]), 153 #endif 154 #if CFG_TEE_CORE_NB_CORE > 7 155 GET_STACK(stack_tmp[7]), 156 #endif 157 #if CFG_TEE_CORE_NB_CORE > 8 158 #error "Top of tmp stacks aren't defined for more than 8 CPUS" 159 #endif 160 }; 161 162 thread_smc_handler_t thread_std_smc_handler_ptr; 163 static thread_smc_handler_t thread_fast_smc_handler_ptr; 164 thread_fiq_handler_t thread_fiq_handler_ptr; 165 thread_svc_handler_t thread_svc_handler_ptr; 166 static thread_abort_handler_t thread_abort_handler_ptr; 167 thread_pm_handler_t thread_cpu_on_handler_ptr; 168 thread_pm_handler_t thread_cpu_off_handler_ptr; 169 thread_pm_handler_t thread_cpu_suspend_handler_ptr; 170 thread_pm_handler_t thread_cpu_resume_handler_ptr; 171 thread_pm_handler_t thread_system_off_handler_ptr; 172 thread_pm_handler_t thread_system_reset_handler_ptr; 173 174 175 static unsigned int thread_global_lock = SPINLOCK_UNLOCK; 176 177 static void init_canaries(void) 178 { 179 #ifdef CFG_WITH_STACK_CANARIES 180 size_t n; 181 #define INIT_CANARY(name) \ 182 for (n = 0; n < ARRAY_SIZE(name); n++) { \ 183 uint32_t *start_canary = &GET_START_CANARY(name, n); \ 184 uint32_t *end_canary = &GET_END_CANARY(name, n); \ 185 \ 186 *start_canary = START_CANARY_VALUE; \ 187 *end_canary = END_CANARY_VALUE; \ 188 DMSG("#Stack canaries for %s[%zu] with top at %p\n", \ 189 #name, n, (void *)(end_canary - 1)); \ 190 DMSG("watch *%p\n", (void *)end_canary); \ 191 } 192 193 INIT_CANARY(stack_tmp); 194 INIT_CANARY(stack_abt); 195 #if !defined(CFG_WITH_ARM_TRUSTED_FW) 196 INIT_CANARY(stack_sm); 197 #endif 198 #ifndef CFG_WITH_PAGER 199 INIT_CANARY(stack_thread); 200 #endif 201 #endif/*CFG_WITH_STACK_CANARIES*/ 202 } 203 204 void thread_check_canaries(void) 205 { 206 #ifdef CFG_WITH_STACK_CANARIES 207 size_t n; 208 209 for (n = 0; n < ARRAY_SIZE(stack_tmp); n++) { 210 assert(GET_START_CANARY(stack_tmp, n) == START_CANARY_VALUE); 211 assert(GET_END_CANARY(stack_tmp, n) == END_CANARY_VALUE); 212 } 213 214 for (n = 0; n < ARRAY_SIZE(stack_abt); n++) { 215 assert(GET_START_CANARY(stack_abt, n) == START_CANARY_VALUE); 216 assert(GET_END_CANARY(stack_abt, n) == END_CANARY_VALUE); 217 } 218 #if !defined(CFG_WITH_ARM_TRUSTED_FW) 219 for (n = 0; n < ARRAY_SIZE(stack_sm); n++) { 220 assert(GET_START_CANARY(stack_sm, n) == START_CANARY_VALUE); 221 assert(GET_END_CANARY(stack_sm, n) == END_CANARY_VALUE); 222 } 223 #endif 224 #ifndef CFG_WITH_PAGER 225 for (n = 0; n < ARRAY_SIZE(stack_thread); n++) { 226 assert(GET_START_CANARY(stack_thread, n) == START_CANARY_VALUE); 227 assert(GET_END_CANARY(stack_thread, n) == END_CANARY_VALUE); 228 } 229 #endif 230 #endif/*CFG_WITH_STACK_CANARIES*/ 231 } 232 233 static void lock_global(void) 234 { 235 cpu_spin_lock(&thread_global_lock); 236 } 237 238 static void unlock_global(void) 239 { 240 cpu_spin_unlock(&thread_global_lock); 241 } 242 243 #ifdef ARM32 244 uint32_t thread_get_exceptions(void) 245 { 246 uint32_t cpsr = read_cpsr(); 247 248 return (cpsr >> CPSR_F_SHIFT) & THREAD_EXCP_ALL; 249 } 250 251 void thread_set_exceptions(uint32_t exceptions) 252 { 253 uint32_t cpsr = read_cpsr(); 254 255 cpsr &= ~(THREAD_EXCP_ALL << CPSR_F_SHIFT); 256 cpsr |= ((exceptions & THREAD_EXCP_ALL) << CPSR_F_SHIFT); 257 write_cpsr(cpsr); 258 } 259 #endif /*ARM32*/ 260 261 #ifdef ARM64 262 uint32_t thread_get_exceptions(void) 263 { 264 uint32_t daif = read_daif(); 265 266 return (daif >> DAIF_F_SHIFT) & THREAD_EXCP_ALL; 267 } 268 269 void thread_set_exceptions(uint32_t exceptions) 270 { 271 uint32_t daif = read_daif(); 272 273 daif &= ~(THREAD_EXCP_ALL << DAIF_F_SHIFT); 274 daif |= ((exceptions & THREAD_EXCP_ALL) << DAIF_F_SHIFT); 275 write_daif(daif); 276 } 277 #endif /*ARM64*/ 278 279 uint32_t thread_mask_exceptions(uint32_t exceptions) 280 { 281 uint32_t state = thread_get_exceptions(); 282 283 thread_set_exceptions(state | (exceptions & THREAD_EXCP_ALL)); 284 return state; 285 } 286 287 void thread_unmask_exceptions(uint32_t state) 288 { 289 thread_set_exceptions(state & THREAD_EXCP_ALL); 290 } 291 292 293 struct thread_core_local *thread_get_core_local(void) 294 { 295 uint32_t cpu_id = get_core_pos(); 296 297 /* 298 * IRQs must be disabled before playing with core_local since 299 * we otherwise may be rescheduled to a different core in the 300 * middle of this function. 301 */ 302 assert(thread_get_exceptions() & THREAD_EXCP_IRQ); 303 304 assert(cpu_id < CFG_TEE_CORE_NB_CORE); 305 return &thread_core_local[cpu_id]; 306 } 307 308 static void thread_lazy_save_ns_vfp(void) 309 { 310 #ifdef CFG_WITH_VFP 311 thread_vfp_state.ns_saved = false; 312 #if defined(ARM64) && defined(CFG_WITH_ARM_TRUSTED_FW) 313 /* 314 * ARM TF saves and restores CPACR_EL1, so we must assume NS world 315 * uses VFP and always preserve the register file when secure world 316 * is about to use it 317 */ 318 thread_vfp_state.ns.force_save = true; 319 #endif 320 vfp_lazy_save_state_init(&thread_vfp_state.ns); 321 #endif /*CFG_WITH_VFP*/ 322 } 323 324 static void thread_lazy_restore_ns_vfp(void) 325 { 326 #ifdef CFG_WITH_VFP 327 assert(!thread_vfp_state.sec_lazy_saved && !thread_vfp_state.sec_saved); 328 vfp_lazy_restore_state(&thread_vfp_state.ns, thread_vfp_state.ns_saved); 329 thread_vfp_state.ns_saved = false; 330 #endif /*CFG_WITH_VFP*/ 331 } 332 333 #ifdef ARM32 334 static void init_regs(struct thread_ctx *thread, 335 struct thread_smc_args *args) 336 { 337 thread->regs.pc = (uint32_t)thread_std_smc_entry; 338 339 /* 340 * Stdcalls starts in SVC mode with masked IRQ, masked Asynchronous 341 * abort and unmasked FIQ. 342 */ 343 thread->regs.cpsr = read_cpsr() & ARM32_CPSR_E; 344 thread->regs.cpsr |= CPSR_MODE_SVC | CPSR_I | CPSR_A; 345 /* Enable thumb mode if it's a thumb instruction */ 346 if (thread->regs.pc & 1) 347 thread->regs.cpsr |= CPSR_T; 348 /* Reinitialize stack pointer */ 349 thread->regs.svc_sp = thread->stack_va_end; 350 351 /* 352 * Copy arguments into context. This will make the 353 * arguments appear in r0-r7 when thread is started. 354 */ 355 thread->regs.r0 = args->a0; 356 thread->regs.r1 = args->a1; 357 thread->regs.r2 = args->a2; 358 thread->regs.r3 = args->a3; 359 thread->regs.r4 = args->a4; 360 thread->regs.r5 = args->a5; 361 thread->regs.r6 = args->a6; 362 thread->regs.r7 = args->a7; 363 } 364 #endif /*ARM32*/ 365 366 #ifdef ARM64 367 static void init_regs(struct thread_ctx *thread, 368 struct thread_smc_args *args) 369 { 370 thread->regs.pc = (uint64_t)thread_std_smc_entry; 371 372 /* 373 * Stdcalls starts in SVC mode with masked IRQ, masked Asynchronous 374 * abort and unmasked FIQ. 375 */ 376 thread->regs.cpsr = SPSR_64(SPSR_64_MODE_EL1, SPSR_64_MODE_SP_EL0, 377 DAIFBIT_IRQ | DAIFBIT_ABT); 378 /* Reinitialize stack pointer */ 379 thread->regs.sp = thread->stack_va_end; 380 381 /* 382 * Copy arguments into context. This will make the 383 * arguments appear in x0-x7 when thread is started. 384 */ 385 thread->regs.x[0] = args->a0; 386 thread->regs.x[1] = args->a1; 387 thread->regs.x[2] = args->a2; 388 thread->regs.x[3] = args->a3; 389 thread->regs.x[4] = args->a4; 390 thread->regs.x[5] = args->a5; 391 thread->regs.x[6] = args->a6; 392 thread->regs.x[7] = args->a7; 393 } 394 #endif /*ARM64*/ 395 396 static void thread_alloc_and_run(struct thread_smc_args *args) 397 { 398 size_t n; 399 struct thread_core_local *l = thread_get_core_local(); 400 bool found_thread = false; 401 402 assert(l->curr_thread == -1); 403 404 lock_global(); 405 406 for (n = 0; n < CFG_NUM_THREADS; n++) { 407 if (threads[n].state == THREAD_STATE_FREE) { 408 threads[n].state = THREAD_STATE_ACTIVE; 409 found_thread = true; 410 break; 411 } 412 } 413 414 unlock_global(); 415 416 if (!found_thread) { 417 args->a0 = TEESMC_RETURN_EBUSY; 418 return; 419 } 420 421 l->curr_thread = n; 422 423 threads[n].flags = 0; 424 init_regs(threads + n, args); 425 426 /* Save Hypervisor Client ID */ 427 threads[n].hyp_clnt_id = args->a7; 428 429 thread_lazy_save_ns_vfp(); 430 thread_resume(&threads[n].regs); 431 } 432 433 #ifdef ARM32 434 static void copy_a0_to_a3(struct thread_ctx_regs *regs, 435 struct thread_smc_args *args) 436 { 437 /* 438 * Update returned values from RPC, values will appear in 439 * r0-r3 when thread is resumed. 440 */ 441 regs->r0 = args->a0; 442 regs->r1 = args->a1; 443 regs->r2 = args->a2; 444 regs->r3 = args->a3; 445 } 446 #endif /*ARM32*/ 447 448 #ifdef ARM64 449 static void copy_a0_to_a3(struct thread_ctx_regs *regs, 450 struct thread_smc_args *args) 451 { 452 /* 453 * Update returned values from RPC, values will appear in 454 * x0-x3 when thread is resumed. 455 */ 456 regs->x[0] = args->a0; 457 regs->x[1] = args->a1; 458 regs->x[2] = args->a2; 459 regs->x[3] = args->a3; 460 } 461 #endif /*ARM64*/ 462 463 static void thread_resume_from_rpc(struct thread_smc_args *args) 464 { 465 size_t n = args->a3; /* thread id */ 466 struct thread_core_local *l = thread_get_core_local(); 467 uint32_t rv = 0; 468 469 assert(l->curr_thread == -1); 470 471 lock_global(); 472 473 if (n < CFG_NUM_THREADS && 474 threads[n].state == THREAD_STATE_SUSPENDED && 475 args->a7 == threads[n].hyp_clnt_id) 476 threads[n].state = THREAD_STATE_ACTIVE; 477 else 478 rv = TEESMC_RETURN_ERESUME; 479 480 unlock_global(); 481 482 if (rv) { 483 args->a0 = rv; 484 return; 485 } 486 487 l->curr_thread = n; 488 489 if (threads[n].have_user_map) 490 core_mmu_set_user_map(&threads[n].user_map); 491 492 /* 493 * Return from RPC to request service of an IRQ must not 494 * get parameters from non-secure world. 495 */ 496 if (threads[n].flags & THREAD_FLAGS_COPY_ARGS_ON_RETURN) { 497 copy_a0_to_a3(&threads[n].regs, args); 498 threads[n].flags &= ~THREAD_FLAGS_COPY_ARGS_ON_RETURN; 499 } 500 501 thread_lazy_save_ns_vfp(); 502 thread_resume(&threads[n].regs); 503 } 504 505 void thread_handle_fast_smc(struct thread_smc_args *args) 506 { 507 thread_check_canaries(); 508 thread_fast_smc_handler_ptr(args); 509 /* Fast handlers must not unmask any exceptions */ 510 assert(thread_get_exceptions() == THREAD_EXCP_ALL); 511 } 512 513 void thread_handle_std_smc(struct thread_smc_args *args) 514 { 515 thread_check_canaries(); 516 517 if (args->a0 == TEESMC32_CALL_RETURN_FROM_RPC) 518 thread_resume_from_rpc(args); 519 else 520 thread_alloc_and_run(args); 521 } 522 523 /* Helper routine for the assembly function thread_std_smc_entry() */ 524 void __thread_std_smc_entry(struct thread_smc_args *args) 525 { 526 struct thread_ctx *thr = threads + thread_get_id(); 527 528 if (!thr->rpc_arg) { 529 paddr_t parg; 530 void *arg; 531 532 parg = thread_rpc_alloc_arg( 533 TEESMC32_GET_ARG_SIZE(RPC_MAX_PARAMS)); 534 if (!parg || !TEE_ALIGNMENT_IS_OK(parg, struct teesmc32_arg) || 535 core_pa2va(parg, &arg)) { 536 thread_rpc_free_arg(parg); 537 args->a0 = TEESMC_RETURN_ENOMEM; 538 return; 539 } 540 541 thr->rpc_arg = arg; 542 thr->rpc_parg = parg; 543 } 544 545 /* 546 * Take big lock before entering the callback registered in 547 * thread_std_smc_handler_ptr as the callback can reside in the 548 * paged area and the pager can only serve one core at a time. 549 */ 550 thread_take_big_lock(); 551 thread_std_smc_handler_ptr(args); 552 thread_release_big_lock(); 553 } 554 555 void thread_handle_abort(uint32_t abort_type, struct thread_abort_regs *regs) 556 { 557 #ifdef CFG_WITH_VFP 558 if (vfp_is_enabled()) { 559 vfp_lazy_save_state_init(&thread_vfp_state.sec); 560 thread_vfp_state.sec_lazy_saved = true; 561 } 562 #endif 563 564 thread_abort_handler_ptr(abort_type, regs); 565 566 #ifdef CFG_WITH_VFP 567 assert(!vfp_is_enabled()); 568 if (thread_vfp_state.sec_lazy_saved) { 569 vfp_lazy_restore_state(&thread_vfp_state.sec, 570 thread_vfp_state.sec_saved); 571 thread_vfp_state.sec_saved = false; 572 thread_vfp_state.sec_lazy_saved = false; 573 } 574 #endif 575 } 576 577 void *thread_get_tmp_sp(void) 578 { 579 struct thread_core_local *l = thread_get_core_local(); 580 581 return (void *)l->tmp_stack_va_end; 582 } 583 584 #ifdef ARM64 585 vaddr_t thread_get_saved_thread_sp(void) 586 { 587 struct thread_core_local *l = thread_get_core_local(); 588 int ct = l->curr_thread; 589 590 assert(ct != -1); 591 return threads[ct].kern_sp; 592 } 593 #endif /*ARM64*/ 594 595 void thread_state_free(void) 596 { 597 struct thread_core_local *l = thread_get_core_local(); 598 int ct = l->curr_thread; 599 600 assert(ct != -1); 601 602 thread_lazy_restore_ns_vfp(); 603 604 lock_global(); 605 606 assert(threads[ct].state == THREAD_STATE_ACTIVE); 607 threads[ct].state = THREAD_STATE_FREE; 608 threads[ct].flags = 0; 609 l->curr_thread = -1; 610 611 unlock_global(); 612 } 613 614 int thread_state_suspend(uint32_t flags, uint32_t cpsr, vaddr_t pc) 615 { 616 struct thread_core_local *l = thread_get_core_local(); 617 int ct = l->curr_thread; 618 619 assert(ct != -1); 620 621 thread_check_canaries(); 622 623 thread_lazy_restore_ns_vfp(); 624 625 lock_global(); 626 627 assert(threads[ct].state == THREAD_STATE_ACTIVE); 628 threads[ct].flags |= flags; 629 threads[ct].regs.cpsr = cpsr; 630 threads[ct].regs.pc = pc; 631 threads[ct].state = THREAD_STATE_SUSPENDED; 632 633 threads[ct].have_user_map = core_mmu_user_mapping_is_active(); 634 if (threads[ct].have_user_map) { 635 core_mmu_get_user_map(&threads[ct].user_map); 636 core_mmu_set_user_map(NULL); 637 } 638 639 640 l->curr_thread = -1; 641 642 unlock_global(); 643 644 return ct; 645 } 646 647 #ifdef ARM32 648 static void set_tmp_stack(struct thread_core_local *l, vaddr_t sp) 649 { 650 l->tmp_stack_va_end = sp; 651 thread_set_irq_sp(sp); 652 thread_set_fiq_sp(sp); 653 } 654 655 static void set_abt_stack(struct thread_core_local *l __unused, vaddr_t sp) 656 { 657 thread_set_abt_sp(sp); 658 } 659 #endif /*ARM32*/ 660 661 #ifdef ARM64 662 static void set_tmp_stack(struct thread_core_local *l, vaddr_t sp) 663 { 664 /* 665 * We're already using the tmp stack when this function is called 666 * so there's no need to assign it to any stack pointer. However, 667 * we'll need to restore it at different times so store it here. 668 */ 669 l->tmp_stack_va_end = sp; 670 } 671 672 static void set_abt_stack(struct thread_core_local *l, vaddr_t sp) 673 { 674 l->abt_stack_va_end = sp; 675 } 676 #endif /*ARM64*/ 677 678 bool thread_init_stack(uint32_t thread_id, vaddr_t sp) 679 { 680 if (thread_id >= CFG_NUM_THREADS) 681 return false; 682 if (threads[thread_id].state != THREAD_STATE_FREE) 683 return false; 684 685 threads[thread_id].stack_va_end = sp; 686 return true; 687 } 688 689 int thread_get_id(void) 690 { 691 /* thread_get_core_local() requires IRQs to be disabled */ 692 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_IRQ); 693 struct thread_core_local *l; 694 int ct; 695 696 l = thread_get_core_local(); 697 ct = l->curr_thread; 698 assert((ct >= 0) && (ct < CFG_NUM_THREADS)); 699 700 thread_unmask_exceptions(exceptions); 701 return ct; 702 } 703 704 static void init_handlers(const struct thread_handlers *handlers) 705 { 706 thread_std_smc_handler_ptr = handlers->std_smc; 707 thread_fast_smc_handler_ptr = handlers->fast_smc; 708 thread_fiq_handler_ptr = handlers->fiq; 709 thread_svc_handler_ptr = handlers->svc; 710 thread_abort_handler_ptr = handlers->abort; 711 thread_cpu_on_handler_ptr = handlers->cpu_on; 712 thread_cpu_off_handler_ptr = handlers->cpu_off; 713 thread_cpu_suspend_handler_ptr = handlers->cpu_suspend; 714 thread_cpu_resume_handler_ptr = handlers->cpu_resume; 715 thread_system_off_handler_ptr = handlers->system_off; 716 thread_system_reset_handler_ptr = handlers->system_reset; 717 } 718 719 720 #ifdef CFG_WITH_PAGER 721 static void init_thread_stacks(void) 722 { 723 size_t n; 724 725 /* 726 * Allocate virtual memory for thread stacks. 727 */ 728 for (n = 0; n < CFG_NUM_THREADS; n++) { 729 tee_mm_entry_t *mm; 730 vaddr_t sp; 731 732 /* Find vmem for thread stack and its protection gap */ 733 mm = tee_mm_alloc(&tee_mm_vcore, 734 SMALL_PAGE_SIZE + STACK_THREAD_SIZE); 735 TEE_ASSERT(mm); 736 737 /* Claim eventual physical page */ 738 tee_pager_add_pages(tee_mm_get_smem(mm), tee_mm_get_size(mm), 739 true); 740 741 /* Realloc both protection vmem and stack vmem separately */ 742 sp = tee_mm_get_smem(mm); 743 tee_mm_free(mm); 744 mm = tee_mm_alloc2(&tee_mm_vcore, sp, SMALL_PAGE_SIZE); 745 TEE_ASSERT(mm); 746 mm = tee_mm_alloc2(&tee_mm_vcore, sp + SMALL_PAGE_SIZE, 747 STACK_THREAD_SIZE); 748 TEE_ASSERT(mm); 749 750 /* init effective stack */ 751 sp = tee_mm_get_smem(mm) + tee_mm_get_bytes(mm); 752 if (!thread_init_stack(n, sp)) 753 panic(); 754 755 /* Add the area to the pager */ 756 tee_pager_add_area(mm, TEE_PAGER_AREA_RW, NULL, NULL); 757 } 758 } 759 #else 760 static void init_thread_stacks(void) 761 { 762 size_t n; 763 764 /* Assign the thread stacks */ 765 for (n = 0; n < CFG_NUM_THREADS; n++) { 766 if (!thread_init_stack(n, GET_STACK(stack_thread[n]))) 767 panic(); 768 } 769 } 770 #endif /*CFG_WITH_PAGER*/ 771 772 void thread_init_primary(const struct thread_handlers *handlers) 773 { 774 size_t n; 775 776 /* 777 * The COMPILE_TIME_ASSERT only works in function context. These 778 * checks verifies that the offsets used in assembly code matches 779 * what's used in C code. 780 */ 781 #ifdef ARM32 782 COMPILE_TIME_ASSERT(offsetof(struct thread_svc_regs, r0) == 783 THREAD_SVC_REG_R0_OFFS); 784 COMPILE_TIME_ASSERT(offsetof(struct thread_svc_regs, r1) == 785 THREAD_SVC_REG_R1_OFFS); 786 COMPILE_TIME_ASSERT(offsetof(struct thread_svc_regs, r2) == 787 THREAD_SVC_REG_R2_OFFS); 788 COMPILE_TIME_ASSERT(offsetof(struct thread_svc_regs, r3) == 789 THREAD_SVC_REG_R3_OFFS); 790 COMPILE_TIME_ASSERT(offsetof(struct thread_svc_regs, r4) == 791 THREAD_SVC_REG_R4_OFFS); 792 COMPILE_TIME_ASSERT(offsetof(struct thread_svc_regs, r5) == 793 THREAD_SVC_REG_R5_OFFS); 794 COMPILE_TIME_ASSERT(offsetof(struct thread_svc_regs, r6) == 795 THREAD_SVC_REG_R6_OFFS); 796 COMPILE_TIME_ASSERT(offsetof(struct thread_svc_regs, r7) == 797 THREAD_SVC_REG_R7_OFFS); 798 COMPILE_TIME_ASSERT(offsetof(struct thread_svc_regs, lr) == 799 THREAD_SVC_REG_LR_OFFS); 800 COMPILE_TIME_ASSERT(offsetof(struct thread_svc_regs, spsr) == 801 THREAD_SVC_REG_SPSR_OFFS); 802 #endif /*ARM32*/ 803 #ifdef ARM64 804 /* struct thread_abort_regs */ 805 COMPILE_TIME_ASSERT(offsetof(struct thread_abort_regs, x22) == 806 THREAD_ABT_REG_X_OFFS(22)); 807 COMPILE_TIME_ASSERT(offsetof(struct thread_abort_regs, elr) == 808 THREAD_ABT_REG_ELR_OFFS); 809 COMPILE_TIME_ASSERT(offsetof(struct thread_abort_regs, spsr) == 810 THREAD_ABT_REG_SPSR_OFFS); 811 COMPILE_TIME_ASSERT(offsetof(struct thread_abort_regs, sp_el0) == 812 THREAD_ABT_REG_SP_EL0_OFFS); 813 COMPILE_TIME_ASSERT(sizeof(struct thread_abort_regs) == 814 THREAD_ABT_REGS_SIZE); 815 816 /* struct thread_ctx */ 817 COMPILE_TIME_ASSERT(offsetof(struct thread_ctx, kern_sp) == 818 THREAD_CTX_KERN_SP_OFFSET); 819 COMPILE_TIME_ASSERT(sizeof(struct thread_ctx) == THREAD_CTX_SIZE); 820 821 /* struct thread_ctx_regs */ 822 COMPILE_TIME_ASSERT(offsetof(struct thread_ctx_regs, sp) == 823 THREAD_CTX_REGS_SP_OFFSET); 824 COMPILE_TIME_ASSERT(offsetof(struct thread_ctx_regs, pc) == 825 THREAD_CTX_REGS_PC_OFFSET); 826 COMPILE_TIME_ASSERT(offsetof(struct thread_ctx_regs, cpsr) == 827 THREAD_CTX_REGS_SPSR_OFFSET); 828 COMPILE_TIME_ASSERT(offsetof(struct thread_ctx_regs, x[23]) == 829 THREAD_CTX_REGS_X_OFFSET(23)); 830 COMPILE_TIME_ASSERT(sizeof(struct thread_ctx_regs) == 831 THREAD_CTX_REGS_SIZE); 832 833 /* struct thread_user_mode_rec */ 834 COMPILE_TIME_ASSERT( 835 offsetof(struct thread_user_mode_rec, exit_status0_ptr) == 836 THREAD_USER_MODE_REC_EXIT_STATUS0_PTR_OFFSET); 837 COMPILE_TIME_ASSERT( 838 offsetof(struct thread_user_mode_rec, exit_status1_ptr) == 839 THREAD_USER_MODE_REC_EXIT_STATUS1_PTR_OFFSET); 840 COMPILE_TIME_ASSERT( 841 offsetof(struct thread_user_mode_rec, x[1]) == 842 THREAD_USER_MODE_REC_X_OFFSET(20)); 843 COMPILE_TIME_ASSERT(sizeof(struct thread_user_mode_rec) == 844 THREAD_USER_MODE_REC_SIZE); 845 846 /* struct thread_core_local */ 847 COMPILE_TIME_ASSERT( 848 offsetof(struct thread_core_local, tmp_stack_va_end) == 849 THREAD_CORE_LOCAL_TMP_STACK_VA_END_OFFSET); 850 COMPILE_TIME_ASSERT( 851 offsetof(struct thread_core_local, curr_thread) == 852 THREAD_CORE_LOCAL_CURR_THREAD_OFFSET); 853 COMPILE_TIME_ASSERT( 854 offsetof(struct thread_core_local, flags) == 855 THREAD_CORE_LOCAL_FLAGS_OFFSET); 856 COMPILE_TIME_ASSERT( 857 offsetof(struct thread_core_local, abt_stack_va_end) == 858 THREAD_CORE_LOCAL_ABT_STACK_VA_END_OFFSET); 859 COMPILE_TIME_ASSERT( 860 offsetof(struct thread_core_local, x[3]) == 861 THREAD_CORE_LOCAL_X_OFFSET(3)); 862 COMPILE_TIME_ASSERT(sizeof(struct thread_core_local) == 863 THREAD_CORE_LOCAL_SIZE); 864 865 #endif /*ARM64*/ 866 867 init_handlers(handlers); 868 869 /* Initialize canaries around the stacks */ 870 init_canaries(); 871 872 for (n = 0; n < CFG_NUM_THREADS; n++) 873 TAILQ_INIT(&threads[n].mutexes); 874 875 init_thread_stacks(); 876 } 877 878 static void init_sec_mon(size_t __unused pos) 879 { 880 #if !defined(CFG_WITH_ARM_TRUSTED_FW) 881 /* Initialize secure monitor */ 882 sm_init(GET_STACK(stack_sm[pos])); 883 sm_set_entry_vector(thread_vector_table); 884 #endif 885 } 886 887 void thread_init_per_cpu(void) 888 { 889 size_t pos = get_core_pos(); 890 struct thread_core_local *l = thread_get_core_local(); 891 892 init_sec_mon(pos); 893 894 l->curr_thread = -1; 895 set_tmp_stack(l, GET_STACK(stack_tmp[pos])); 896 set_abt_stack(l, GET_STACK(stack_abt[pos])); 897 898 thread_init_vbar(); 899 } 900 901 void thread_set_tsd(void *tsd) 902 { 903 /* thread_get_core_local() requires IRQs to be disabled */ 904 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_IRQ); 905 struct thread_core_local *l; 906 int ct; 907 908 l = thread_get_core_local(); 909 ct = l->curr_thread; 910 911 assert(ct != -1); 912 assert(threads[ct].state == THREAD_STATE_ACTIVE); 913 threads[ct].tsd = tsd; 914 915 thread_unmask_exceptions(exceptions); 916 } 917 918 void *thread_get_tsd(void) 919 { 920 /* thread_get_core_local() requires IRQs to be disabled */ 921 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_IRQ); 922 struct thread_core_local *l; 923 int ct; 924 void *tsd; 925 926 l = thread_get_core_local(); 927 ct = l->curr_thread; 928 929 if (ct == -1 || threads[ct].state != THREAD_STATE_ACTIVE) 930 tsd = NULL; 931 else 932 tsd = threads[ct].tsd; 933 934 thread_unmask_exceptions(exceptions); 935 return tsd; 936 } 937 938 struct thread_ctx_regs *thread_get_ctx_regs(void) 939 { 940 struct thread_core_local *l = thread_get_core_local(); 941 942 assert(l->curr_thread != -1); 943 return &threads[l->curr_thread].regs; 944 } 945 946 void thread_set_irq(bool enable) 947 { 948 /* thread_get_core_local() requires IRQs to be disabled */ 949 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_IRQ); 950 struct thread_core_local *l; 951 952 l = thread_get_core_local(); 953 954 assert(l->curr_thread != -1); 955 956 if (enable) { 957 threads[l->curr_thread].flags |= THREAD_FLAGS_IRQ_ENABLE; 958 thread_set_exceptions(exceptions & ~THREAD_EXCP_IRQ); 959 } else { 960 /* 961 * No need to disable IRQ here since it's already disabled 962 * above. 963 */ 964 threads[l->curr_thread].flags &= ~THREAD_FLAGS_IRQ_ENABLE; 965 } 966 } 967 968 void thread_restore_irq(void) 969 { 970 /* thread_get_core_local() requires IRQs to be disabled */ 971 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_IRQ); 972 struct thread_core_local *l; 973 974 l = thread_get_core_local(); 975 976 assert(l->curr_thread != -1); 977 978 if (threads[l->curr_thread].flags & THREAD_FLAGS_IRQ_ENABLE) 979 thread_set_exceptions(exceptions & ~THREAD_EXCP_IRQ); 980 } 981 982 #ifdef CFG_WITH_VFP 983 uint32_t thread_kernel_enable_vfp(void) 984 { 985 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_IRQ); 986 987 assert(!vfp_is_enabled()); 988 989 if (!thread_vfp_state.ns_saved) { 990 vfp_lazy_save_state_final(&thread_vfp_state.ns); 991 thread_vfp_state.ns_saved = true; 992 } else if (thread_vfp_state.sec_lazy_saved && 993 !thread_vfp_state.sec_saved) { 994 vfp_lazy_save_state_final(&thread_vfp_state.sec); 995 thread_vfp_state.sec_saved = true; 996 } 997 998 vfp_enable(); 999 return exceptions; 1000 } 1001 1002 void thread_kernel_disable_vfp(uint32_t state) 1003 { 1004 uint32_t exceptions; 1005 1006 assert(vfp_is_enabled()); 1007 1008 vfp_disable(); 1009 exceptions = thread_get_exceptions(); 1010 assert(exceptions & THREAD_EXCP_IRQ); 1011 exceptions &= ~THREAD_EXCP_IRQ; 1012 exceptions |= state & THREAD_EXCP_IRQ; 1013 thread_set_exceptions(exceptions); 1014 } 1015 #endif /*CFG_WITH_VFP*/ 1016 1017 void thread_add_mutex(struct mutex *m) 1018 { 1019 struct thread_core_local *l = thread_get_core_local(); 1020 int ct = l->curr_thread; 1021 1022 assert(ct != -1 && threads[ct].state == THREAD_STATE_ACTIVE); 1023 assert(m->owner_id == -1); 1024 m->owner_id = ct; 1025 TAILQ_INSERT_TAIL(&threads[ct].mutexes, m, link); 1026 } 1027 1028 void thread_rem_mutex(struct mutex *m) 1029 { 1030 struct thread_core_local *l = thread_get_core_local(); 1031 int ct = l->curr_thread; 1032 1033 assert(ct != -1 && threads[ct].state == THREAD_STATE_ACTIVE); 1034 assert(m->owner_id == ct); 1035 m->owner_id = -1; 1036 TAILQ_REMOVE(&threads[ct].mutexes, m, link); 1037 } 1038 1039 static bool may_unlock_big_lock(void) 1040 { 1041 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_IRQ); 1042 struct thread_core_local *l = thread_get_core_local(); 1043 int ct = l->curr_thread; 1044 struct mutex *m; 1045 bool have_bl = false; 1046 bool have_other = false; 1047 1048 TAILQ_FOREACH(m, &threads[ct].mutexes, link) { 1049 if (m == &thread_big_lock) 1050 have_bl = true; 1051 else 1052 have_other = true; 1053 } 1054 1055 thread_unmask_exceptions(exceptions); 1056 return have_bl && !have_other; 1057 } 1058 1059 void thread_take_big_lock(void) 1060 { 1061 mutex_lock(&thread_big_lock); 1062 } 1063 1064 void thread_release_big_lock(void) 1065 { 1066 assert(may_unlock_big_lock()); 1067 mutex_unlock(&thread_big_lock); 1068 } 1069 1070 paddr_t thread_rpc_alloc_arg(size_t size) 1071 { 1072 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { 1073 TEESMC_RETURN_RPC_ALLOC_ARG, size}; 1074 1075 thread_rpc(rpc_args); 1076 return rpc_args[1]; 1077 } 1078 1079 paddr_t thread_rpc_alloc_payload(size_t size) 1080 { 1081 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { 1082 TEESMC_RETURN_RPC_ALLOC_PAYLOAD, size}; 1083 1084 thread_rpc(rpc_args); 1085 return rpc_args[1]; 1086 } 1087 1088 void thread_rpc_free_arg(paddr_t arg) 1089 { 1090 if (arg) { 1091 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { 1092 TEESMC_RETURN_RPC_FREE_ARG, arg}; 1093 1094 thread_rpc(rpc_args); 1095 } 1096 } 1097 void thread_rpc_free_payload(paddr_t payload) 1098 { 1099 if (payload) { 1100 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { 1101 TEESMC_RETURN_RPC_FREE_PAYLOAD, payload}; 1102 1103 thread_rpc(rpc_args); 1104 } 1105 } 1106 1107 static uint32_t rpc_cmd_nolock(uint32_t cmd, size_t num_params, 1108 struct teesmc32_param *params) 1109 { 1110 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { 0 }; 1111 struct thread_ctx *thr = threads + thread_get_id(); 1112 struct teesmc32_arg *arg = thr->rpc_arg; 1113 paddr_t parg = thr->rpc_parg; 1114 const size_t params_size = sizeof(struct teesmc32_param) * num_params; 1115 size_t n; 1116 1117 TEE_ASSERT(arg && parg && num_params <= RPC_MAX_PARAMS); 1118 1119 memset(arg, 0, TEESMC32_GET_ARG_SIZE(RPC_MAX_PARAMS)); 1120 arg->cmd = cmd; 1121 arg->ret = TEE_ERROR_GENERIC; /* in case value isn't updated */ 1122 arg->num_params = num_params; 1123 memcpy(TEESMC32_GET_PARAMS(arg), params, params_size); 1124 1125 rpc_args[0] = TEESMC_RETURN_RPC_CMD; 1126 rpc_args[1] = parg; 1127 thread_rpc(rpc_args); 1128 1129 for (n = 0; n < num_params; n++) { 1130 switch (params[n].attr & TEESMC_ATTR_TYPE_MASK) { 1131 case TEESMC_ATTR_TYPE_VALUE_OUTPUT: 1132 case TEESMC_ATTR_TYPE_VALUE_INOUT: 1133 case TEESMC_ATTR_TYPE_MEMREF_OUTPUT: 1134 case TEESMC_ATTR_TYPE_MEMREF_INOUT: 1135 memcpy(params + n, TEESMC32_GET_PARAMS(arg) + n, 1136 sizeof(struct teesmc32_param)); 1137 break; 1138 default: 1139 break; 1140 } 1141 } 1142 1143 return arg->ret; 1144 } 1145 1146 uint32_t thread_rpc_cmd(uint32_t cmd, size_t num_params, 1147 struct teesmc32_param *params) 1148 { 1149 bool unlock_big_lock = may_unlock_big_lock(); 1150 uint32_t ret; 1151 1152 /* 1153 * If current thread doesn't hold any other mutexes: 1154 * Let other threads get the big lock to do some work while this 1155 * thread is doing some potentially slow RPC in normal world. 1156 */ 1157 if (unlock_big_lock) 1158 mutex_unlock(&thread_big_lock); 1159 1160 ret = rpc_cmd_nolock(cmd, num_params, params); 1161 1162 if (unlock_big_lock) 1163 mutex_lock(&thread_big_lock); 1164 1165 return ret; 1166 } 1167 1168 void thread_optee_rpc_alloc_payload(size_t size, paddr_t *payload, 1169 paddr_t *cookie) 1170 { 1171 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { 1172 TEESMC_RETURN_OPTEE_RPC_ALLOC_PAYLOAD, size}; 1173 1174 thread_rpc(rpc_args); 1175 if (payload) 1176 *payload = rpc_args[1]; 1177 if (cookie) 1178 *cookie = rpc_args[2]; 1179 } 1180 1181 void thread_optee_rpc_free_payload(paddr_t cookie) 1182 { 1183 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] ={ 1184 TEESMC_RETURN_OPTEE_RPC_FREE_PAYLOAD, cookie}; 1185 1186 thread_rpc(rpc_args); 1187 } 1188