1 /* 2 * Copyright (c) 2014, STMicroelectronics International N.V. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, 9 * this list of conditions and the following disclaimer. 10 * 11 * 2. Redistributions in binary form must reproduce the above copyright notice, 12 * this list of conditions and the following disclaimer in the documentation 13 * and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 */ 27 #include <platform_config.h> 28 #include <kernel/panic.h> 29 #include <kernel/thread.h> 30 #include <kernel/thread_defs.h> 31 #include "thread_private.h" 32 #include <sm/sm_defs.h> 33 #include <sm/sm.h> 34 #include <optee_msg.h> 35 #include <sm/optee_smc.h> 36 #include <arm.h> 37 #include <kernel/tz_proc_def.h> 38 #include <kernel/tz_proc.h> 39 #include <kernel/misc.h> 40 #include <mm/tee_mmu.h> 41 #include <mm/core_memprot.h> 42 #include <mm/tee_mmu_defs.h> 43 #include <mm/tee_mm.h> 44 #include <mm/tee_pager.h> 45 #include <kernel/tee_ta_manager.h> 46 #include <util.h> 47 #include <trace.h> 48 #include <assert.h> 49 50 #ifdef ARM32 51 #define STACK_TMP_SIZE 1024 52 #define STACK_THREAD_SIZE 8192 53 54 #if TRACE_LEVEL > 0 55 #define STACK_ABT_SIZE 2048 56 #else 57 #define STACK_ABT_SIZE 1024 58 #endif 59 60 #endif /*ARM32*/ 61 62 #ifdef ARM64 63 #define STACK_TMP_SIZE 2048 64 #define STACK_THREAD_SIZE 8192 65 66 #if TRACE_LEVEL > 0 67 #define STACK_ABT_SIZE 3072 68 #else 69 #define STACK_ABT_SIZE 1024 70 #endif 71 #endif /*ARM64*/ 72 73 #define RPC_MAX_NUM_PARAMS 2 74 75 struct thread_ctx threads[CFG_NUM_THREADS]; 76 77 static struct thread_core_local thread_core_local[CFG_TEE_CORE_NB_CORE]; 78 79 #ifdef CFG_WITH_STACK_CANARIES 80 #ifdef ARM32 81 #define STACK_CANARY_SIZE (4 * sizeof(uint32_t)) 82 #endif 83 #ifdef ARM64 84 #define STACK_CANARY_SIZE (8 * sizeof(uint32_t)) 85 #endif 86 #define START_CANARY_VALUE 0xdededede 87 #define END_CANARY_VALUE 0xabababab 88 #define GET_START_CANARY(name, stack_num) name[stack_num][0] 89 #define GET_END_CANARY(name, stack_num) \ 90 name[stack_num][sizeof(name[stack_num]) / sizeof(uint32_t) - 1] 91 #else 92 #define STACK_CANARY_SIZE 0 93 #endif 94 95 #define DECLARE_STACK(name, num_stacks, stack_size) \ 96 static uint32_t name[num_stacks][ \ 97 ROUNDUP(stack_size + STACK_CANARY_SIZE, STACK_ALIGNMENT) / \ 98 sizeof(uint32_t)] \ 99 __attribute__((section(".nozi.stack"), \ 100 aligned(STACK_ALIGNMENT))) 101 102 #define GET_STACK(stack) \ 103 ((vaddr_t)(stack) + sizeof(stack) - STACK_CANARY_SIZE / 2) 104 105 DECLARE_STACK(stack_tmp, CFG_TEE_CORE_NB_CORE, STACK_TMP_SIZE); 106 DECLARE_STACK(stack_abt, CFG_TEE_CORE_NB_CORE, STACK_ABT_SIZE); 107 #if !defined(CFG_WITH_ARM_TRUSTED_FW) 108 DECLARE_STACK(stack_sm, CFG_TEE_CORE_NB_CORE, SM_STACK_SIZE); 109 #endif 110 #ifndef CFG_WITH_PAGER 111 DECLARE_STACK(stack_thread, CFG_NUM_THREADS, STACK_THREAD_SIZE); 112 #endif 113 114 const vaddr_t stack_tmp_top[CFG_TEE_CORE_NB_CORE] = { 115 GET_STACK(stack_tmp[0]), 116 #if CFG_TEE_CORE_NB_CORE > 1 117 GET_STACK(stack_tmp[1]), 118 #endif 119 #if CFG_TEE_CORE_NB_CORE > 2 120 GET_STACK(stack_tmp[2]), 121 #endif 122 #if CFG_TEE_CORE_NB_CORE > 3 123 GET_STACK(stack_tmp[3]), 124 #endif 125 #if CFG_TEE_CORE_NB_CORE > 4 126 GET_STACK(stack_tmp[4]), 127 #endif 128 #if CFG_TEE_CORE_NB_CORE > 5 129 GET_STACK(stack_tmp[5]), 130 #endif 131 #if CFG_TEE_CORE_NB_CORE > 6 132 GET_STACK(stack_tmp[6]), 133 #endif 134 #if CFG_TEE_CORE_NB_CORE > 7 135 GET_STACK(stack_tmp[7]), 136 #endif 137 #if CFG_TEE_CORE_NB_CORE > 8 138 #error "Top of tmp stacks aren't defined for more than 8 CPUS" 139 #endif 140 }; 141 142 thread_smc_handler_t thread_std_smc_handler_ptr; 143 static thread_smc_handler_t thread_fast_smc_handler_ptr; 144 thread_fiq_handler_t thread_fiq_handler_ptr; 145 thread_pm_handler_t thread_cpu_on_handler_ptr; 146 thread_pm_handler_t thread_cpu_off_handler_ptr; 147 thread_pm_handler_t thread_cpu_suspend_handler_ptr; 148 thread_pm_handler_t thread_cpu_resume_handler_ptr; 149 thread_pm_handler_t thread_system_off_handler_ptr; 150 thread_pm_handler_t thread_system_reset_handler_ptr; 151 152 153 static unsigned int thread_global_lock = SPINLOCK_UNLOCK; 154 static bool thread_prealloc_rpc_cache; 155 156 static void init_canaries(void) 157 { 158 #ifdef CFG_WITH_STACK_CANARIES 159 size_t n; 160 #define INIT_CANARY(name) \ 161 for (n = 0; n < ARRAY_SIZE(name); n++) { \ 162 uint32_t *start_canary = &GET_START_CANARY(name, n); \ 163 uint32_t *end_canary = &GET_END_CANARY(name, n); \ 164 \ 165 *start_canary = START_CANARY_VALUE; \ 166 *end_canary = END_CANARY_VALUE; \ 167 DMSG("#Stack canaries for %s[%zu] with top at %p\n", \ 168 #name, n, (void *)(end_canary - 1)); \ 169 DMSG("watch *%p\n", (void *)end_canary); \ 170 } 171 172 INIT_CANARY(stack_tmp); 173 INIT_CANARY(stack_abt); 174 #if !defined(CFG_WITH_ARM_TRUSTED_FW) 175 INIT_CANARY(stack_sm); 176 #endif 177 #ifndef CFG_WITH_PAGER 178 INIT_CANARY(stack_thread); 179 #endif 180 #endif/*CFG_WITH_STACK_CANARIES*/ 181 } 182 183 void thread_check_canaries(void) 184 { 185 #ifdef CFG_WITH_STACK_CANARIES 186 size_t n; 187 188 for (n = 0; n < ARRAY_SIZE(stack_tmp); n++) { 189 assert(GET_START_CANARY(stack_tmp, n) == START_CANARY_VALUE); 190 assert(GET_END_CANARY(stack_tmp, n) == END_CANARY_VALUE); 191 } 192 193 for (n = 0; n < ARRAY_SIZE(stack_abt); n++) { 194 assert(GET_START_CANARY(stack_abt, n) == START_CANARY_VALUE); 195 assert(GET_END_CANARY(stack_abt, n) == END_CANARY_VALUE); 196 } 197 #if !defined(CFG_WITH_ARM_TRUSTED_FW) 198 for (n = 0; n < ARRAY_SIZE(stack_sm); n++) { 199 assert(GET_START_CANARY(stack_sm, n) == START_CANARY_VALUE); 200 assert(GET_END_CANARY(stack_sm, n) == END_CANARY_VALUE); 201 } 202 #endif 203 #ifndef CFG_WITH_PAGER 204 for (n = 0; n < ARRAY_SIZE(stack_thread); n++) { 205 assert(GET_START_CANARY(stack_thread, n) == START_CANARY_VALUE); 206 assert(GET_END_CANARY(stack_thread, n) == END_CANARY_VALUE); 207 } 208 #endif 209 #endif/*CFG_WITH_STACK_CANARIES*/ 210 } 211 212 static void lock_global(void) 213 { 214 cpu_spin_lock(&thread_global_lock); 215 } 216 217 static void unlock_global(void) 218 { 219 cpu_spin_unlock(&thread_global_lock); 220 } 221 222 #ifdef ARM32 223 uint32_t thread_get_exceptions(void) 224 { 225 uint32_t cpsr = read_cpsr(); 226 227 return (cpsr >> CPSR_F_SHIFT) & THREAD_EXCP_ALL; 228 } 229 230 void thread_set_exceptions(uint32_t exceptions) 231 { 232 uint32_t cpsr = read_cpsr(); 233 234 cpsr &= ~(THREAD_EXCP_ALL << CPSR_F_SHIFT); 235 cpsr |= ((exceptions & THREAD_EXCP_ALL) << CPSR_F_SHIFT); 236 write_cpsr(cpsr); 237 } 238 #endif /*ARM32*/ 239 240 #ifdef ARM64 241 uint32_t thread_get_exceptions(void) 242 { 243 uint32_t daif = read_daif(); 244 245 return (daif >> DAIF_F_SHIFT) & THREAD_EXCP_ALL; 246 } 247 248 void thread_set_exceptions(uint32_t exceptions) 249 { 250 uint32_t daif = read_daif(); 251 252 daif &= ~(THREAD_EXCP_ALL << DAIF_F_SHIFT); 253 daif |= ((exceptions & THREAD_EXCP_ALL) << DAIF_F_SHIFT); 254 write_daif(daif); 255 } 256 #endif /*ARM64*/ 257 258 uint32_t thread_mask_exceptions(uint32_t exceptions) 259 { 260 uint32_t state = thread_get_exceptions(); 261 262 thread_set_exceptions(state | (exceptions & THREAD_EXCP_ALL)); 263 return state; 264 } 265 266 void thread_unmask_exceptions(uint32_t state) 267 { 268 thread_set_exceptions(state & THREAD_EXCP_ALL); 269 } 270 271 272 struct thread_core_local *thread_get_core_local(void) 273 { 274 uint32_t cpu_id = get_core_pos(); 275 276 /* 277 * IRQs must be disabled before playing with core_local since 278 * we otherwise may be rescheduled to a different core in the 279 * middle of this function. 280 */ 281 assert(thread_get_exceptions() & THREAD_EXCP_IRQ); 282 283 assert(cpu_id < CFG_TEE_CORE_NB_CORE); 284 return &thread_core_local[cpu_id]; 285 } 286 287 static void thread_lazy_save_ns_vfp(void) 288 { 289 #ifdef CFG_WITH_VFP 290 struct thread_ctx *thr = threads + thread_get_id(); 291 292 thr->vfp_state.ns_saved = false; 293 #if defined(ARM64) && defined(CFG_WITH_ARM_TRUSTED_FW) 294 /* 295 * ARM TF saves and restores CPACR_EL1, so we must assume NS world 296 * uses VFP and always preserve the register file when secure world 297 * is about to use it 298 */ 299 thr->vfp_state.ns.force_save = true; 300 #endif 301 vfp_lazy_save_state_init(&thr->vfp_state.ns); 302 #endif /*CFG_WITH_VFP*/ 303 } 304 305 static void thread_lazy_restore_ns_vfp(void) 306 { 307 #ifdef CFG_WITH_VFP 308 struct thread_ctx *thr = threads + thread_get_id(); 309 struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp; 310 311 assert(!thr->vfp_state.sec_lazy_saved && !thr->vfp_state.sec_saved); 312 313 if (tuv && tuv->lazy_saved && !tuv->saved) { 314 vfp_lazy_save_state_final(&tuv->vfp); 315 tuv->saved = true; 316 } 317 318 vfp_lazy_restore_state(&thr->vfp_state.ns, thr->vfp_state.ns_saved); 319 thr->vfp_state.ns_saved = false; 320 #endif /*CFG_WITH_VFP*/ 321 } 322 323 #ifdef ARM32 324 static void init_regs(struct thread_ctx *thread, 325 struct thread_smc_args *args) 326 { 327 thread->regs.pc = (uint32_t)thread_std_smc_entry; 328 329 /* 330 * Stdcalls starts in SVC mode with masked IRQ, masked Asynchronous 331 * abort and unmasked FIQ. 332 */ 333 thread->regs.cpsr = read_cpsr() & ARM32_CPSR_E; 334 thread->regs.cpsr |= CPSR_MODE_SVC | CPSR_I | CPSR_A; 335 /* Enable thumb mode if it's a thumb instruction */ 336 if (thread->regs.pc & 1) 337 thread->regs.cpsr |= CPSR_T; 338 /* Reinitialize stack pointer */ 339 thread->regs.svc_sp = thread->stack_va_end; 340 341 /* 342 * Copy arguments into context. This will make the 343 * arguments appear in r0-r7 when thread is started. 344 */ 345 thread->regs.r0 = args->a0; 346 thread->regs.r1 = args->a1; 347 thread->regs.r2 = args->a2; 348 thread->regs.r3 = args->a3; 349 thread->regs.r4 = args->a4; 350 thread->regs.r5 = args->a5; 351 thread->regs.r6 = args->a6; 352 thread->regs.r7 = args->a7; 353 } 354 #endif /*ARM32*/ 355 356 #ifdef ARM64 357 static void init_regs(struct thread_ctx *thread, 358 struct thread_smc_args *args) 359 { 360 thread->regs.pc = (uint64_t)thread_std_smc_entry; 361 362 /* 363 * Stdcalls starts in SVC mode with masked IRQ, masked Asynchronous 364 * abort and unmasked FIQ. 365 */ 366 thread->regs.cpsr = SPSR_64(SPSR_64_MODE_EL1, SPSR_64_MODE_SP_EL0, 367 DAIFBIT_IRQ | DAIFBIT_ABT); 368 /* Reinitialize stack pointer */ 369 thread->regs.sp = thread->stack_va_end; 370 371 /* 372 * Copy arguments into context. This will make the 373 * arguments appear in x0-x7 when thread is started. 374 */ 375 thread->regs.x[0] = args->a0; 376 thread->regs.x[1] = args->a1; 377 thread->regs.x[2] = args->a2; 378 thread->regs.x[3] = args->a3; 379 thread->regs.x[4] = args->a4; 380 thread->regs.x[5] = args->a5; 381 thread->regs.x[6] = args->a6; 382 thread->regs.x[7] = args->a7; 383 } 384 #endif /*ARM64*/ 385 386 void thread_init_boot_thread(void) 387 { 388 struct thread_core_local *l = thread_get_core_local(); 389 size_t n; 390 391 for (n = 0; n < CFG_NUM_THREADS; n++) 392 TAILQ_INIT(&threads[n].mutexes); 393 394 for (n = 0; n < CFG_TEE_CORE_NB_CORE; n++) 395 thread_core_local[n].curr_thread = -1; 396 397 l->curr_thread = 0; 398 threads[0].state = THREAD_STATE_ACTIVE; 399 } 400 401 void thread_clr_boot_thread(void) 402 { 403 struct thread_core_local *l = thread_get_core_local(); 404 405 assert(l->curr_thread >= 0 && l->curr_thread < CFG_NUM_THREADS); 406 assert(threads[l->curr_thread].state == THREAD_STATE_ACTIVE); 407 assert(TAILQ_EMPTY(&threads[l->curr_thread].mutexes)); 408 threads[l->curr_thread].state = THREAD_STATE_FREE; 409 l->curr_thread = -1; 410 } 411 412 static void thread_alloc_and_run(struct thread_smc_args *args) 413 { 414 size_t n; 415 struct thread_core_local *l = thread_get_core_local(); 416 bool found_thread = false; 417 418 assert(l->curr_thread == -1); 419 420 lock_global(); 421 422 for (n = 0; n < CFG_NUM_THREADS; n++) { 423 if (threads[n].state == THREAD_STATE_FREE) { 424 threads[n].state = THREAD_STATE_ACTIVE; 425 found_thread = true; 426 break; 427 } 428 } 429 430 unlock_global(); 431 432 if (!found_thread) { 433 args->a0 = OPTEE_SMC_RETURN_ETHREAD_LIMIT; 434 return; 435 } 436 437 l->curr_thread = n; 438 439 threads[n].flags = 0; 440 init_regs(threads + n, args); 441 442 /* Save Hypervisor Client ID */ 443 threads[n].hyp_clnt_id = args->a7; 444 445 thread_lazy_save_ns_vfp(); 446 thread_resume(&threads[n].regs); 447 } 448 449 #ifdef ARM32 450 static void copy_a0_to_a5(struct thread_ctx_regs *regs, 451 struct thread_smc_args *args) 452 { 453 /* 454 * Update returned values from RPC, values will appear in 455 * r0-r3 when thread is resumed. 456 */ 457 regs->r0 = args->a0; 458 regs->r1 = args->a1; 459 regs->r2 = args->a2; 460 regs->r3 = args->a3; 461 regs->r4 = args->a4; 462 regs->r5 = args->a5; 463 } 464 #endif /*ARM32*/ 465 466 #ifdef ARM64 467 static void copy_a0_to_a5(struct thread_ctx_regs *regs, 468 struct thread_smc_args *args) 469 { 470 /* 471 * Update returned values from RPC, values will appear in 472 * x0-x3 when thread is resumed. 473 */ 474 regs->x[0] = args->a0; 475 regs->x[1] = args->a1; 476 regs->x[2] = args->a2; 477 regs->x[3] = args->a3; 478 regs->x[4] = args->a4; 479 regs->x[5] = args->a5; 480 } 481 #endif /*ARM64*/ 482 483 static void thread_resume_from_rpc(struct thread_smc_args *args) 484 { 485 size_t n = args->a3; /* thread id */ 486 struct thread_core_local *l = thread_get_core_local(); 487 uint32_t rv = 0; 488 489 assert(l->curr_thread == -1); 490 491 lock_global(); 492 493 if (n < CFG_NUM_THREADS && 494 threads[n].state == THREAD_STATE_SUSPENDED && 495 args->a7 == threads[n].hyp_clnt_id) 496 threads[n].state = THREAD_STATE_ACTIVE; 497 else 498 rv = OPTEE_SMC_RETURN_ERESUME; 499 500 unlock_global(); 501 502 if (rv) { 503 args->a0 = rv; 504 return; 505 } 506 507 l->curr_thread = n; 508 509 if (threads[n].have_user_map) 510 core_mmu_set_user_map(&threads[n].user_map); 511 512 /* 513 * Return from RPC to request service of an IRQ must not 514 * get parameters from non-secure world. 515 */ 516 if (threads[n].flags & THREAD_FLAGS_COPY_ARGS_ON_RETURN) { 517 copy_a0_to_a5(&threads[n].regs, args); 518 threads[n].flags &= ~THREAD_FLAGS_COPY_ARGS_ON_RETURN; 519 } 520 521 thread_lazy_save_ns_vfp(); 522 thread_resume(&threads[n].regs); 523 } 524 525 void thread_handle_fast_smc(struct thread_smc_args *args) 526 { 527 thread_check_canaries(); 528 thread_fast_smc_handler_ptr(args); 529 /* Fast handlers must not unmask any exceptions */ 530 assert(thread_get_exceptions() == THREAD_EXCP_ALL); 531 } 532 533 void thread_handle_std_smc(struct thread_smc_args *args) 534 { 535 thread_check_canaries(); 536 537 if (args->a0 == OPTEE_SMC_CALL_RETURN_FROM_RPC) 538 thread_resume_from_rpc(args); 539 else 540 thread_alloc_and_run(args); 541 } 542 543 /* Helper routine for the assembly function thread_std_smc_entry() */ 544 void __thread_std_smc_entry(struct thread_smc_args *args) 545 { 546 struct thread_ctx *thr = threads + thread_get_id(); 547 548 if (!thr->rpc_arg) { 549 paddr_t parg; 550 uint64_t carg; 551 void *arg; 552 553 thread_rpc_alloc_arg( 554 OPTEE_MSG_GET_ARG_SIZE(RPC_MAX_NUM_PARAMS), 555 &parg, &carg); 556 if (!parg || !ALIGNMENT_IS_OK(parg, struct optee_msg_arg) || 557 !(arg = phys_to_virt(parg, CORE_MEM_NSEC_SHM))) { 558 thread_rpc_free_arg(carg); 559 args->a0 = OPTEE_SMC_RETURN_ENOMEM; 560 return; 561 } 562 563 thr->rpc_arg = arg; 564 thr->rpc_carg = carg; 565 } 566 567 thread_std_smc_handler_ptr(args); 568 569 if (!thread_prealloc_rpc_cache) { 570 thread_rpc_free_arg(thr->rpc_carg); 571 thr->rpc_carg = 0; 572 thr->rpc_arg = 0; 573 } 574 } 575 576 void *thread_get_tmp_sp(void) 577 { 578 struct thread_core_local *l = thread_get_core_local(); 579 580 return (void *)l->tmp_stack_va_end; 581 } 582 583 #ifdef ARM64 584 vaddr_t thread_get_saved_thread_sp(void) 585 { 586 struct thread_core_local *l = thread_get_core_local(); 587 int ct = l->curr_thread; 588 589 assert(ct != -1); 590 return threads[ct].kern_sp; 591 } 592 #endif /*ARM64*/ 593 594 bool thread_addr_is_in_stack(vaddr_t va) 595 { 596 struct thread_ctx *thr = threads + thread_get_id(); 597 598 return va < thr->stack_va_end && 599 va >= (thr->stack_va_end - STACK_THREAD_SIZE); 600 } 601 602 void thread_state_free(void) 603 { 604 struct thread_core_local *l = thread_get_core_local(); 605 int ct = l->curr_thread; 606 607 assert(ct != -1); 608 assert(TAILQ_EMPTY(&threads[ct].mutexes)); 609 610 thread_lazy_restore_ns_vfp(); 611 612 lock_global(); 613 614 assert(threads[ct].state == THREAD_STATE_ACTIVE); 615 threads[ct].state = THREAD_STATE_FREE; 616 threads[ct].flags = 0; 617 l->curr_thread = -1; 618 619 unlock_global(); 620 } 621 622 #ifdef ARM32 623 static bool is_from_user(uint32_t cpsr) 624 { 625 return (cpsr & ARM32_CPSR_MODE_MASK) == ARM32_CPSR_MODE_USR; 626 } 627 #endif 628 629 #ifdef ARM64 630 static bool is_from_user(uint32_t cpsr) 631 { 632 if (cpsr & (SPSR_MODE_RW_32 << SPSR_MODE_RW_SHIFT)) 633 return true; 634 if (((cpsr >> SPSR_64_MODE_EL_SHIFT) & SPSR_64_MODE_EL_MASK) == 635 SPSR_64_MODE_EL0) 636 return true; 637 return false; 638 } 639 #endif 640 641 int thread_state_suspend(uint32_t flags, uint32_t cpsr, vaddr_t pc) 642 { 643 struct thread_core_local *l = thread_get_core_local(); 644 int ct = l->curr_thread; 645 646 assert(ct != -1); 647 648 thread_check_canaries(); 649 650 if (is_from_user(cpsr)) 651 thread_user_save_vfp(); 652 thread_lazy_restore_ns_vfp(); 653 654 lock_global(); 655 656 assert(threads[ct].state == THREAD_STATE_ACTIVE); 657 threads[ct].flags |= flags; 658 threads[ct].regs.cpsr = cpsr; 659 threads[ct].regs.pc = pc; 660 threads[ct].state = THREAD_STATE_SUSPENDED; 661 662 threads[ct].have_user_map = core_mmu_user_mapping_is_active(); 663 if (threads[ct].have_user_map) { 664 core_mmu_get_user_map(&threads[ct].user_map); 665 core_mmu_set_user_map(NULL); 666 } 667 668 669 l->curr_thread = -1; 670 671 unlock_global(); 672 673 return ct; 674 } 675 676 #ifdef ARM32 677 static void set_tmp_stack(struct thread_core_local *l, vaddr_t sp) 678 { 679 l->tmp_stack_va_end = sp; 680 thread_set_irq_sp(sp); 681 thread_set_fiq_sp(sp); 682 } 683 684 static void set_abt_stack(struct thread_core_local *l __unused, vaddr_t sp) 685 { 686 thread_set_abt_sp(sp); 687 } 688 #endif /*ARM32*/ 689 690 #ifdef ARM64 691 static void set_tmp_stack(struct thread_core_local *l, vaddr_t sp) 692 { 693 /* 694 * We're already using the tmp stack when this function is called 695 * so there's no need to assign it to any stack pointer. However, 696 * we'll need to restore it at different times so store it here. 697 */ 698 l->tmp_stack_va_end = sp; 699 } 700 701 static void set_abt_stack(struct thread_core_local *l, vaddr_t sp) 702 { 703 l->abt_stack_va_end = sp; 704 } 705 #endif /*ARM64*/ 706 707 bool thread_init_stack(uint32_t thread_id, vaddr_t sp) 708 { 709 if (thread_id >= CFG_NUM_THREADS) 710 return false; 711 threads[thread_id].stack_va_end = sp; 712 return true; 713 } 714 715 int thread_get_id_may_fail(void) 716 { 717 /* thread_get_core_local() requires IRQs to be disabled */ 718 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_IRQ); 719 struct thread_core_local *l = thread_get_core_local(); 720 int ct = l->curr_thread; 721 722 thread_unmask_exceptions(exceptions); 723 return ct; 724 } 725 726 int thread_get_id(void) 727 { 728 int ct = thread_get_id_may_fail(); 729 730 assert((ct >= 0) && (ct < CFG_NUM_THREADS)); 731 return ct; 732 } 733 734 static void init_handlers(const struct thread_handlers *handlers) 735 { 736 thread_std_smc_handler_ptr = handlers->std_smc; 737 thread_fast_smc_handler_ptr = handlers->fast_smc; 738 thread_fiq_handler_ptr = handlers->fiq; 739 thread_cpu_on_handler_ptr = handlers->cpu_on; 740 thread_cpu_off_handler_ptr = handlers->cpu_off; 741 thread_cpu_suspend_handler_ptr = handlers->cpu_suspend; 742 thread_cpu_resume_handler_ptr = handlers->cpu_resume; 743 thread_system_off_handler_ptr = handlers->system_off; 744 thread_system_reset_handler_ptr = handlers->system_reset; 745 } 746 747 748 #ifdef CFG_WITH_PAGER 749 static void init_thread_stacks(void) 750 { 751 size_t n; 752 753 /* 754 * Allocate virtual memory for thread stacks. 755 */ 756 for (n = 0; n < CFG_NUM_THREADS; n++) { 757 tee_mm_entry_t *mm; 758 vaddr_t sp; 759 760 /* Find vmem for thread stack and its protection gap */ 761 mm = tee_mm_alloc(&tee_mm_vcore, 762 SMALL_PAGE_SIZE + STACK_THREAD_SIZE); 763 TEE_ASSERT(mm); 764 765 /* Claim eventual physical page */ 766 tee_pager_add_pages(tee_mm_get_smem(mm), tee_mm_get_size(mm), 767 true); 768 769 /* Realloc both protection vmem and stack vmem separately */ 770 sp = tee_mm_get_smem(mm); 771 tee_mm_free(mm); 772 mm = tee_mm_alloc2(&tee_mm_vcore, sp, SMALL_PAGE_SIZE); 773 TEE_ASSERT(mm); 774 mm = tee_mm_alloc2(&tee_mm_vcore, sp + SMALL_PAGE_SIZE, 775 STACK_THREAD_SIZE); 776 TEE_ASSERT(mm); 777 778 /* init effective stack */ 779 sp = tee_mm_get_smem(mm) + tee_mm_get_bytes(mm); 780 if (!thread_init_stack(n, sp)) 781 panic(); 782 783 /* Add the area to the pager */ 784 tee_pager_add_area(mm, TEE_PAGER_AREA_RW, NULL, NULL); 785 } 786 } 787 #else 788 static void init_thread_stacks(void) 789 { 790 size_t n; 791 792 /* Assign the thread stacks */ 793 for (n = 0; n < CFG_NUM_THREADS; n++) { 794 if (!thread_init_stack(n, GET_STACK(stack_thread[n]))) 795 panic(); 796 } 797 } 798 #endif /*CFG_WITH_PAGER*/ 799 800 void thread_init_primary(const struct thread_handlers *handlers) 801 { 802 init_handlers(handlers); 803 804 /* Initialize canaries around the stacks */ 805 init_canaries(); 806 807 init_thread_stacks(); 808 } 809 810 static void init_sec_mon(size_t pos __maybe_unused) 811 { 812 #if !defined(CFG_WITH_ARM_TRUSTED_FW) 813 /* Initialize secure monitor */ 814 sm_init(GET_STACK(stack_sm[pos])); 815 sm_set_entry_vector(thread_vector_table); 816 #endif 817 } 818 819 void thread_init_per_cpu(void) 820 { 821 size_t pos = get_core_pos(); 822 struct thread_core_local *l = thread_get_core_local(); 823 824 init_sec_mon(pos); 825 826 set_tmp_stack(l, GET_STACK(stack_tmp[pos])); 827 set_abt_stack(l, GET_STACK(stack_abt[pos])); 828 829 thread_init_vbar(); 830 } 831 832 struct thread_specific_data *thread_get_tsd(void) 833 { 834 return &threads[thread_get_id()].tsd; 835 } 836 837 struct thread_ctx_regs *thread_get_ctx_regs(void) 838 { 839 struct thread_core_local *l = thread_get_core_local(); 840 841 assert(l->curr_thread != -1); 842 return &threads[l->curr_thread].regs; 843 } 844 845 void thread_set_irq(bool enable) 846 { 847 /* thread_get_core_local() requires IRQs to be disabled */ 848 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_IRQ); 849 struct thread_core_local *l; 850 851 l = thread_get_core_local(); 852 853 assert(l->curr_thread != -1); 854 855 if (enable) { 856 threads[l->curr_thread].flags |= THREAD_FLAGS_IRQ_ENABLE; 857 thread_set_exceptions(exceptions & ~THREAD_EXCP_IRQ); 858 } else { 859 /* 860 * No need to disable IRQ here since it's already disabled 861 * above. 862 */ 863 threads[l->curr_thread].flags &= ~THREAD_FLAGS_IRQ_ENABLE; 864 } 865 } 866 867 void thread_restore_irq(void) 868 { 869 /* thread_get_core_local() requires IRQs to be disabled */ 870 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_IRQ); 871 struct thread_core_local *l; 872 873 l = thread_get_core_local(); 874 875 assert(l->curr_thread != -1); 876 877 if (threads[l->curr_thread].flags & THREAD_FLAGS_IRQ_ENABLE) 878 thread_set_exceptions(exceptions & ~THREAD_EXCP_IRQ); 879 } 880 881 #ifdef CFG_WITH_VFP 882 uint32_t thread_kernel_enable_vfp(void) 883 { 884 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_IRQ); 885 struct thread_ctx *thr = threads + thread_get_id(); 886 struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp; 887 888 assert(!vfp_is_enabled()); 889 890 if (!thr->vfp_state.ns_saved) { 891 vfp_lazy_save_state_final(&thr->vfp_state.ns); 892 thr->vfp_state.ns_saved = true; 893 } else if (thr->vfp_state.sec_lazy_saved && 894 !thr->vfp_state.sec_saved) { 895 /* 896 * This happens when we're handling an abort while the 897 * thread was using the VFP state. 898 */ 899 vfp_lazy_save_state_final(&thr->vfp_state.sec); 900 thr->vfp_state.sec_saved = true; 901 } else if (tuv && tuv->lazy_saved && !tuv->saved) { 902 /* 903 * This can happen either during syscall or abort 904 * processing (while processing a syscall). 905 */ 906 vfp_lazy_save_state_final(&tuv->vfp); 907 tuv->saved = true; 908 } 909 910 vfp_enable(); 911 return exceptions; 912 } 913 914 void thread_kernel_disable_vfp(uint32_t state) 915 { 916 uint32_t exceptions; 917 918 assert(vfp_is_enabled()); 919 920 vfp_disable(); 921 exceptions = thread_get_exceptions(); 922 assert(exceptions & THREAD_EXCP_IRQ); 923 exceptions &= ~THREAD_EXCP_IRQ; 924 exceptions |= state & THREAD_EXCP_IRQ; 925 thread_set_exceptions(exceptions); 926 } 927 928 void thread_kernel_save_vfp(void) 929 { 930 struct thread_ctx *thr = threads + thread_get_id(); 931 932 assert(thread_get_exceptions() & THREAD_EXCP_IRQ); 933 if (vfp_is_enabled()) { 934 vfp_lazy_save_state_init(&thr->vfp_state.sec); 935 thr->vfp_state.sec_lazy_saved = true; 936 } 937 } 938 939 void thread_kernel_restore_vfp(void) 940 { 941 struct thread_ctx *thr = threads + thread_get_id(); 942 943 assert(thread_get_exceptions() & THREAD_EXCP_IRQ); 944 assert(!vfp_is_enabled()); 945 if (thr->vfp_state.sec_lazy_saved) { 946 vfp_lazy_restore_state(&thr->vfp_state.sec, 947 thr->vfp_state.sec_saved); 948 thr->vfp_state.sec_saved = false; 949 thr->vfp_state.sec_lazy_saved = false; 950 } 951 } 952 953 void thread_user_enable_vfp(struct thread_user_vfp_state *uvfp) 954 { 955 struct thread_ctx *thr = threads + thread_get_id(); 956 struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp; 957 958 assert(thread_get_exceptions() & THREAD_EXCP_IRQ); 959 assert(!vfp_is_enabled()); 960 961 if (!thr->vfp_state.ns_saved) { 962 vfp_lazy_save_state_final(&thr->vfp_state.ns); 963 thr->vfp_state.ns_saved = true; 964 } else if (tuv && uvfp != tuv) { 965 if (tuv->lazy_saved && !tuv->saved) { 966 vfp_lazy_save_state_final(&tuv->vfp); 967 tuv->saved = true; 968 } 969 } 970 971 if (uvfp->lazy_saved) 972 vfp_lazy_restore_state(&uvfp->vfp, uvfp->saved); 973 uvfp->lazy_saved = false; 974 uvfp->saved = false; 975 976 thr->vfp_state.uvfp = uvfp; 977 vfp_enable(); 978 } 979 980 void thread_user_save_vfp(void) 981 { 982 struct thread_ctx *thr = threads + thread_get_id(); 983 struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp; 984 985 assert(thread_get_exceptions() & THREAD_EXCP_IRQ); 986 if (!vfp_is_enabled()) 987 return; 988 989 assert(tuv && !tuv->lazy_saved && !tuv->saved); 990 vfp_lazy_save_state_init(&tuv->vfp); 991 tuv->lazy_saved = true; 992 } 993 994 void thread_user_clear_vfp(struct thread_user_vfp_state *uvfp) 995 { 996 struct thread_ctx *thr = threads + thread_get_id(); 997 998 if (uvfp == thr->vfp_state.uvfp) 999 thr->vfp_state.uvfp = NULL; 1000 uvfp->lazy_saved = false; 1001 uvfp->saved = false; 1002 } 1003 #endif /*CFG_WITH_VFP*/ 1004 1005 #ifdef ARM32 1006 static bool get_spsr(bool is_32bit, unsigned long entry_func, uint32_t *spsr) 1007 { 1008 uint32_t s; 1009 1010 if (!is_32bit) 1011 return false; 1012 1013 s = read_spsr(); 1014 s &= ~(CPSR_MODE_MASK | CPSR_T | CPSR_IT_MASK1 | CPSR_IT_MASK2); 1015 s |= CPSR_MODE_USR; 1016 if (entry_func & 1) 1017 s |= CPSR_T; 1018 *spsr = s; 1019 return true; 1020 } 1021 #endif 1022 1023 #ifdef ARM64 1024 static bool get_spsr(bool is_32bit, unsigned long entry_func, uint32_t *spsr) 1025 { 1026 uint32_t s; 1027 1028 if (is_32bit) { 1029 s = read_daif() & (SPSR_32_AIF_MASK << SPSR_32_AIF_SHIFT); 1030 s |= SPSR_MODE_RW_32 << SPSR_MODE_RW_SHIFT; 1031 s |= (entry_func & SPSR_32_T_MASK) << SPSR_32_T_SHIFT; 1032 } else { 1033 s = read_daif() & (SPSR_64_DAIF_MASK << SPSR_64_DAIF_SHIFT); 1034 } 1035 1036 *spsr = s; 1037 return true; 1038 } 1039 #endif 1040 1041 uint32_t thread_enter_user_mode(unsigned long a0, unsigned long a1, 1042 unsigned long a2, unsigned long a3, unsigned long user_sp, 1043 unsigned long entry_func, bool is_32bit, 1044 uint32_t *exit_status0, uint32_t *exit_status1) 1045 { 1046 uint32_t spsr; 1047 1048 if (!get_spsr(is_32bit, entry_func, &spsr)) { 1049 *exit_status0 = 1; /* panic */ 1050 *exit_status1 = 0xbadbadba; 1051 return 0; 1052 } 1053 return __thread_enter_user_mode(a0, a1, a2, a3, user_sp, entry_func, 1054 spsr, exit_status0, exit_status1); 1055 } 1056 1057 void thread_add_mutex(struct mutex *m) 1058 { 1059 struct thread_core_local *l = thread_get_core_local(); 1060 int ct = l->curr_thread; 1061 1062 assert(ct != -1 && threads[ct].state == THREAD_STATE_ACTIVE); 1063 assert(m->owner_id == -1); 1064 m->owner_id = ct; 1065 TAILQ_INSERT_TAIL(&threads[ct].mutexes, m, link); 1066 } 1067 1068 void thread_rem_mutex(struct mutex *m) 1069 { 1070 struct thread_core_local *l = thread_get_core_local(); 1071 int ct = l->curr_thread; 1072 1073 assert(ct != -1 && threads[ct].state == THREAD_STATE_ACTIVE); 1074 assert(m->owner_id == ct); 1075 m->owner_id = -1; 1076 TAILQ_REMOVE(&threads[ct].mutexes, m, link); 1077 } 1078 1079 bool thread_disable_prealloc_rpc_cache(uint64_t *cookie) 1080 { 1081 bool rv; 1082 size_t n; 1083 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_IRQ); 1084 1085 lock_global(); 1086 1087 for (n = 0; n < CFG_NUM_THREADS; n++) { 1088 if (threads[n].state != THREAD_STATE_FREE) { 1089 rv = false; 1090 goto out; 1091 } 1092 } 1093 1094 rv = true; 1095 for (n = 0; n < CFG_NUM_THREADS; n++) { 1096 if (threads[n].rpc_arg) { 1097 *cookie = threads[n].rpc_carg; 1098 threads[n].rpc_carg = 0; 1099 threads[n].rpc_arg = NULL; 1100 goto out; 1101 } 1102 } 1103 1104 *cookie = 0; 1105 thread_prealloc_rpc_cache = false; 1106 out: 1107 unlock_global(); 1108 thread_unmask_exceptions(exceptions); 1109 return rv; 1110 } 1111 1112 bool thread_enable_prealloc_rpc_cache(void) 1113 { 1114 bool rv; 1115 size_t n; 1116 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_IRQ); 1117 1118 lock_global(); 1119 1120 for (n = 0; n < CFG_NUM_THREADS; n++) { 1121 if (threads[n].state != THREAD_STATE_FREE) { 1122 rv = false; 1123 goto out; 1124 } 1125 } 1126 1127 rv = true; 1128 thread_prealloc_rpc_cache = true; 1129 out: 1130 unlock_global(); 1131 thread_unmask_exceptions(exceptions); 1132 return rv; 1133 } 1134 1135 static uint32_t rpc_cmd_nolock(uint32_t cmd, size_t num_params, 1136 struct optee_msg_param *params) 1137 { 1138 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { OPTEE_SMC_RETURN_RPC_CMD }; 1139 struct thread_ctx *thr = threads + thread_get_id(); 1140 struct optee_msg_arg *arg = thr->rpc_arg; 1141 uint64_t carg = thr->rpc_carg; 1142 const size_t params_size = sizeof(struct optee_msg_param) * num_params; 1143 size_t n; 1144 1145 TEE_ASSERT(arg && carg && num_params <= RPC_MAX_NUM_PARAMS); 1146 1147 memset(arg, 0, OPTEE_MSG_GET_ARG_SIZE(RPC_MAX_NUM_PARAMS)); 1148 arg->cmd = cmd; 1149 arg->ret = TEE_ERROR_GENERIC; /* in case value isn't updated */ 1150 arg->num_params = num_params; 1151 memcpy(OPTEE_MSG_GET_PARAMS(arg), params, params_size); 1152 1153 reg_pair_from_64(carg, rpc_args + 1, rpc_args + 2); 1154 thread_rpc(rpc_args); 1155 for (n = 0; n < num_params; n++) { 1156 switch (params[n].attr & OPTEE_MSG_ATTR_TYPE_MASK) { 1157 case OPTEE_MSG_ATTR_TYPE_VALUE_OUTPUT: 1158 case OPTEE_MSG_ATTR_TYPE_VALUE_INOUT: 1159 case OPTEE_MSG_ATTR_TYPE_RMEM_OUTPUT: 1160 case OPTEE_MSG_ATTR_TYPE_RMEM_INOUT: 1161 case OPTEE_MSG_ATTR_TYPE_TMEM_OUTPUT: 1162 case OPTEE_MSG_ATTR_TYPE_TMEM_INOUT: 1163 memcpy(params + n, OPTEE_MSG_GET_PARAMS(arg) + n, 1164 sizeof(struct optee_msg_param)); 1165 break; 1166 default: 1167 break; 1168 } 1169 } 1170 return arg->ret; 1171 } 1172 1173 uint32_t thread_rpc_cmd(uint32_t cmd, size_t num_params, 1174 struct optee_msg_param *params) 1175 { 1176 uint32_t ret; 1177 1178 ret = rpc_cmd_nolock(cmd, num_params, params); 1179 1180 return ret; 1181 } 1182 1183 void thread_rpc_alloc_arg(size_t size, paddr_t *arg, uint64_t *cookie) 1184 { 1185 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { 1186 OPTEE_SMC_RETURN_RPC_ALLOC, size}; 1187 1188 thread_rpc(rpc_args); 1189 *arg = reg_pair_to_64(rpc_args[1], rpc_args[2]); 1190 *cookie = reg_pair_to_64(rpc_args[4], rpc_args[5]); 1191 } 1192 1193 /** 1194 * Allocates shared memory buffer via RPC 1195 * 1196 * @size: size in bytes of shared memory buffer 1197 * @align: required alignment of buffer 1198 * @bt: buffer type OPTEE_MSG_RPC_SHM_TYPE_* 1199 * @payload: returned physical pointer to buffer, 0 if allocation 1200 * failed. 1201 * @cookie: returned cookie used when freeing the buffer 1202 */ 1203 static void thread_rpc_alloc(size_t size, size_t align, unsigned bt, 1204 paddr_t *payload, uint64_t *cookie) 1205 { 1206 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { OPTEE_SMC_RETURN_RPC_CMD }; 1207 struct thread_ctx *thr = threads + thread_get_id(); 1208 struct optee_msg_arg *arg = thr->rpc_arg; 1209 uint64_t carg = thr->rpc_carg; 1210 struct optee_msg_param *params = OPTEE_MSG_GET_PARAMS(arg); 1211 1212 memset(arg, 0, OPTEE_MSG_GET_ARG_SIZE(1)); 1213 arg->cmd = OPTEE_MSG_RPC_CMD_SHM_ALLOC; 1214 arg->ret = TEE_ERROR_GENERIC; /* in case value isn't updated */ 1215 arg->num_params = 1; 1216 1217 params[0].attr = OPTEE_MSG_ATTR_TYPE_VALUE_INPUT; 1218 params[0].u.value.a = bt; 1219 params[0].u.value.b = size; 1220 params[0].u.value.c = align; 1221 1222 reg_pair_from_64(carg, rpc_args + 1, rpc_args + 2); 1223 thread_rpc(rpc_args); 1224 if (arg->ret != TEE_SUCCESS) 1225 goto fail; 1226 1227 if (arg->num_params != 1) 1228 goto fail; 1229 1230 if (params[0].attr != OPTEE_MSG_ATTR_TYPE_TMEM_OUTPUT) 1231 goto fail; 1232 1233 *payload = params[0].u.tmem.buf_ptr; 1234 *cookie = params[0].u.tmem.shm_ref; 1235 return; 1236 fail: 1237 *payload = 0; 1238 *cookie = 0; 1239 } 1240 1241 /** 1242 * Free physical memory previously allocated with thread_rpc_alloc() 1243 * 1244 * @cookie: cookie received when allocating the buffer 1245 * @bt: must be the same as supplied when allocating 1246 */ 1247 static void thread_rpc_free(unsigned bt, uint64_t cookie) 1248 { 1249 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { OPTEE_SMC_RETURN_RPC_CMD }; 1250 struct thread_ctx *thr = threads + thread_get_id(); 1251 struct optee_msg_arg *arg = thr->rpc_arg; 1252 uint64_t carg = thr->rpc_carg; 1253 struct optee_msg_param *params = OPTEE_MSG_GET_PARAMS(arg); 1254 1255 memset(arg, 0, OPTEE_MSG_GET_ARG_SIZE(1)); 1256 arg->cmd = OPTEE_MSG_RPC_CMD_SHM_FREE; 1257 arg->ret = TEE_ERROR_GENERIC; /* in case value isn't updated */ 1258 arg->num_params = 1; 1259 1260 params[0].attr = OPTEE_MSG_ATTR_TYPE_VALUE_INPUT; 1261 params[0].u.value.a = bt; 1262 params[0].u.value.b = cookie; 1263 params[0].u.value.c = 0; 1264 1265 reg_pair_from_64(carg, rpc_args + 1, rpc_args + 2); 1266 thread_rpc(rpc_args); 1267 } 1268 1269 1270 void thread_rpc_free_arg(uint64_t cookie) 1271 { 1272 if (cookie) { 1273 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { 1274 OPTEE_SMC_RETURN_RPC_FREE}; 1275 1276 reg_pair_from_64(cookie, rpc_args + 1, rpc_args + 2); 1277 thread_rpc(rpc_args); 1278 } 1279 } 1280 1281 void thread_rpc_alloc_payload(size_t size, paddr_t *payload, uint64_t *cookie) 1282 { 1283 thread_rpc_alloc(size, 8, OPTEE_MSG_RPC_SHM_TYPE_APPL, payload, cookie); 1284 } 1285 1286 void thread_rpc_free_payload(uint64_t cookie) 1287 { 1288 thread_rpc_free(OPTEE_MSG_RPC_SHM_TYPE_APPL, cookie); 1289 } 1290