1 /* 2 * Copyright (c) 2016, Linaro Limited 3 * Copyright (c) 2014, STMicroelectronics International N.V. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright notice, 10 * this list of conditions and the following disclaimer. 11 * 12 * 2. Redistributions in binary form must reproduce the above copyright notice, 13 * this list of conditions and the following disclaimer in the documentation 14 * and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 20 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <platform_config.h> 30 31 #include <arm.h> 32 #include <assert.h> 33 #include <keep.h> 34 #include <kernel/misc.h> 35 #include <kernel/panic.h> 36 #include <kernel/spinlock.h> 37 #include <kernel/tee_ta_manager.h> 38 #include <kernel/thread_defs.h> 39 #include <kernel/thread.h> 40 #include <mm/core_memprot.h> 41 #include <mm/tee_mm.h> 42 #include <mm/tee_mmu_defs.h> 43 #include <mm/tee_mmu.h> 44 #include <mm/tee_pager.h> 45 #include <optee_msg.h> 46 #include <sm/optee_smc.h> 47 #include <sm/sm.h> 48 #include <tee/tee_fs_rpc.h> 49 #include <trace.h> 50 #include <util.h> 51 52 #include "thread_private.h" 53 54 #ifdef CFG_WITH_ARM_TRUSTED_FW 55 #define STACK_TMP_OFFS 0 56 #else 57 #define STACK_TMP_OFFS SM_STACK_TMP_RESERVE_SIZE 58 #endif 59 60 61 #ifdef ARM32 62 #ifdef CFG_CORE_SANITIZE_KADDRESS 63 #define STACK_TMP_SIZE (3072 + STACK_TMP_OFFS) 64 #else 65 #define STACK_TMP_SIZE (1024 + STACK_TMP_OFFS) 66 #endif 67 #define STACK_THREAD_SIZE 8192 68 69 #if TRACE_LEVEL > 0 70 #ifdef CFG_CORE_SANITIZE_KADDRESS 71 #define STACK_ABT_SIZE 3072 72 #else 73 #define STACK_ABT_SIZE 2048 74 #endif 75 #else 76 #define STACK_ABT_SIZE 1024 77 #endif 78 79 #endif /*ARM32*/ 80 81 #ifdef ARM64 82 #define STACK_TMP_SIZE (2048 + STACK_TMP_OFFS) 83 #define STACK_THREAD_SIZE 8192 84 85 #if TRACE_LEVEL > 0 86 #define STACK_ABT_SIZE 3072 87 #else 88 #define STACK_ABT_SIZE 1024 89 #endif 90 #endif /*ARM64*/ 91 92 struct thread_ctx threads[CFG_NUM_THREADS]; 93 94 static struct thread_core_local thread_core_local[CFG_TEE_CORE_NB_CORE]; 95 96 #ifdef CFG_WITH_STACK_CANARIES 97 #ifdef ARM32 98 #define STACK_CANARY_SIZE (4 * sizeof(uint32_t)) 99 #endif 100 #ifdef ARM64 101 #define STACK_CANARY_SIZE (8 * sizeof(uint32_t)) 102 #endif 103 #define START_CANARY_VALUE 0xdededede 104 #define END_CANARY_VALUE 0xabababab 105 #define GET_START_CANARY(name, stack_num) name[stack_num][0] 106 #define GET_END_CANARY(name, stack_num) \ 107 name[stack_num][sizeof(name[stack_num]) / sizeof(uint32_t) - 1] 108 #else 109 #define STACK_CANARY_SIZE 0 110 #endif 111 112 #define DECLARE_STACK(name, num_stacks, stack_size, linkage) \ 113 linkage uint32_t name[num_stacks] \ 114 [ROUNDUP(stack_size + STACK_CANARY_SIZE, STACK_ALIGNMENT) / \ 115 sizeof(uint32_t)] \ 116 __attribute__((section(".nozi_stack"), \ 117 aligned(STACK_ALIGNMENT))) 118 119 #define STACK_SIZE(stack) (sizeof(stack) - STACK_CANARY_SIZE / 2) 120 121 #define GET_STACK(stack) \ 122 ((vaddr_t)(stack) + STACK_SIZE(stack)) 123 124 DECLARE_STACK(stack_tmp, CFG_TEE_CORE_NB_CORE, STACK_TMP_SIZE, /* global */); 125 DECLARE_STACK(stack_abt, CFG_TEE_CORE_NB_CORE, STACK_ABT_SIZE, static); 126 #ifndef CFG_WITH_PAGER 127 DECLARE_STACK(stack_thread, CFG_NUM_THREADS, STACK_THREAD_SIZE, static); 128 #endif 129 130 const uint32_t stack_tmp_stride = sizeof(stack_tmp[0]); 131 const uint32_t stack_tmp_offset = STACK_TMP_OFFS + STACK_CANARY_SIZE / 2; 132 133 /* 134 * These stack setup info are required by secondary boot cores before they 135 * each locally enable the pager (the mmu). Hence kept in pager sections. 136 */ 137 KEEP_PAGER(stack_tmp); 138 KEEP_PAGER(stack_tmp_stride); 139 KEEP_PAGER(stack_tmp_offset); 140 141 thread_smc_handler_t thread_std_smc_handler_ptr; 142 static thread_smc_handler_t thread_fast_smc_handler_ptr; 143 thread_fiq_handler_t thread_fiq_handler_ptr; 144 thread_pm_handler_t thread_cpu_on_handler_ptr; 145 thread_pm_handler_t thread_cpu_off_handler_ptr; 146 thread_pm_handler_t thread_cpu_suspend_handler_ptr; 147 thread_pm_handler_t thread_cpu_resume_handler_ptr; 148 thread_pm_handler_t thread_system_off_handler_ptr; 149 thread_pm_handler_t thread_system_reset_handler_ptr; 150 151 152 static unsigned int thread_global_lock = SPINLOCK_UNLOCK; 153 static bool thread_prealloc_rpc_cache; 154 155 static void init_canaries(void) 156 { 157 #ifdef CFG_WITH_STACK_CANARIES 158 size_t n; 159 #define INIT_CANARY(name) \ 160 for (n = 0; n < ARRAY_SIZE(name); n++) { \ 161 uint32_t *start_canary = &GET_START_CANARY(name, n); \ 162 uint32_t *end_canary = &GET_END_CANARY(name, n); \ 163 \ 164 *start_canary = START_CANARY_VALUE; \ 165 *end_canary = END_CANARY_VALUE; \ 166 DMSG("#Stack canaries for %s[%zu] with top at %p\n", \ 167 #name, n, (void *)(end_canary - 1)); \ 168 DMSG("watch *%p\n", (void *)end_canary); \ 169 } 170 171 INIT_CANARY(stack_tmp); 172 INIT_CANARY(stack_abt); 173 #ifndef CFG_WITH_PAGER 174 INIT_CANARY(stack_thread); 175 #endif 176 #endif/*CFG_WITH_STACK_CANARIES*/ 177 } 178 179 #define CANARY_DIED(stack, loc, n) \ 180 do { \ 181 EMSG_RAW("Dead canary at %s of '%s[%zu]'", #loc, #stack, n); \ 182 panic(); \ 183 } while (0) 184 185 void thread_check_canaries(void) 186 { 187 #ifdef CFG_WITH_STACK_CANARIES 188 size_t n; 189 190 for (n = 0; n < ARRAY_SIZE(stack_tmp); n++) { 191 if (GET_START_CANARY(stack_tmp, n) != START_CANARY_VALUE) 192 CANARY_DIED(stack_tmp, start, n); 193 if (GET_END_CANARY(stack_tmp, n) != END_CANARY_VALUE) 194 CANARY_DIED(stack_tmp, end, n); 195 } 196 197 for (n = 0; n < ARRAY_SIZE(stack_abt); n++) { 198 if (GET_START_CANARY(stack_abt, n) != START_CANARY_VALUE) 199 CANARY_DIED(stack_abt, start, n); 200 if (GET_END_CANARY(stack_abt, n) != END_CANARY_VALUE) 201 CANARY_DIED(stack_abt, end, n); 202 203 } 204 #ifndef CFG_WITH_PAGER 205 for (n = 0; n < ARRAY_SIZE(stack_thread); n++) { 206 if (GET_START_CANARY(stack_thread, n) != START_CANARY_VALUE) 207 CANARY_DIED(stack_thread, start, n); 208 if (GET_END_CANARY(stack_thread, n) != END_CANARY_VALUE) 209 CANARY_DIED(stack_thread, end, n); 210 } 211 #endif 212 #endif/*CFG_WITH_STACK_CANARIES*/ 213 } 214 215 static void lock_global(void) 216 { 217 cpu_spin_lock(&thread_global_lock); 218 } 219 220 static void unlock_global(void) 221 { 222 cpu_spin_unlock(&thread_global_lock); 223 } 224 225 #ifdef ARM32 226 uint32_t thread_get_exceptions(void) 227 { 228 uint32_t cpsr = read_cpsr(); 229 230 return (cpsr >> CPSR_F_SHIFT) & THREAD_EXCP_ALL; 231 } 232 233 void thread_set_exceptions(uint32_t exceptions) 234 { 235 uint32_t cpsr = read_cpsr(); 236 237 cpsr &= ~(THREAD_EXCP_ALL << CPSR_F_SHIFT); 238 cpsr |= ((exceptions & THREAD_EXCP_ALL) << CPSR_F_SHIFT); 239 write_cpsr(cpsr); 240 } 241 #endif /*ARM32*/ 242 243 #ifdef ARM64 244 uint32_t thread_get_exceptions(void) 245 { 246 uint32_t daif = read_daif(); 247 248 return (daif >> DAIF_F_SHIFT) & THREAD_EXCP_ALL; 249 } 250 251 void thread_set_exceptions(uint32_t exceptions) 252 { 253 uint32_t daif = read_daif(); 254 255 daif &= ~(THREAD_EXCP_ALL << DAIF_F_SHIFT); 256 daif |= ((exceptions & THREAD_EXCP_ALL) << DAIF_F_SHIFT); 257 write_daif(daif); 258 } 259 #endif /*ARM64*/ 260 261 uint32_t thread_mask_exceptions(uint32_t exceptions) 262 { 263 uint32_t state = thread_get_exceptions(); 264 265 thread_set_exceptions(state | (exceptions & THREAD_EXCP_ALL)); 266 return state; 267 } 268 269 void thread_unmask_exceptions(uint32_t state) 270 { 271 thread_set_exceptions(state & THREAD_EXCP_ALL); 272 } 273 274 275 struct thread_core_local *thread_get_core_local(void) 276 { 277 uint32_t cpu_id = get_core_pos(); 278 279 /* 280 * IRQs must be disabled before playing with core_local since 281 * we otherwise may be rescheduled to a different core in the 282 * middle of this function. 283 */ 284 assert(thread_get_exceptions() & THREAD_EXCP_IRQ); 285 286 assert(cpu_id < CFG_TEE_CORE_NB_CORE); 287 return &thread_core_local[cpu_id]; 288 } 289 290 static void thread_lazy_save_ns_vfp(void) 291 { 292 #ifdef CFG_WITH_VFP 293 struct thread_ctx *thr = threads + thread_get_id(); 294 295 thr->vfp_state.ns_saved = false; 296 #if defined(ARM64) && defined(CFG_WITH_ARM_TRUSTED_FW) 297 /* 298 * ARM TF saves and restores CPACR_EL1, so we must assume NS world 299 * uses VFP and always preserve the register file when secure world 300 * is about to use it 301 */ 302 thr->vfp_state.ns.force_save = true; 303 #endif 304 vfp_lazy_save_state_init(&thr->vfp_state.ns); 305 #endif /*CFG_WITH_VFP*/ 306 } 307 308 static void thread_lazy_restore_ns_vfp(void) 309 { 310 #ifdef CFG_WITH_VFP 311 struct thread_ctx *thr = threads + thread_get_id(); 312 struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp; 313 314 assert(!thr->vfp_state.sec_lazy_saved && !thr->vfp_state.sec_saved); 315 316 if (tuv && tuv->lazy_saved && !tuv->saved) { 317 vfp_lazy_save_state_final(&tuv->vfp); 318 tuv->saved = true; 319 } 320 321 vfp_lazy_restore_state(&thr->vfp_state.ns, thr->vfp_state.ns_saved); 322 thr->vfp_state.ns_saved = false; 323 #endif /*CFG_WITH_VFP*/ 324 } 325 326 #ifdef ARM32 327 static void init_regs(struct thread_ctx *thread, 328 struct thread_smc_args *args) 329 { 330 thread->regs.pc = (uint32_t)thread_std_smc_entry; 331 332 /* 333 * Stdcalls starts in SVC mode with masked IRQ, masked Asynchronous 334 * abort and unmasked FIQ. 335 */ 336 thread->regs.cpsr = read_cpsr() & ARM32_CPSR_E; 337 thread->regs.cpsr |= CPSR_MODE_SVC | CPSR_I | CPSR_A; 338 /* Enable thumb mode if it's a thumb instruction */ 339 if (thread->regs.pc & 1) 340 thread->regs.cpsr |= CPSR_T; 341 /* Reinitialize stack pointer */ 342 thread->regs.svc_sp = thread->stack_va_end; 343 344 /* 345 * Copy arguments into context. This will make the 346 * arguments appear in r0-r7 when thread is started. 347 */ 348 thread->regs.r0 = args->a0; 349 thread->regs.r1 = args->a1; 350 thread->regs.r2 = args->a2; 351 thread->regs.r3 = args->a3; 352 thread->regs.r4 = args->a4; 353 thread->regs.r5 = args->a5; 354 thread->regs.r6 = args->a6; 355 thread->regs.r7 = args->a7; 356 } 357 #endif /*ARM32*/ 358 359 #ifdef ARM64 360 static void init_regs(struct thread_ctx *thread, 361 struct thread_smc_args *args) 362 { 363 thread->regs.pc = (uint64_t)thread_std_smc_entry; 364 365 /* 366 * Stdcalls starts in SVC mode with masked IRQ, masked Asynchronous 367 * abort and unmasked FIQ. 368 */ 369 thread->regs.cpsr = SPSR_64(SPSR_64_MODE_EL1, SPSR_64_MODE_SP_EL0, 370 DAIFBIT_IRQ | DAIFBIT_ABT); 371 /* Reinitialize stack pointer */ 372 thread->regs.sp = thread->stack_va_end; 373 374 /* 375 * Copy arguments into context. This will make the 376 * arguments appear in x0-x7 when thread is started. 377 */ 378 thread->regs.x[0] = args->a0; 379 thread->regs.x[1] = args->a1; 380 thread->regs.x[2] = args->a2; 381 thread->regs.x[3] = args->a3; 382 thread->regs.x[4] = args->a4; 383 thread->regs.x[5] = args->a5; 384 thread->regs.x[6] = args->a6; 385 thread->regs.x[7] = args->a7; 386 387 /* Set up frame pointer as per the Aarch64 AAPCS */ 388 thread->regs.x[29] = 0; 389 } 390 #endif /*ARM64*/ 391 392 void thread_init_boot_thread(void) 393 { 394 struct thread_core_local *l = thread_get_core_local(); 395 size_t n; 396 397 for (n = 0; n < CFG_NUM_THREADS; n++) { 398 TAILQ_INIT(&threads[n].mutexes); 399 TAILQ_INIT(&threads[n].tsd.sess_stack); 400 #ifdef CFG_SMALL_PAGE_USER_TA 401 SLIST_INIT(&threads[n].tsd.pgt_cache); 402 #endif 403 } 404 405 for (n = 0; n < CFG_TEE_CORE_NB_CORE; n++) 406 thread_core_local[n].curr_thread = -1; 407 408 l->curr_thread = 0; 409 threads[0].state = THREAD_STATE_ACTIVE; 410 } 411 412 void thread_clr_boot_thread(void) 413 { 414 struct thread_core_local *l = thread_get_core_local(); 415 416 assert(l->curr_thread >= 0 && l->curr_thread < CFG_NUM_THREADS); 417 assert(threads[l->curr_thread].state == THREAD_STATE_ACTIVE); 418 assert(TAILQ_EMPTY(&threads[l->curr_thread].mutexes)); 419 threads[l->curr_thread].state = THREAD_STATE_FREE; 420 l->curr_thread = -1; 421 } 422 423 static void thread_alloc_and_run(struct thread_smc_args *args) 424 { 425 size_t n; 426 struct thread_core_local *l = thread_get_core_local(); 427 bool found_thread = false; 428 429 assert(l->curr_thread == -1); 430 431 lock_global(); 432 433 for (n = 0; n < CFG_NUM_THREADS; n++) { 434 if (threads[n].state == THREAD_STATE_FREE) { 435 threads[n].state = THREAD_STATE_ACTIVE; 436 found_thread = true; 437 break; 438 } 439 } 440 441 unlock_global(); 442 443 if (!found_thread) { 444 args->a0 = OPTEE_SMC_RETURN_ETHREAD_LIMIT; 445 return; 446 } 447 448 l->curr_thread = n; 449 450 threads[n].flags = 0; 451 init_regs(threads + n, args); 452 453 /* Save Hypervisor Client ID */ 454 threads[n].hyp_clnt_id = args->a7; 455 456 thread_lazy_save_ns_vfp(); 457 thread_resume(&threads[n].regs); 458 } 459 460 #ifdef ARM32 461 static void copy_a0_to_a5(struct thread_ctx_regs *regs, 462 struct thread_smc_args *args) 463 { 464 /* 465 * Update returned values from RPC, values will appear in 466 * r0-r3 when thread is resumed. 467 */ 468 regs->r0 = args->a0; 469 regs->r1 = args->a1; 470 regs->r2 = args->a2; 471 regs->r3 = args->a3; 472 regs->r4 = args->a4; 473 regs->r5 = args->a5; 474 } 475 #endif /*ARM32*/ 476 477 #ifdef ARM64 478 static void copy_a0_to_a5(struct thread_ctx_regs *regs, 479 struct thread_smc_args *args) 480 { 481 /* 482 * Update returned values from RPC, values will appear in 483 * x0-x3 when thread is resumed. 484 */ 485 regs->x[0] = args->a0; 486 regs->x[1] = args->a1; 487 regs->x[2] = args->a2; 488 regs->x[3] = args->a3; 489 regs->x[4] = args->a4; 490 regs->x[5] = args->a5; 491 } 492 #endif /*ARM64*/ 493 494 static void thread_resume_from_rpc(struct thread_smc_args *args) 495 { 496 size_t n = args->a3; /* thread id */ 497 struct thread_core_local *l = thread_get_core_local(); 498 uint32_t rv = 0; 499 500 assert(l->curr_thread == -1); 501 502 lock_global(); 503 504 if (n < CFG_NUM_THREADS && 505 threads[n].state == THREAD_STATE_SUSPENDED && 506 args->a7 == threads[n].hyp_clnt_id) 507 threads[n].state = THREAD_STATE_ACTIVE; 508 else 509 rv = OPTEE_SMC_RETURN_ERESUME; 510 511 unlock_global(); 512 513 if (rv) { 514 args->a0 = rv; 515 return; 516 } 517 518 l->curr_thread = n; 519 520 if (threads[n].have_user_map) 521 core_mmu_set_user_map(&threads[n].user_map); 522 523 /* 524 * Return from RPC to request service of an IRQ must not 525 * get parameters from non-secure world. 526 */ 527 if (threads[n].flags & THREAD_FLAGS_COPY_ARGS_ON_RETURN) { 528 copy_a0_to_a5(&threads[n].regs, args); 529 threads[n].flags &= ~THREAD_FLAGS_COPY_ARGS_ON_RETURN; 530 } 531 532 thread_lazy_save_ns_vfp(); 533 thread_resume(&threads[n].regs); 534 } 535 536 void thread_handle_fast_smc(struct thread_smc_args *args) 537 { 538 thread_check_canaries(); 539 thread_fast_smc_handler_ptr(args); 540 /* Fast handlers must not unmask any exceptions */ 541 assert(thread_get_exceptions() == THREAD_EXCP_ALL); 542 } 543 544 void thread_handle_std_smc(struct thread_smc_args *args) 545 { 546 thread_check_canaries(); 547 548 if (args->a0 == OPTEE_SMC_CALL_RETURN_FROM_RPC) 549 thread_resume_from_rpc(args); 550 else 551 thread_alloc_and_run(args); 552 } 553 554 /* Helper routine for the assembly function thread_std_smc_entry() */ 555 void __thread_std_smc_entry(struct thread_smc_args *args) 556 { 557 struct thread_ctx *thr = threads + thread_get_id(); 558 559 if (!thr->rpc_arg) { 560 paddr_t parg; 561 uint64_t carg; 562 void *arg; 563 564 thread_rpc_alloc_arg( 565 OPTEE_MSG_GET_ARG_SIZE(THREAD_RPC_MAX_NUM_PARAMS), 566 &parg, &carg); 567 if (!parg || !ALIGNMENT_IS_OK(parg, struct optee_msg_arg) || 568 !(arg = phys_to_virt(parg, CORE_MEM_NSEC_SHM))) { 569 thread_rpc_free_arg(carg); 570 args->a0 = OPTEE_SMC_RETURN_ENOMEM; 571 return; 572 } 573 574 thr->rpc_arg = arg; 575 thr->rpc_carg = carg; 576 } 577 578 thread_std_smc_handler_ptr(args); 579 580 tee_fs_rpc_cache_clear(&thr->tsd); 581 if (!thread_prealloc_rpc_cache) { 582 thread_rpc_free_arg(thr->rpc_carg); 583 thr->rpc_carg = 0; 584 thr->rpc_arg = 0; 585 } 586 } 587 588 void *thread_get_tmp_sp(void) 589 { 590 struct thread_core_local *l = thread_get_core_local(); 591 592 return (void *)l->tmp_stack_va_end; 593 } 594 595 #ifdef ARM64 596 vaddr_t thread_get_saved_thread_sp(void) 597 { 598 struct thread_core_local *l = thread_get_core_local(); 599 int ct = l->curr_thread; 600 601 assert(ct != -1); 602 return threads[ct].kern_sp; 603 } 604 #endif /*ARM64*/ 605 606 bool thread_addr_is_in_stack(vaddr_t va) 607 { 608 struct thread_ctx *thr; 609 int ct = thread_get_id_may_fail(); 610 611 if (ct == -1) 612 return false; 613 614 thr = threads + ct; 615 return va < thr->stack_va_end && 616 va >= (thr->stack_va_end - STACK_THREAD_SIZE); 617 } 618 619 void thread_state_free(void) 620 { 621 struct thread_core_local *l = thread_get_core_local(); 622 int ct = l->curr_thread; 623 624 assert(ct != -1); 625 assert(TAILQ_EMPTY(&threads[ct].mutexes)); 626 627 thread_lazy_restore_ns_vfp(); 628 tee_pager_release_phys( 629 (void *)(threads[ct].stack_va_end - STACK_THREAD_SIZE), 630 STACK_THREAD_SIZE); 631 632 lock_global(); 633 634 assert(threads[ct].state == THREAD_STATE_ACTIVE); 635 threads[ct].state = THREAD_STATE_FREE; 636 threads[ct].flags = 0; 637 l->curr_thread = -1; 638 639 unlock_global(); 640 } 641 642 #ifdef ARM32 643 static bool is_from_user(uint32_t cpsr) 644 { 645 return (cpsr & ARM32_CPSR_MODE_MASK) == ARM32_CPSR_MODE_USR; 646 } 647 #endif 648 649 #ifdef ARM64 650 static bool is_from_user(uint32_t cpsr) 651 { 652 if (cpsr & (SPSR_MODE_RW_32 << SPSR_MODE_RW_SHIFT)) 653 return true; 654 if (((cpsr >> SPSR_64_MODE_EL_SHIFT) & SPSR_64_MODE_EL_MASK) == 655 SPSR_64_MODE_EL0) 656 return true; 657 return false; 658 } 659 #endif 660 661 #ifdef CFG_WITH_PAGER 662 static void release_unused_kernel_stack(struct thread_ctx *thr) 663 { 664 vaddr_t sp = thr->regs.svc_sp; 665 vaddr_t base = thr->stack_va_end - STACK_THREAD_SIZE; 666 size_t len = sp - base; 667 668 tee_pager_release_phys((void *)base, len); 669 } 670 #else 671 static void release_unused_kernel_stack(struct thread_ctx *thr __unused) 672 { 673 } 674 #endif 675 676 int thread_state_suspend(uint32_t flags, uint32_t cpsr, vaddr_t pc) 677 { 678 struct thread_core_local *l = thread_get_core_local(); 679 int ct = l->curr_thread; 680 681 assert(ct != -1); 682 683 thread_check_canaries(); 684 685 release_unused_kernel_stack(threads + ct); 686 687 if (is_from_user(cpsr)) 688 thread_user_save_vfp(); 689 thread_lazy_restore_ns_vfp(); 690 691 lock_global(); 692 693 assert(threads[ct].state == THREAD_STATE_ACTIVE); 694 threads[ct].flags |= flags; 695 threads[ct].regs.cpsr = cpsr; 696 threads[ct].regs.pc = pc; 697 threads[ct].state = THREAD_STATE_SUSPENDED; 698 699 threads[ct].have_user_map = core_mmu_user_mapping_is_active(); 700 if (threads[ct].have_user_map) { 701 core_mmu_get_user_map(&threads[ct].user_map); 702 core_mmu_set_user_map(NULL); 703 } 704 705 l->curr_thread = -1; 706 707 unlock_global(); 708 709 return ct; 710 } 711 712 #ifdef ARM32 713 static void set_tmp_stack(struct thread_core_local *l, vaddr_t sp) 714 { 715 l->tmp_stack_va_end = sp; 716 thread_set_irq_sp(sp); 717 thread_set_fiq_sp(sp); 718 } 719 720 static void set_abt_stack(struct thread_core_local *l __unused, vaddr_t sp) 721 { 722 thread_set_abt_sp(sp); 723 } 724 #endif /*ARM32*/ 725 726 #ifdef ARM64 727 static void set_tmp_stack(struct thread_core_local *l, vaddr_t sp) 728 { 729 /* 730 * We're already using the tmp stack when this function is called 731 * so there's no need to assign it to any stack pointer. However, 732 * we'll need to restore it at different times so store it here. 733 */ 734 l->tmp_stack_va_end = sp; 735 } 736 737 static void set_abt_stack(struct thread_core_local *l, vaddr_t sp) 738 { 739 l->abt_stack_va_end = sp; 740 } 741 #endif /*ARM64*/ 742 743 bool thread_init_stack(uint32_t thread_id, vaddr_t sp) 744 { 745 if (thread_id >= CFG_NUM_THREADS) 746 return false; 747 threads[thread_id].stack_va_end = sp; 748 return true; 749 } 750 751 int thread_get_id_may_fail(void) 752 { 753 /* thread_get_core_local() requires IRQs to be disabled */ 754 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_IRQ); 755 struct thread_core_local *l = thread_get_core_local(); 756 int ct = l->curr_thread; 757 758 thread_unmask_exceptions(exceptions); 759 return ct; 760 } 761 762 int thread_get_id(void) 763 { 764 int ct = thread_get_id_may_fail(); 765 766 assert(ct >= 0 && ct < CFG_NUM_THREADS); 767 return ct; 768 } 769 770 static void init_handlers(const struct thread_handlers *handlers) 771 { 772 thread_std_smc_handler_ptr = handlers->std_smc; 773 thread_fast_smc_handler_ptr = handlers->fast_smc; 774 thread_fiq_handler_ptr = handlers->fiq; 775 thread_cpu_on_handler_ptr = handlers->cpu_on; 776 thread_cpu_off_handler_ptr = handlers->cpu_off; 777 thread_cpu_suspend_handler_ptr = handlers->cpu_suspend; 778 thread_cpu_resume_handler_ptr = handlers->cpu_resume; 779 thread_system_off_handler_ptr = handlers->system_off; 780 thread_system_reset_handler_ptr = handlers->system_reset; 781 } 782 783 #ifdef CFG_WITH_PAGER 784 static void init_thread_stacks(void) 785 { 786 size_t n; 787 788 /* 789 * Allocate virtual memory for thread stacks. 790 */ 791 for (n = 0; n < CFG_NUM_THREADS; n++) { 792 tee_mm_entry_t *mm; 793 vaddr_t sp; 794 795 /* Find vmem for thread stack and its protection gap */ 796 mm = tee_mm_alloc(&tee_mm_vcore, 797 SMALL_PAGE_SIZE + STACK_THREAD_SIZE); 798 assert(mm); 799 800 /* Claim eventual physical page */ 801 tee_pager_add_pages(tee_mm_get_smem(mm), tee_mm_get_size(mm), 802 true); 803 804 /* Add the area to the pager */ 805 tee_pager_add_core_area(tee_mm_get_smem(mm) + SMALL_PAGE_SIZE, 806 tee_mm_get_bytes(mm) - SMALL_PAGE_SIZE, 807 TEE_MATTR_PRW | TEE_MATTR_LOCKED, 808 NULL, NULL); 809 810 /* init effective stack */ 811 sp = tee_mm_get_smem(mm) + tee_mm_get_bytes(mm); 812 if (!thread_init_stack(n, sp)) 813 panic("init stack failed"); 814 } 815 } 816 #else 817 static void init_thread_stacks(void) 818 { 819 size_t n; 820 821 /* Assign the thread stacks */ 822 for (n = 0; n < CFG_NUM_THREADS; n++) { 823 if (!thread_init_stack(n, GET_STACK(stack_thread[n]))) 824 panic("thread_init_stack failed"); 825 } 826 } 827 #endif /*CFG_WITH_PAGER*/ 828 829 void thread_init_primary(const struct thread_handlers *handlers) 830 { 831 init_handlers(handlers); 832 833 /* Initialize canaries around the stacks */ 834 init_canaries(); 835 836 init_thread_stacks(); 837 pgt_init(); 838 } 839 840 static void init_sec_mon(size_t pos __maybe_unused) 841 { 842 #if !defined(CFG_WITH_ARM_TRUSTED_FW) 843 /* Initialize secure monitor */ 844 sm_init(GET_STACK(stack_tmp[pos])); 845 #endif 846 } 847 848 void thread_init_per_cpu(void) 849 { 850 size_t pos = get_core_pos(); 851 struct thread_core_local *l = thread_get_core_local(); 852 853 init_sec_mon(pos); 854 855 set_tmp_stack(l, GET_STACK(stack_tmp[pos]) - STACK_TMP_OFFS); 856 set_abt_stack(l, GET_STACK(stack_abt[pos])); 857 858 thread_init_vbar(); 859 } 860 861 struct thread_specific_data *thread_get_tsd(void) 862 { 863 return &threads[thread_get_id()].tsd; 864 } 865 866 struct thread_ctx_regs *thread_get_ctx_regs(void) 867 { 868 struct thread_core_local *l = thread_get_core_local(); 869 870 assert(l->curr_thread != -1); 871 return &threads[l->curr_thread].regs; 872 } 873 874 void thread_set_irq(bool enable) 875 { 876 /* thread_get_core_local() requires IRQs to be disabled */ 877 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_IRQ); 878 struct thread_core_local *l; 879 880 l = thread_get_core_local(); 881 882 assert(l->curr_thread != -1); 883 884 if (enable) { 885 threads[l->curr_thread].flags |= THREAD_FLAGS_IRQ_ENABLE; 886 thread_set_exceptions(exceptions & ~THREAD_EXCP_IRQ); 887 } else { 888 /* 889 * No need to disable IRQ here since it's already disabled 890 * above. 891 */ 892 threads[l->curr_thread].flags &= ~THREAD_FLAGS_IRQ_ENABLE; 893 } 894 } 895 896 void thread_restore_irq(void) 897 { 898 /* thread_get_core_local() requires IRQs to be disabled */ 899 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_IRQ); 900 struct thread_core_local *l; 901 902 l = thread_get_core_local(); 903 904 assert(l->curr_thread != -1); 905 906 if (threads[l->curr_thread].flags & THREAD_FLAGS_IRQ_ENABLE) 907 thread_set_exceptions(exceptions & ~THREAD_EXCP_IRQ); 908 } 909 910 #ifdef CFG_WITH_VFP 911 uint32_t thread_kernel_enable_vfp(void) 912 { 913 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_IRQ); 914 struct thread_ctx *thr = threads + thread_get_id(); 915 struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp; 916 917 assert(!vfp_is_enabled()); 918 919 if (!thr->vfp_state.ns_saved) { 920 vfp_lazy_save_state_final(&thr->vfp_state.ns); 921 thr->vfp_state.ns_saved = true; 922 } else if (thr->vfp_state.sec_lazy_saved && 923 !thr->vfp_state.sec_saved) { 924 /* 925 * This happens when we're handling an abort while the 926 * thread was using the VFP state. 927 */ 928 vfp_lazy_save_state_final(&thr->vfp_state.sec); 929 thr->vfp_state.sec_saved = true; 930 } else if (tuv && tuv->lazy_saved && !tuv->saved) { 931 /* 932 * This can happen either during syscall or abort 933 * processing (while processing a syscall). 934 */ 935 vfp_lazy_save_state_final(&tuv->vfp); 936 tuv->saved = true; 937 } 938 939 vfp_enable(); 940 return exceptions; 941 } 942 943 void thread_kernel_disable_vfp(uint32_t state) 944 { 945 uint32_t exceptions; 946 947 assert(vfp_is_enabled()); 948 949 vfp_disable(); 950 exceptions = thread_get_exceptions(); 951 assert(exceptions & THREAD_EXCP_IRQ); 952 exceptions &= ~THREAD_EXCP_IRQ; 953 exceptions |= state & THREAD_EXCP_IRQ; 954 thread_set_exceptions(exceptions); 955 } 956 957 void thread_kernel_save_vfp(void) 958 { 959 struct thread_ctx *thr = threads + thread_get_id(); 960 961 assert(thread_get_exceptions() & THREAD_EXCP_IRQ); 962 if (vfp_is_enabled()) { 963 vfp_lazy_save_state_init(&thr->vfp_state.sec); 964 thr->vfp_state.sec_lazy_saved = true; 965 } 966 } 967 968 void thread_kernel_restore_vfp(void) 969 { 970 struct thread_ctx *thr = threads + thread_get_id(); 971 972 assert(thread_get_exceptions() & THREAD_EXCP_IRQ); 973 assert(!vfp_is_enabled()); 974 if (thr->vfp_state.sec_lazy_saved) { 975 vfp_lazy_restore_state(&thr->vfp_state.sec, 976 thr->vfp_state.sec_saved); 977 thr->vfp_state.sec_saved = false; 978 thr->vfp_state.sec_lazy_saved = false; 979 } 980 } 981 982 void thread_user_enable_vfp(struct thread_user_vfp_state *uvfp) 983 { 984 struct thread_ctx *thr = threads + thread_get_id(); 985 struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp; 986 987 assert(thread_get_exceptions() & THREAD_EXCP_IRQ); 988 assert(!vfp_is_enabled()); 989 990 if (!thr->vfp_state.ns_saved) { 991 vfp_lazy_save_state_final(&thr->vfp_state.ns); 992 thr->vfp_state.ns_saved = true; 993 } else if (tuv && uvfp != tuv) { 994 if (tuv->lazy_saved && !tuv->saved) { 995 vfp_lazy_save_state_final(&tuv->vfp); 996 tuv->saved = true; 997 } 998 } 999 1000 if (uvfp->lazy_saved) 1001 vfp_lazy_restore_state(&uvfp->vfp, uvfp->saved); 1002 uvfp->lazy_saved = false; 1003 uvfp->saved = false; 1004 1005 thr->vfp_state.uvfp = uvfp; 1006 vfp_enable(); 1007 } 1008 1009 void thread_user_save_vfp(void) 1010 { 1011 struct thread_ctx *thr = threads + thread_get_id(); 1012 struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp; 1013 1014 assert(thread_get_exceptions() & THREAD_EXCP_IRQ); 1015 if (!vfp_is_enabled()) 1016 return; 1017 1018 assert(tuv && !tuv->lazy_saved && !tuv->saved); 1019 vfp_lazy_save_state_init(&tuv->vfp); 1020 tuv->lazy_saved = true; 1021 } 1022 1023 void thread_user_clear_vfp(struct thread_user_vfp_state *uvfp) 1024 { 1025 struct thread_ctx *thr = threads + thread_get_id(); 1026 1027 if (uvfp == thr->vfp_state.uvfp) 1028 thr->vfp_state.uvfp = NULL; 1029 uvfp->lazy_saved = false; 1030 uvfp->saved = false; 1031 } 1032 #endif /*CFG_WITH_VFP*/ 1033 1034 #ifdef ARM32 1035 static bool get_spsr(bool is_32bit, unsigned long entry_func, uint32_t *spsr) 1036 { 1037 uint32_t s; 1038 1039 if (!is_32bit) 1040 return false; 1041 1042 s = read_spsr(); 1043 s &= ~(CPSR_MODE_MASK | CPSR_T | CPSR_IT_MASK1 | CPSR_IT_MASK2); 1044 s |= CPSR_MODE_USR; 1045 if (entry_func & 1) 1046 s |= CPSR_T; 1047 *spsr = s; 1048 return true; 1049 } 1050 #endif 1051 1052 #ifdef ARM64 1053 static bool get_spsr(bool is_32bit, unsigned long entry_func, uint32_t *spsr) 1054 { 1055 uint32_t s; 1056 1057 if (is_32bit) { 1058 s = read_daif() & (SPSR_32_AIF_MASK << SPSR_32_AIF_SHIFT); 1059 s |= SPSR_MODE_RW_32 << SPSR_MODE_RW_SHIFT; 1060 s |= (entry_func & SPSR_32_T_MASK) << SPSR_32_T_SHIFT; 1061 } else { 1062 s = read_daif() & (SPSR_64_DAIF_MASK << SPSR_64_DAIF_SHIFT); 1063 } 1064 1065 *spsr = s; 1066 return true; 1067 } 1068 #endif 1069 1070 uint32_t thread_enter_user_mode(unsigned long a0, unsigned long a1, 1071 unsigned long a2, unsigned long a3, unsigned long user_sp, 1072 unsigned long entry_func, bool is_32bit, 1073 uint32_t *exit_status0, uint32_t *exit_status1) 1074 { 1075 uint32_t spsr; 1076 1077 if (!get_spsr(is_32bit, entry_func, &spsr)) { 1078 *exit_status0 = 1; /* panic */ 1079 *exit_status1 = 0xbadbadba; 1080 return 0; 1081 } 1082 return __thread_enter_user_mode(a0, a1, a2, a3, user_sp, entry_func, 1083 spsr, exit_status0, exit_status1); 1084 } 1085 1086 void thread_add_mutex(struct mutex *m) 1087 { 1088 struct thread_core_local *l = thread_get_core_local(); 1089 int ct = l->curr_thread; 1090 1091 assert(ct != -1 && threads[ct].state == THREAD_STATE_ACTIVE); 1092 assert(m->owner_id == -1); 1093 m->owner_id = ct; 1094 TAILQ_INSERT_TAIL(&threads[ct].mutexes, m, link); 1095 } 1096 1097 void thread_rem_mutex(struct mutex *m) 1098 { 1099 struct thread_core_local *l = thread_get_core_local(); 1100 int ct = l->curr_thread; 1101 1102 assert(ct != -1 && threads[ct].state == THREAD_STATE_ACTIVE); 1103 assert(m->owner_id == ct); 1104 m->owner_id = -1; 1105 TAILQ_REMOVE(&threads[ct].mutexes, m, link); 1106 } 1107 1108 bool thread_disable_prealloc_rpc_cache(uint64_t *cookie) 1109 { 1110 bool rv; 1111 size_t n; 1112 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_IRQ); 1113 1114 lock_global(); 1115 1116 for (n = 0; n < CFG_NUM_THREADS; n++) { 1117 if (threads[n].state != THREAD_STATE_FREE) { 1118 rv = false; 1119 goto out; 1120 } 1121 } 1122 1123 rv = true; 1124 for (n = 0; n < CFG_NUM_THREADS; n++) { 1125 if (threads[n].rpc_arg) { 1126 *cookie = threads[n].rpc_carg; 1127 threads[n].rpc_carg = 0; 1128 threads[n].rpc_arg = NULL; 1129 goto out; 1130 } 1131 } 1132 1133 *cookie = 0; 1134 thread_prealloc_rpc_cache = false; 1135 out: 1136 unlock_global(); 1137 thread_unmask_exceptions(exceptions); 1138 return rv; 1139 } 1140 1141 bool thread_enable_prealloc_rpc_cache(void) 1142 { 1143 bool rv; 1144 size_t n; 1145 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_IRQ); 1146 1147 lock_global(); 1148 1149 for (n = 0; n < CFG_NUM_THREADS; n++) { 1150 if (threads[n].state != THREAD_STATE_FREE) { 1151 rv = false; 1152 goto out; 1153 } 1154 } 1155 1156 rv = true; 1157 thread_prealloc_rpc_cache = true; 1158 out: 1159 unlock_global(); 1160 thread_unmask_exceptions(exceptions); 1161 return rv; 1162 } 1163 1164 static uint32_t rpc_cmd_nolock(uint32_t cmd, size_t num_params, 1165 struct optee_msg_param *params) 1166 { 1167 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { OPTEE_SMC_RETURN_RPC_CMD }; 1168 struct thread_ctx *thr = threads + thread_get_id(); 1169 struct optee_msg_arg *arg = thr->rpc_arg; 1170 uint64_t carg = thr->rpc_carg; 1171 const size_t params_size = sizeof(struct optee_msg_param) * num_params; 1172 size_t n; 1173 1174 assert(arg && carg && num_params <= THREAD_RPC_MAX_NUM_PARAMS); 1175 1176 memset(arg, 0, OPTEE_MSG_GET_ARG_SIZE(THREAD_RPC_MAX_NUM_PARAMS)); 1177 arg->cmd = cmd; 1178 arg->ret = TEE_ERROR_GENERIC; /* in case value isn't updated */ 1179 arg->num_params = num_params; 1180 memcpy(OPTEE_MSG_GET_PARAMS(arg), params, params_size); 1181 1182 reg_pair_from_64(carg, rpc_args + 1, rpc_args + 2); 1183 thread_rpc(rpc_args); 1184 for (n = 0; n < num_params; n++) { 1185 switch (params[n].attr & OPTEE_MSG_ATTR_TYPE_MASK) { 1186 case OPTEE_MSG_ATTR_TYPE_VALUE_OUTPUT: 1187 case OPTEE_MSG_ATTR_TYPE_VALUE_INOUT: 1188 case OPTEE_MSG_ATTR_TYPE_RMEM_OUTPUT: 1189 case OPTEE_MSG_ATTR_TYPE_RMEM_INOUT: 1190 case OPTEE_MSG_ATTR_TYPE_TMEM_OUTPUT: 1191 case OPTEE_MSG_ATTR_TYPE_TMEM_INOUT: 1192 memcpy(params + n, OPTEE_MSG_GET_PARAMS(arg) + n, 1193 sizeof(struct optee_msg_param)); 1194 break; 1195 default: 1196 break; 1197 } 1198 } 1199 return arg->ret; 1200 } 1201 1202 uint32_t thread_rpc_cmd(uint32_t cmd, size_t num_params, 1203 struct optee_msg_param *params) 1204 { 1205 uint32_t ret; 1206 1207 ret = rpc_cmd_nolock(cmd, num_params, params); 1208 1209 return ret; 1210 } 1211 1212 static bool check_alloced_shm(paddr_t pa, size_t len, size_t align) 1213 { 1214 if (pa & (align - 1)) 1215 return false; 1216 return core_pbuf_is(CORE_MEM_NSEC_SHM, pa, len); 1217 } 1218 1219 void thread_rpc_free_arg(uint64_t cookie) 1220 { 1221 if (cookie) { 1222 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { 1223 OPTEE_SMC_RETURN_RPC_FREE 1224 }; 1225 1226 reg_pair_from_64(cookie, rpc_args + 1, rpc_args + 2); 1227 thread_rpc(rpc_args); 1228 } 1229 } 1230 1231 void thread_rpc_alloc_arg(size_t size, paddr_t *arg, uint64_t *cookie) 1232 { 1233 paddr_t pa; 1234 uint64_t co; 1235 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { 1236 OPTEE_SMC_RETURN_RPC_ALLOC, size 1237 }; 1238 1239 thread_rpc(rpc_args); 1240 1241 pa = reg_pair_to_64(rpc_args[1], rpc_args[2]); 1242 co = reg_pair_to_64(rpc_args[4], rpc_args[5]); 1243 if (!check_alloced_shm(pa, size, sizeof(uint64_t))) { 1244 thread_rpc_free_arg(co); 1245 pa = 0; 1246 co = 0; 1247 } 1248 1249 *arg = pa; 1250 *cookie = co; 1251 } 1252 1253 /** 1254 * Free physical memory previously allocated with thread_rpc_alloc() 1255 * 1256 * @cookie: cookie received when allocating the buffer 1257 * @bt: must be the same as supplied when allocating 1258 */ 1259 static void thread_rpc_free(unsigned int bt, uint64_t cookie) 1260 { 1261 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { OPTEE_SMC_RETURN_RPC_CMD }; 1262 struct thread_ctx *thr = threads + thread_get_id(); 1263 struct optee_msg_arg *arg = thr->rpc_arg; 1264 uint64_t carg = thr->rpc_carg; 1265 struct optee_msg_param *params = OPTEE_MSG_GET_PARAMS(arg); 1266 1267 memset(arg, 0, OPTEE_MSG_GET_ARG_SIZE(1)); 1268 arg->cmd = OPTEE_MSG_RPC_CMD_SHM_FREE; 1269 arg->ret = TEE_ERROR_GENERIC; /* in case value isn't updated */ 1270 arg->num_params = 1; 1271 1272 params[0].attr = OPTEE_MSG_ATTR_TYPE_VALUE_INPUT; 1273 params[0].u.value.a = bt; 1274 params[0].u.value.b = cookie; 1275 params[0].u.value.c = 0; 1276 1277 reg_pair_from_64(carg, rpc_args + 1, rpc_args + 2); 1278 thread_rpc(rpc_args); 1279 } 1280 1281 /** 1282 * Allocates shared memory buffer via RPC 1283 * 1284 * @size: size in bytes of shared memory buffer 1285 * @align: required alignment of buffer 1286 * @bt: buffer type OPTEE_MSG_RPC_SHM_TYPE_* 1287 * @payload: returned physical pointer to buffer, 0 if allocation 1288 * failed. 1289 * @cookie: returned cookie used when freeing the buffer 1290 */ 1291 static void thread_rpc_alloc(size_t size, size_t align, unsigned int bt, 1292 paddr_t *payload, uint64_t *cookie) 1293 { 1294 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { OPTEE_SMC_RETURN_RPC_CMD }; 1295 struct thread_ctx *thr = threads + thread_get_id(); 1296 struct optee_msg_arg *arg = thr->rpc_arg; 1297 uint64_t carg = thr->rpc_carg; 1298 struct optee_msg_param *params = OPTEE_MSG_GET_PARAMS(arg); 1299 1300 memset(arg, 0, OPTEE_MSG_GET_ARG_SIZE(1)); 1301 arg->cmd = OPTEE_MSG_RPC_CMD_SHM_ALLOC; 1302 arg->ret = TEE_ERROR_GENERIC; /* in case value isn't updated */ 1303 arg->num_params = 1; 1304 1305 params[0].attr = OPTEE_MSG_ATTR_TYPE_VALUE_INPUT; 1306 params[0].u.value.a = bt; 1307 params[0].u.value.b = size; 1308 params[0].u.value.c = align; 1309 1310 reg_pair_from_64(carg, rpc_args + 1, rpc_args + 2); 1311 thread_rpc(rpc_args); 1312 if (arg->ret != TEE_SUCCESS) 1313 goto fail; 1314 1315 if (arg->num_params != 1) 1316 goto fail; 1317 1318 if (params[0].attr != OPTEE_MSG_ATTR_TYPE_TMEM_OUTPUT) 1319 goto fail; 1320 1321 if (!check_alloced_shm(params[0].u.tmem.buf_ptr, size, align)) { 1322 thread_rpc_free(bt, params[0].u.tmem.shm_ref); 1323 goto fail; 1324 } 1325 1326 *payload = params[0].u.tmem.buf_ptr; 1327 *cookie = params[0].u.tmem.shm_ref; 1328 return; 1329 fail: 1330 *payload = 0; 1331 *cookie = 0; 1332 } 1333 1334 void thread_rpc_alloc_payload(size_t size, paddr_t *payload, uint64_t *cookie) 1335 { 1336 thread_rpc_alloc(size, 8, OPTEE_MSG_RPC_SHM_TYPE_APPL, payload, cookie); 1337 } 1338 1339 void thread_rpc_free_payload(uint64_t cookie) 1340 { 1341 thread_rpc_free(OPTEE_MSG_RPC_SHM_TYPE_APPL, cookie); 1342 } 1343