xref: /optee_os/core/arch/arm/kernel/thread.c (revision 099918f6744c37ce693c38562f11466b19d573c9)
1 // SPDX-License-Identifier: BSD-2-Clause
2 /*
3  * Copyright (c) 2016, Linaro Limited
4  * Copyright (c) 2014, STMicroelectronics International N.V.
5  */
6 
7 #include <platform_config.h>
8 
9 #include <arm.h>
10 #include <assert.h>
11 #include <io.h>
12 #include <keep.h>
13 #include <kernel/asan.h>
14 #include <kernel/lockdep.h>
15 #include <kernel/misc.h>
16 #include <kernel/panic.h>
17 #include <kernel/spinlock.h>
18 #include <kernel/tee_ta_manager.h>
19 #include <kernel/thread_defs.h>
20 #include <kernel/thread.h>
21 #include <kernel/virtualization.h>
22 #include <mm/core_memprot.h>
23 #include <mm/mobj.h>
24 #include <mm/tee_mm.h>
25 #include <mm/tee_mmu.h>
26 #include <mm/tee_pager.h>
27 #include <smccc.h>
28 #include <sm/sm.h>
29 #include <trace.h>
30 #include <util.h>
31 
32 #include "thread_private.h"
33 
34 #ifdef CFG_WITH_ARM_TRUSTED_FW
35 #define STACK_TMP_OFFS		0
36 #else
37 #define STACK_TMP_OFFS		SM_STACK_TMP_RESERVE_SIZE
38 #endif
39 
40 
41 #ifdef ARM32
42 #ifdef CFG_CORE_SANITIZE_KADDRESS
43 #define STACK_TMP_SIZE		(3072 + STACK_TMP_OFFS)
44 #else
45 #define STACK_TMP_SIZE		(2048 + STACK_TMP_OFFS)
46 #endif
47 #define STACK_THREAD_SIZE	8192
48 
49 #if defined(CFG_CORE_SANITIZE_KADDRESS) || defined(__clang__)
50 #define STACK_ABT_SIZE		3072
51 #else
52 #define STACK_ABT_SIZE		2048
53 #endif
54 
55 #endif /*ARM32*/
56 
57 #ifdef ARM64
58 #define STACK_TMP_SIZE		(2048 + STACK_TMP_OFFS)
59 #define STACK_THREAD_SIZE	8192
60 
61 #if TRACE_LEVEL > 0
62 #define STACK_ABT_SIZE		3072
63 #else
64 #define STACK_ABT_SIZE		1024
65 #endif
66 #endif /*ARM64*/
67 
68 struct thread_ctx threads[CFG_NUM_THREADS];
69 
70 struct thread_core_local thread_core_local[CFG_TEE_CORE_NB_CORE] __nex_bss;
71 
72 #ifdef CFG_WITH_STACK_CANARIES
73 #ifdef ARM32
74 #define STACK_CANARY_SIZE	(4 * sizeof(uint32_t))
75 #endif
76 #ifdef ARM64
77 #define STACK_CANARY_SIZE	(8 * sizeof(uint32_t))
78 #endif
79 #define START_CANARY_VALUE	0xdededede
80 #define END_CANARY_VALUE	0xabababab
81 #define GET_START_CANARY(name, stack_num) name[stack_num][0]
82 #define GET_END_CANARY(name, stack_num) \
83 	name[stack_num][sizeof(name[stack_num]) / sizeof(uint32_t) - 1]
84 #else
85 #define STACK_CANARY_SIZE	0
86 #endif
87 
88 #define DECLARE_STACK(name, num_stacks, stack_size, linkage) \
89 linkage uint32_t name[num_stacks] \
90 		[ROUNDUP(stack_size + STACK_CANARY_SIZE, STACK_ALIGNMENT) / \
91 		sizeof(uint32_t)] \
92 		__attribute__((section(".nozi_stack." # name), \
93 			       aligned(STACK_ALIGNMENT)))
94 
95 #define STACK_SIZE(stack) (sizeof(stack) - STACK_CANARY_SIZE / 2)
96 
97 #define GET_STACK(stack) \
98 	((vaddr_t)(stack) + STACK_SIZE(stack))
99 
100 DECLARE_STACK(stack_tmp, CFG_TEE_CORE_NB_CORE, STACK_TMP_SIZE, static);
101 DECLARE_STACK(stack_abt, CFG_TEE_CORE_NB_CORE, STACK_ABT_SIZE, static);
102 #ifndef CFG_WITH_PAGER
103 DECLARE_STACK(stack_thread, CFG_NUM_THREADS, STACK_THREAD_SIZE, static);
104 #endif
105 
106 const void *stack_tmp_export = (uint8_t *)stack_tmp + sizeof(stack_tmp[0]) -
107 			       (STACK_TMP_OFFS + STACK_CANARY_SIZE / 2);
108 const uint32_t stack_tmp_stride = sizeof(stack_tmp[0]);
109 
110 /*
111  * These stack setup info are required by secondary boot cores before they
112  * each locally enable the pager (the mmu). Hence kept in pager sections.
113  */
114 KEEP_PAGER(stack_tmp_export);
115 KEEP_PAGER(stack_tmp_stride);
116 
117 thread_pm_handler_t thread_cpu_on_handler_ptr __nex_bss;
118 thread_pm_handler_t thread_cpu_off_handler_ptr __nex_bss;
119 thread_pm_handler_t thread_cpu_suspend_handler_ptr __nex_bss;
120 thread_pm_handler_t thread_cpu_resume_handler_ptr __nex_bss;
121 thread_pm_handler_t thread_system_off_handler_ptr __nex_bss;
122 thread_pm_handler_t thread_system_reset_handler_ptr __nex_bss;
123 
124 #ifdef CFG_CORE_UNMAP_CORE_AT_EL0
125 static vaddr_t thread_user_kcode_va __nex_bss;
126 long thread_user_kcode_offset __nex_bss;
127 static size_t thread_user_kcode_size __nex_bss;
128 #endif
129 
130 #if defined(CFG_CORE_UNMAP_CORE_AT_EL0) && \
131 	defined(CFG_CORE_WORKAROUND_SPECTRE_BP_SEC) && defined(ARM64)
132 long thread_user_kdata_sp_offset __nex_bss;
133 static uint8_t thread_user_kdata_page[
134 	ROUNDUP(sizeof(thread_core_local), SMALL_PAGE_SIZE)]
135 	__aligned(SMALL_PAGE_SIZE)
136 #ifndef CFG_VIRTUALIZATION
137 	__section(".nozi.kdata_page");
138 #else
139 	__section(".nex_nozi.kdata_page");
140 #endif
141 #endif
142 
143 static unsigned int thread_global_lock __nex_bss = SPINLOCK_UNLOCK;
144 
145 static void init_canaries(void)
146 {
147 #ifdef CFG_WITH_STACK_CANARIES
148 	size_t n;
149 #define INIT_CANARY(name)						\
150 	for (n = 0; n < ARRAY_SIZE(name); n++) {			\
151 		uint32_t *start_canary = &GET_START_CANARY(name, n);	\
152 		uint32_t *end_canary = &GET_END_CANARY(name, n);	\
153 									\
154 		*start_canary = START_CANARY_VALUE;			\
155 		*end_canary = END_CANARY_VALUE;				\
156 		DMSG("#Stack canaries for %s[%zu] with top at %p",	\
157 			#name, n, (void *)(end_canary - 1));		\
158 		DMSG("watch *%p", (void *)end_canary);			\
159 	}
160 
161 	INIT_CANARY(stack_tmp);
162 	INIT_CANARY(stack_abt);
163 #if !defined(CFG_WITH_PAGER) && !defined(CFG_VIRTUALIZATION)
164 	INIT_CANARY(stack_thread);
165 #endif
166 #endif/*CFG_WITH_STACK_CANARIES*/
167 }
168 
169 #define CANARY_DIED(stack, loc, n) \
170 	do { \
171 		EMSG_RAW("Dead canary at %s of '%s[%zu]'", #loc, #stack, n); \
172 		panic(); \
173 	} while (0)
174 
175 void thread_check_canaries(void)
176 {
177 #ifdef CFG_WITH_STACK_CANARIES
178 	size_t n;
179 
180 	for (n = 0; n < ARRAY_SIZE(stack_tmp); n++) {
181 		if (GET_START_CANARY(stack_tmp, n) != START_CANARY_VALUE)
182 			CANARY_DIED(stack_tmp, start, n);
183 		if (GET_END_CANARY(stack_tmp, n) != END_CANARY_VALUE)
184 			CANARY_DIED(stack_tmp, end, n);
185 	}
186 
187 	for (n = 0; n < ARRAY_SIZE(stack_abt); n++) {
188 		if (GET_START_CANARY(stack_abt, n) != START_CANARY_VALUE)
189 			CANARY_DIED(stack_abt, start, n);
190 		if (GET_END_CANARY(stack_abt, n) != END_CANARY_VALUE)
191 			CANARY_DIED(stack_abt, end, n);
192 
193 	}
194 #if !defined(CFG_WITH_PAGER) && !defined(CFG_VIRTUALIZATION)
195 	for (n = 0; n < ARRAY_SIZE(stack_thread); n++) {
196 		if (GET_START_CANARY(stack_thread, n) != START_CANARY_VALUE)
197 			CANARY_DIED(stack_thread, start, n);
198 		if (GET_END_CANARY(stack_thread, n) != END_CANARY_VALUE)
199 			CANARY_DIED(stack_thread, end, n);
200 	}
201 #endif
202 #endif/*CFG_WITH_STACK_CANARIES*/
203 }
204 
205 void thread_lock_global(void)
206 {
207 	cpu_spin_lock(&thread_global_lock);
208 }
209 
210 void thread_unlock_global(void)
211 {
212 	cpu_spin_unlock(&thread_global_lock);
213 }
214 
215 #ifdef ARM32
216 uint32_t thread_get_exceptions(void)
217 {
218 	uint32_t cpsr = read_cpsr();
219 
220 	return (cpsr >> CPSR_F_SHIFT) & THREAD_EXCP_ALL;
221 }
222 
223 void thread_set_exceptions(uint32_t exceptions)
224 {
225 	uint32_t cpsr = read_cpsr();
226 
227 	/* Foreign interrupts must not be unmasked while holding a spinlock */
228 	if (!(exceptions & THREAD_EXCP_FOREIGN_INTR))
229 		assert_have_no_spinlock();
230 
231 	cpsr &= ~(THREAD_EXCP_ALL << CPSR_F_SHIFT);
232 	cpsr |= ((exceptions & THREAD_EXCP_ALL) << CPSR_F_SHIFT);
233 	write_cpsr(cpsr);
234 }
235 #endif /*ARM32*/
236 
237 #ifdef ARM64
238 uint32_t thread_get_exceptions(void)
239 {
240 	uint32_t daif = read_daif();
241 
242 	return (daif >> DAIF_F_SHIFT) & THREAD_EXCP_ALL;
243 }
244 
245 void thread_set_exceptions(uint32_t exceptions)
246 {
247 	uint32_t daif = read_daif();
248 
249 	/* Foreign interrupts must not be unmasked while holding a spinlock */
250 	if (!(exceptions & THREAD_EXCP_FOREIGN_INTR))
251 		assert_have_no_spinlock();
252 
253 	daif &= ~(THREAD_EXCP_ALL << DAIF_F_SHIFT);
254 	daif |= ((exceptions & THREAD_EXCP_ALL) << DAIF_F_SHIFT);
255 	write_daif(daif);
256 }
257 #endif /*ARM64*/
258 
259 uint32_t thread_mask_exceptions(uint32_t exceptions)
260 {
261 	uint32_t state = thread_get_exceptions();
262 
263 	thread_set_exceptions(state | (exceptions & THREAD_EXCP_ALL));
264 	return state;
265 }
266 
267 void thread_unmask_exceptions(uint32_t state)
268 {
269 	thread_set_exceptions(state & THREAD_EXCP_ALL);
270 }
271 
272 
273 struct thread_core_local *thread_get_core_local(void)
274 {
275 	uint32_t cpu_id = get_core_pos();
276 
277 	/*
278 	 * Foreign interrupts must be disabled before playing with core_local
279 	 * since we otherwise may be rescheduled to a different core in the
280 	 * middle of this function.
281 	 */
282 	assert(thread_get_exceptions() & THREAD_EXCP_FOREIGN_INTR);
283 
284 	assert(cpu_id < CFG_TEE_CORE_NB_CORE);
285 	return &thread_core_local[cpu_id];
286 }
287 
288 static void thread_lazy_save_ns_vfp(void)
289 {
290 #ifdef CFG_WITH_VFP
291 	struct thread_ctx *thr = threads + thread_get_id();
292 
293 	thr->vfp_state.ns_saved = false;
294 	vfp_lazy_save_state_init(&thr->vfp_state.ns);
295 #endif /*CFG_WITH_VFP*/
296 }
297 
298 static void thread_lazy_restore_ns_vfp(void)
299 {
300 #ifdef CFG_WITH_VFP
301 	struct thread_ctx *thr = threads + thread_get_id();
302 	struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp;
303 
304 	assert(!thr->vfp_state.sec_lazy_saved && !thr->vfp_state.sec_saved);
305 
306 	if (tuv && tuv->lazy_saved && !tuv->saved) {
307 		vfp_lazy_save_state_final(&tuv->vfp, false /*!force_save*/);
308 		tuv->saved = true;
309 	}
310 
311 	vfp_lazy_restore_state(&thr->vfp_state.ns, thr->vfp_state.ns_saved);
312 	thr->vfp_state.ns_saved = false;
313 #endif /*CFG_WITH_VFP*/
314 }
315 
316 #ifdef ARM32
317 static void init_regs(struct thread_ctx *thread, uint32_t a0, uint32_t a1,
318 		      uint32_t a2, uint32_t a3)
319 {
320 	thread->regs.pc = (uint32_t)thread_std_smc_entry;
321 
322 	/*
323 	 * Stdcalls starts in SVC mode with masked foreign interrupts, masked
324 	 * Asynchronous abort and unmasked native interrupts.
325 	 */
326 	thread->regs.cpsr = read_cpsr() & ARM32_CPSR_E;
327 	thread->regs.cpsr |= CPSR_MODE_SVC | CPSR_A |
328 			(THREAD_EXCP_FOREIGN_INTR << ARM32_CPSR_F_SHIFT);
329 	/* Enable thumb mode if it's a thumb instruction */
330 	if (thread->regs.pc & 1)
331 		thread->regs.cpsr |= CPSR_T;
332 	/* Reinitialize stack pointer */
333 	thread->regs.svc_sp = thread->stack_va_end;
334 
335 	/*
336 	 * Copy arguments into context. This will make the
337 	 * arguments appear in r0-r7 when thread is started.
338 	 */
339 	thread->regs.r0 = a0;
340 	thread->regs.r1 = a1;
341 	thread->regs.r2 = a2;
342 	thread->regs.r3 = a3;
343 	thread->regs.r4 = 0;
344 	thread->regs.r5 = 0;
345 	thread->regs.r6 = 0;
346 	thread->regs.r7 = 0;
347 }
348 #endif /*ARM32*/
349 
350 #ifdef ARM64
351 static void init_regs(struct thread_ctx *thread, uint32_t a0, uint32_t a1,
352 		      uint32_t a2, uint32_t a3)
353 {
354 	thread->regs.pc = (uint64_t)thread_std_smc_entry;
355 
356 	/*
357 	 * Stdcalls starts in SVC mode with masked foreign interrupts, masked
358 	 * Asynchronous abort and unmasked native interrupts.
359 	 */
360 	thread->regs.cpsr = SPSR_64(SPSR_64_MODE_EL1, SPSR_64_MODE_SP_EL0,
361 				THREAD_EXCP_FOREIGN_INTR | DAIFBIT_ABT);
362 	/* Reinitialize stack pointer */
363 	thread->regs.sp = thread->stack_va_end;
364 
365 	/*
366 	 * Copy arguments into context. This will make the
367 	 * arguments appear in x0-x7 when thread is started.
368 	 */
369 	thread->regs.x[0] = a0;
370 	thread->regs.x[1] = a1;
371 	thread->regs.x[2] = a2;
372 	thread->regs.x[3] = a3;
373 	thread->regs.x[4] = 0;
374 	thread->regs.x[5] = 0;
375 	thread->regs.x[6] = 0;
376 	thread->regs.x[7] = 0;
377 
378 	/* Set up frame pointer as per the Aarch64 AAPCS */
379 	thread->regs.x[29] = 0;
380 }
381 #endif /*ARM64*/
382 
383 void thread_init_boot_thread(void)
384 {
385 	struct thread_core_local *l = thread_get_core_local();
386 
387 	thread_init_threads();
388 
389 	l->curr_thread = 0;
390 	threads[0].state = THREAD_STATE_ACTIVE;
391 }
392 
393 void thread_clr_boot_thread(void)
394 {
395 	struct thread_core_local *l = thread_get_core_local();
396 
397 	assert(l->curr_thread >= 0 && l->curr_thread < CFG_NUM_THREADS);
398 	assert(threads[l->curr_thread].state == THREAD_STATE_ACTIVE);
399 	threads[l->curr_thread].state = THREAD_STATE_FREE;
400 	l->curr_thread = -1;
401 }
402 
403 void thread_alloc_and_run(uint32_t a0, uint32_t a1, uint32_t a2, uint32_t a3)
404 {
405 	size_t n;
406 	struct thread_core_local *l = thread_get_core_local();
407 	bool found_thread = false;
408 
409 	assert(l->curr_thread == -1);
410 
411 	thread_lock_global();
412 
413 	for (n = 0; n < CFG_NUM_THREADS; n++) {
414 		if (threads[n].state == THREAD_STATE_FREE) {
415 			threads[n].state = THREAD_STATE_ACTIVE;
416 			found_thread = true;
417 			break;
418 		}
419 	}
420 
421 	thread_unlock_global();
422 
423 	if (!found_thread)
424 		return;
425 
426 	l->curr_thread = n;
427 
428 	threads[n].flags = 0;
429 	init_regs(threads + n, a0, a1, a2, a3);
430 
431 	thread_lazy_save_ns_vfp();
432 	thread_resume(&threads[n].regs);
433 	/*NOTREACHED*/
434 	panic();
435 }
436 
437 #ifdef ARM32
438 static void copy_a0_to_a3(struct thread_ctx_regs *regs, uint32_t a0,
439 			  uint32_t a1, uint32_t a2, uint32_t a3)
440 {
441 	/*
442 	 * Update returned values from RPC, values will appear in
443 	 * r0-r3 when thread is resumed.
444 	 */
445 	regs->r0 = a0;
446 	regs->r1 = a1;
447 	regs->r2 = a2;
448 	regs->r3 = a3;
449 }
450 #endif /*ARM32*/
451 
452 #ifdef ARM64
453 static void copy_a0_to_a3(struct thread_ctx_regs *regs, uint32_t a0,
454 			  uint32_t a1, uint32_t a2, uint32_t a3)
455 {
456 	/*
457 	 * Update returned values from RPC, values will appear in
458 	 * x0-x3 when thread is resumed.
459 	 */
460 	regs->x[0] = a0;
461 	regs->x[1] = a1;
462 	regs->x[2] = a2;
463 	regs->x[3] = a3;
464 }
465 #endif /*ARM64*/
466 
467 #ifdef ARM32
468 static bool is_from_user(uint32_t cpsr)
469 {
470 	return (cpsr & ARM32_CPSR_MODE_MASK) == ARM32_CPSR_MODE_USR;
471 }
472 #endif
473 
474 #ifdef ARM64
475 static bool is_from_user(uint32_t cpsr)
476 {
477 	if (cpsr & (SPSR_MODE_RW_32 << SPSR_MODE_RW_SHIFT))
478 		return true;
479 	if (((cpsr >> SPSR_64_MODE_EL_SHIFT) & SPSR_64_MODE_EL_MASK) ==
480 	     SPSR_64_MODE_EL0)
481 		return true;
482 	return false;
483 }
484 #endif
485 
486 #ifdef CFG_SYSCALL_FTRACE
487 static void __noprof ftrace_suspend(void)
488 {
489 	struct tee_ta_session *s = TAILQ_FIRST(&thread_get_tsd()->sess_stack);
490 
491 	if (!s)
492 		return;
493 
494 	if (s->fbuf)
495 		s->fbuf->syscall_trace_suspended = true;
496 }
497 
498 static void __noprof ftrace_resume(void)
499 {
500 	struct tee_ta_session *s = TAILQ_FIRST(&thread_get_tsd()->sess_stack);
501 
502 	if (!s)
503 		return;
504 
505 	if (s->fbuf)
506 		s->fbuf->syscall_trace_suspended = false;
507 }
508 #else
509 static void __noprof ftrace_suspend(void)
510 {
511 }
512 
513 static void __noprof ftrace_resume(void)
514 {
515 }
516 #endif
517 
518 static bool is_user_mode(struct thread_ctx_regs *regs)
519 {
520 	return is_from_user((uint32_t)regs->cpsr);
521 }
522 
523 void thread_resume_from_rpc(uint32_t thread_id, uint32_t a0, uint32_t a1,
524 			    uint32_t a2, uint32_t a3)
525 {
526 	size_t n = thread_id;
527 	struct thread_core_local *l = thread_get_core_local();
528 	bool found_thread = false;
529 
530 	assert(l->curr_thread == -1);
531 
532 	thread_lock_global();
533 
534 	if (n < CFG_NUM_THREADS && threads[n].state == THREAD_STATE_SUSPENDED) {
535 		threads[n].state = THREAD_STATE_ACTIVE;
536 		found_thread = true;
537 	}
538 
539 	thread_unlock_global();
540 
541 	if (!found_thread)
542 		return;
543 
544 	l->curr_thread = n;
545 
546 	if (threads[n].have_user_map) {
547 		core_mmu_set_user_map(&threads[n].user_map);
548 		if (threads[n].flags & THREAD_FLAGS_EXIT_ON_FOREIGN_INTR)
549 			tee_ta_ftrace_update_times_resume();
550 	}
551 
552 	if (is_user_mode(&threads[n].regs))
553 		tee_ta_update_session_utime_resume();
554 
555 	/*
556 	 * Return from RPC to request service of a foreign interrupt must not
557 	 * get parameters from non-secure world.
558 	 */
559 	if (threads[n].flags & THREAD_FLAGS_COPY_ARGS_ON_RETURN) {
560 		copy_a0_to_a3(&threads[n].regs, a0, a1, a2, a3);
561 		threads[n].flags &= ~THREAD_FLAGS_COPY_ARGS_ON_RETURN;
562 	}
563 
564 	thread_lazy_save_ns_vfp();
565 
566 	if (threads[n].have_user_map)
567 		ftrace_resume();
568 
569 	thread_resume(&threads[n].regs);
570 	/*NOTREACHED*/
571 	panic();
572 }
573 
574 void *thread_get_tmp_sp(void)
575 {
576 	struct thread_core_local *l = thread_get_core_local();
577 
578 	return (void *)l->tmp_stack_va_end;
579 }
580 
581 #ifdef ARM64
582 vaddr_t thread_get_saved_thread_sp(void)
583 {
584 	struct thread_core_local *l = thread_get_core_local();
585 	int ct = l->curr_thread;
586 
587 	assert(ct != -1);
588 	return threads[ct].kern_sp;
589 }
590 #endif /*ARM64*/
591 
592 vaddr_t thread_stack_start(void)
593 {
594 	struct thread_ctx *thr;
595 	int ct = thread_get_id_may_fail();
596 
597 	if (ct == -1)
598 		return 0;
599 
600 	thr = threads + ct;
601 	return thr->stack_va_end - STACK_THREAD_SIZE;
602 }
603 
604 size_t thread_stack_size(void)
605 {
606 	return STACK_THREAD_SIZE;
607 }
608 
609 bool thread_is_from_abort_mode(void)
610 {
611 	struct thread_core_local *l = thread_get_core_local();
612 
613 	return (l->flags >> THREAD_CLF_SAVED_SHIFT) & THREAD_CLF_ABORT;
614 }
615 
616 #ifdef ARM32
617 bool thread_is_in_normal_mode(void)
618 {
619 	return (read_cpsr() & ARM32_CPSR_MODE_MASK) == ARM32_CPSR_MODE_SVC;
620 }
621 #endif
622 
623 #ifdef ARM64
624 bool thread_is_in_normal_mode(void)
625 {
626 	uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR);
627 	struct thread_core_local *l = thread_get_core_local();
628 	bool ret;
629 
630 	/* If any bit in l->flags is set we're handling some exception. */
631 	ret = !l->flags;
632 	thread_unmask_exceptions(exceptions);
633 
634 	return ret;
635 }
636 #endif
637 
638 void thread_state_free(void)
639 {
640 	struct thread_core_local *l = thread_get_core_local();
641 	int ct = l->curr_thread;
642 
643 	assert(ct != -1);
644 
645 	thread_lazy_restore_ns_vfp();
646 	tee_pager_release_phys(
647 		(void *)(threads[ct].stack_va_end - STACK_THREAD_SIZE),
648 		STACK_THREAD_SIZE);
649 
650 	thread_lock_global();
651 
652 	assert(threads[ct].state == THREAD_STATE_ACTIVE);
653 	threads[ct].state = THREAD_STATE_FREE;
654 	threads[ct].flags = 0;
655 	l->curr_thread = -1;
656 
657 #ifdef CFG_VIRTUALIZATION
658 	virt_unset_guest();
659 #endif
660 	thread_unlock_global();
661 }
662 
663 #ifdef CFG_WITH_PAGER
664 static void release_unused_kernel_stack(struct thread_ctx *thr,
665 					uint32_t cpsr __maybe_unused)
666 {
667 #ifdef ARM64
668 	/*
669 	 * If we're from user mode then thr->regs.sp is the saved user
670 	 * stack pointer and thr->kern_sp holds the last kernel stack
671 	 * pointer. But if we're from kernel mode then thr->kern_sp isn't
672 	 * up to date so we need to read from thr->regs.sp instead.
673 	 */
674 	vaddr_t sp = is_from_user(cpsr) ?  thr->kern_sp : thr->regs.sp;
675 #else
676 	vaddr_t sp = thr->regs.svc_sp;
677 #endif
678 	vaddr_t base = thr->stack_va_end - STACK_THREAD_SIZE;
679 	size_t len = sp - base;
680 
681 	tee_pager_release_phys((void *)base, len);
682 }
683 #else
684 static void release_unused_kernel_stack(struct thread_ctx *thr __unused,
685 					uint32_t cpsr __unused)
686 {
687 }
688 #endif
689 
690 int thread_state_suspend(uint32_t flags, uint32_t cpsr, vaddr_t pc)
691 {
692 	struct thread_core_local *l = thread_get_core_local();
693 	int ct = l->curr_thread;
694 
695 	assert(ct != -1);
696 
697 	if (core_mmu_user_mapping_is_active())
698 		ftrace_suspend();
699 
700 	thread_check_canaries();
701 
702 	release_unused_kernel_stack(threads + ct, cpsr);
703 
704 	if (is_from_user(cpsr)) {
705 		thread_user_save_vfp();
706 		tee_ta_update_session_utime_suspend();
707 		tee_ta_gprof_sample_pc(pc);
708 	}
709 	thread_lazy_restore_ns_vfp();
710 
711 	thread_lock_global();
712 
713 	assert(threads[ct].state == THREAD_STATE_ACTIVE);
714 	threads[ct].flags |= flags;
715 	threads[ct].regs.cpsr = cpsr;
716 	threads[ct].regs.pc = pc;
717 	threads[ct].state = THREAD_STATE_SUSPENDED;
718 
719 	threads[ct].have_user_map = core_mmu_user_mapping_is_active();
720 	if (threads[ct].have_user_map) {
721 		if (threads[ct].flags & THREAD_FLAGS_EXIT_ON_FOREIGN_INTR)
722 			tee_ta_ftrace_update_times_suspend();
723 		core_mmu_get_user_map(&threads[ct].user_map);
724 		core_mmu_set_user_map(NULL);
725 	}
726 
727 	l->curr_thread = -1;
728 
729 #ifdef CFG_VIRTUALIZATION
730 	virt_unset_guest();
731 #endif
732 
733 	thread_unlock_global();
734 
735 	return ct;
736 }
737 
738 #ifdef ARM32
739 static void set_tmp_stack(struct thread_core_local *l, vaddr_t sp)
740 {
741 	l->tmp_stack_va_end = sp;
742 	thread_set_irq_sp(sp);
743 	thread_set_fiq_sp(sp);
744 }
745 
746 static void set_abt_stack(struct thread_core_local *l, vaddr_t sp)
747 {
748 	l->abt_stack_va_end = sp;
749 	thread_set_abt_sp((vaddr_t)l);
750 	thread_set_und_sp((vaddr_t)l);
751 }
752 #endif /*ARM32*/
753 
754 #ifdef ARM64
755 static void set_tmp_stack(struct thread_core_local *l, vaddr_t sp)
756 {
757 	/*
758 	 * We're already using the tmp stack when this function is called
759 	 * so there's no need to assign it to any stack pointer. However,
760 	 * we'll need to restore it at different times so store it here.
761 	 */
762 	l->tmp_stack_va_end = sp;
763 }
764 
765 static void set_abt_stack(struct thread_core_local *l, vaddr_t sp)
766 {
767 	l->abt_stack_va_end = sp;
768 }
769 #endif /*ARM64*/
770 
771 bool thread_init_stack(uint32_t thread_id, vaddr_t sp)
772 {
773 	if (thread_id >= CFG_NUM_THREADS)
774 		return false;
775 	threads[thread_id].stack_va_end = sp;
776 	return true;
777 }
778 
779 int thread_get_id_may_fail(void)
780 {
781 	/*
782 	 * thread_get_core_local() requires foreign interrupts to be disabled
783 	 */
784 	uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR);
785 	struct thread_core_local *l = thread_get_core_local();
786 	int ct = l->curr_thread;
787 
788 	thread_unmask_exceptions(exceptions);
789 	return ct;
790 }
791 
792 int thread_get_id(void)
793 {
794 	int ct = thread_get_id_may_fail();
795 
796 	assert(ct >= 0 && ct < CFG_NUM_THREADS);
797 	return ct;
798 }
799 
800 static void init_handlers(const struct thread_handlers *handlers)
801 {
802 	thread_cpu_on_handler_ptr = handlers->cpu_on;
803 	thread_cpu_off_handler_ptr = handlers->cpu_off;
804 	thread_cpu_suspend_handler_ptr = handlers->cpu_suspend;
805 	thread_cpu_resume_handler_ptr = handlers->cpu_resume;
806 	thread_system_off_handler_ptr = handlers->system_off;
807 	thread_system_reset_handler_ptr = handlers->system_reset;
808 }
809 
810 #ifdef CFG_WITH_PAGER
811 static void init_thread_stacks(void)
812 {
813 	size_t n = 0;
814 
815 	/*
816 	 * Allocate virtual memory for thread stacks.
817 	 */
818 	for (n = 0; n < CFG_NUM_THREADS; n++) {
819 		tee_mm_entry_t *mm = NULL;
820 		vaddr_t sp = 0;
821 		size_t num_pages = 0;
822 		struct fobj *fobj = NULL;
823 
824 		/* Find vmem for thread stack and its protection gap */
825 		mm = tee_mm_alloc(&tee_mm_vcore,
826 				  SMALL_PAGE_SIZE + STACK_THREAD_SIZE);
827 		assert(mm);
828 
829 		/* Claim eventual physical page */
830 		tee_pager_add_pages(tee_mm_get_smem(mm), tee_mm_get_size(mm),
831 				    true);
832 
833 		num_pages = tee_mm_get_bytes(mm) / SMALL_PAGE_SIZE - 1;
834 		fobj = fobj_locked_paged_alloc(num_pages);
835 
836 		/* Add the area to the pager */
837 		tee_pager_add_core_area(tee_mm_get_smem(mm) + SMALL_PAGE_SIZE,
838 					PAGER_AREA_TYPE_LOCK, fobj);
839 		fobj_put(fobj);
840 
841 		/* init effective stack */
842 		sp = tee_mm_get_smem(mm) + tee_mm_get_bytes(mm);
843 		asan_tag_access((void *)tee_mm_get_smem(mm), (void *)sp);
844 		if (!thread_init_stack(n, sp))
845 			panic("init stack failed");
846 	}
847 }
848 #else
849 static void init_thread_stacks(void)
850 {
851 	size_t n;
852 
853 	/* Assign the thread stacks */
854 	for (n = 0; n < CFG_NUM_THREADS; n++) {
855 		if (!thread_init_stack(n, GET_STACK(stack_thread[n])))
856 			panic("thread_init_stack failed");
857 	}
858 }
859 #endif /*CFG_WITH_PAGER*/
860 
861 static void init_user_kcode(void)
862 {
863 #ifdef CFG_CORE_UNMAP_CORE_AT_EL0
864 	vaddr_t v = (vaddr_t)thread_excp_vect;
865 	vaddr_t ve = (vaddr_t)thread_excp_vect_end;
866 
867 	thread_user_kcode_va = ROUNDDOWN(v, CORE_MMU_USER_CODE_SIZE);
868 	ve = ROUNDUP(ve, CORE_MMU_USER_CODE_SIZE);
869 	thread_user_kcode_size = ve - thread_user_kcode_va;
870 
871 	core_mmu_get_user_va_range(&v, NULL);
872 	thread_user_kcode_offset = thread_user_kcode_va - v;
873 
874 #if defined(CFG_CORE_WORKAROUND_SPECTRE_BP_SEC) && defined(ARM64)
875 	/*
876 	 * When transitioning to EL0 subtract SP with this much to point to
877 	 * this special kdata page instead. SP is restored by add this much
878 	 * while transitioning back to EL1.
879 	 */
880 	v += thread_user_kcode_size;
881 	thread_user_kdata_sp_offset = (vaddr_t)thread_core_local - v;
882 #endif
883 #endif /*CFG_CORE_UNMAP_CORE_AT_EL0*/
884 }
885 
886 void thread_init_threads(void)
887 {
888 	size_t n;
889 
890 	init_thread_stacks();
891 	pgt_init();
892 
893 	mutex_lockdep_init();
894 
895 	for (n = 0; n < CFG_NUM_THREADS; n++) {
896 		TAILQ_INIT(&threads[n].tsd.sess_stack);
897 		SLIST_INIT(&threads[n].tsd.pgt_cache);
898 	}
899 
900 	for (n = 0; n < CFG_TEE_CORE_NB_CORE; n++)
901 		thread_core_local[n].curr_thread = -1;
902 }
903 
904 void thread_init_primary(const struct thread_handlers *handlers)
905 {
906 	init_handlers(handlers);
907 
908 	/* Initialize canaries around the stacks */
909 	init_canaries();
910 
911 	init_user_kcode();
912 }
913 
914 static void init_sec_mon(size_t pos __maybe_unused)
915 {
916 #if !defined(CFG_WITH_ARM_TRUSTED_FW)
917 	/* Initialize secure monitor */
918 	sm_init(GET_STACK(stack_tmp[pos]));
919 #endif
920 }
921 
922 static uint32_t __maybe_unused get_midr_implementer(uint32_t midr)
923 {
924 	return (midr >> MIDR_IMPLEMENTER_SHIFT) & MIDR_IMPLEMENTER_MASK;
925 }
926 
927 static uint32_t __maybe_unused get_midr_primary_part(uint32_t midr)
928 {
929 	return (midr >> MIDR_PRIMARY_PART_NUM_SHIFT) &
930 	       MIDR_PRIMARY_PART_NUM_MASK;
931 }
932 
933 #ifdef ARM64
934 static bool probe_workaround_available(void)
935 {
936 	int32_t r;
937 
938 	r = thread_smc(SMCCC_VERSION, 0, 0, 0);
939 	if (r < 0)
940 		return false;
941 	if (r < 0x10001)	/* compare with version 1.1 */
942 		return false;
943 
944 	/* Version >= 1.1, so SMCCC_ARCH_FEATURES is available */
945 	r = thread_smc(SMCCC_ARCH_FEATURES, SMCCC_ARCH_WORKAROUND_1, 0, 0);
946 	return r >= 0;
947 }
948 
949 static vaddr_t __maybe_unused select_vector(vaddr_t a)
950 {
951 	if (probe_workaround_available()) {
952 		DMSG("SMCCC_ARCH_WORKAROUND_1 (%#08" PRIx32 ") available",
953 		     SMCCC_ARCH_WORKAROUND_1);
954 		DMSG("SMC Workaround for CVE-2017-5715 used");
955 		return a;
956 	}
957 
958 	DMSG("SMCCC_ARCH_WORKAROUND_1 (%#08" PRIx32 ") unavailable",
959 	     SMCCC_ARCH_WORKAROUND_1);
960 	DMSG("SMC Workaround for CVE-2017-5715 not needed (if ARM-TF is up to date)");
961 	return (vaddr_t)thread_excp_vect;
962 }
963 #else
964 static vaddr_t __maybe_unused select_vector(vaddr_t a)
965 {
966 	return a;
967 }
968 #endif
969 
970 static vaddr_t get_excp_vect(void)
971 {
972 #ifdef CFG_CORE_WORKAROUND_SPECTRE_BP_SEC
973 	uint32_t midr = read_midr();
974 
975 	if (get_midr_implementer(midr) != MIDR_IMPLEMENTER_ARM)
976 		return (vaddr_t)thread_excp_vect;
977 
978 	switch (get_midr_primary_part(midr)) {
979 #ifdef ARM32
980 	case CORTEX_A8_PART_NUM:
981 	case CORTEX_A9_PART_NUM:
982 	case CORTEX_A17_PART_NUM:
983 #endif
984 	case CORTEX_A57_PART_NUM:
985 	case CORTEX_A72_PART_NUM:
986 	case CORTEX_A73_PART_NUM:
987 	case CORTEX_A75_PART_NUM:
988 		return select_vector((vaddr_t)thread_excp_vect_workaround);
989 #ifdef ARM32
990 	case CORTEX_A15_PART_NUM:
991 		return select_vector((vaddr_t)thread_excp_vect_workaround_a15);
992 #endif
993 	default:
994 		return (vaddr_t)thread_excp_vect;
995 	}
996 #endif /*CFG_CORE_WORKAROUND_SPECTRE_BP_SEC*/
997 
998 	return (vaddr_t)thread_excp_vect;
999 }
1000 
1001 void thread_init_per_cpu(void)
1002 {
1003 	size_t pos = get_core_pos();
1004 	struct thread_core_local *l = thread_get_core_local();
1005 
1006 	init_sec_mon(pos);
1007 
1008 	set_tmp_stack(l, GET_STACK(stack_tmp[pos]) - STACK_TMP_OFFS);
1009 	set_abt_stack(l, GET_STACK(stack_abt[pos]));
1010 
1011 	thread_init_vbar(get_excp_vect());
1012 
1013 #ifdef CFG_FTRACE_SUPPORT
1014 	/*
1015 	 * Enable accesses to frequency register and physical counter
1016 	 * register in EL0/PL0 required for timestamping during
1017 	 * function tracing.
1018 	 */
1019 	write_cntkctl(read_cntkctl() | CNTKCTL_PL0PCTEN);
1020 #endif
1021 }
1022 
1023 struct thread_specific_data *thread_get_tsd(void)
1024 {
1025 	return &threads[thread_get_id()].tsd;
1026 }
1027 
1028 struct thread_ctx_regs *thread_get_ctx_regs(void)
1029 {
1030 	struct thread_core_local *l = thread_get_core_local();
1031 
1032 	assert(l->curr_thread != -1);
1033 	return &threads[l->curr_thread].regs;
1034 }
1035 
1036 void thread_set_foreign_intr(bool enable)
1037 {
1038 	/* thread_get_core_local() requires foreign interrupts to be disabled */
1039 	uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR);
1040 	struct thread_core_local *l;
1041 
1042 	l = thread_get_core_local();
1043 
1044 	assert(l->curr_thread != -1);
1045 
1046 	if (enable) {
1047 		threads[l->curr_thread].flags |=
1048 					THREAD_FLAGS_FOREIGN_INTR_ENABLE;
1049 		thread_set_exceptions(exceptions & ~THREAD_EXCP_FOREIGN_INTR);
1050 	} else {
1051 		/*
1052 		 * No need to disable foreign interrupts here since they're
1053 		 * already disabled above.
1054 		 */
1055 		threads[l->curr_thread].flags &=
1056 					~THREAD_FLAGS_FOREIGN_INTR_ENABLE;
1057 	}
1058 }
1059 
1060 void thread_restore_foreign_intr(void)
1061 {
1062 	/* thread_get_core_local() requires foreign interrupts to be disabled */
1063 	uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR);
1064 	struct thread_core_local *l;
1065 
1066 	l = thread_get_core_local();
1067 
1068 	assert(l->curr_thread != -1);
1069 
1070 	if (threads[l->curr_thread].flags & THREAD_FLAGS_FOREIGN_INTR_ENABLE)
1071 		thread_set_exceptions(exceptions & ~THREAD_EXCP_FOREIGN_INTR);
1072 }
1073 
1074 #ifdef CFG_WITH_VFP
1075 uint32_t thread_kernel_enable_vfp(void)
1076 {
1077 	uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR);
1078 	struct thread_ctx *thr = threads + thread_get_id();
1079 	struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp;
1080 
1081 	assert(!vfp_is_enabled());
1082 
1083 	if (!thr->vfp_state.ns_saved) {
1084 		vfp_lazy_save_state_final(&thr->vfp_state.ns,
1085 					  true /*force_save*/);
1086 		thr->vfp_state.ns_saved = true;
1087 	} else if (thr->vfp_state.sec_lazy_saved &&
1088 		   !thr->vfp_state.sec_saved) {
1089 		/*
1090 		 * This happens when we're handling an abort while the
1091 		 * thread was using the VFP state.
1092 		 */
1093 		vfp_lazy_save_state_final(&thr->vfp_state.sec,
1094 					  false /*!force_save*/);
1095 		thr->vfp_state.sec_saved = true;
1096 	} else if (tuv && tuv->lazy_saved && !tuv->saved) {
1097 		/*
1098 		 * This can happen either during syscall or abort
1099 		 * processing (while processing a syscall).
1100 		 */
1101 		vfp_lazy_save_state_final(&tuv->vfp, false /*!force_save*/);
1102 		tuv->saved = true;
1103 	}
1104 
1105 	vfp_enable();
1106 	return exceptions;
1107 }
1108 
1109 void thread_kernel_disable_vfp(uint32_t state)
1110 {
1111 	uint32_t exceptions;
1112 
1113 	assert(vfp_is_enabled());
1114 
1115 	vfp_disable();
1116 	exceptions = thread_get_exceptions();
1117 	assert(exceptions & THREAD_EXCP_FOREIGN_INTR);
1118 	exceptions &= ~THREAD_EXCP_FOREIGN_INTR;
1119 	exceptions |= state & THREAD_EXCP_FOREIGN_INTR;
1120 	thread_set_exceptions(exceptions);
1121 }
1122 
1123 void thread_kernel_save_vfp(void)
1124 {
1125 	struct thread_ctx *thr = threads + thread_get_id();
1126 
1127 	assert(thread_get_exceptions() & THREAD_EXCP_FOREIGN_INTR);
1128 	if (vfp_is_enabled()) {
1129 		vfp_lazy_save_state_init(&thr->vfp_state.sec);
1130 		thr->vfp_state.sec_lazy_saved = true;
1131 	}
1132 }
1133 
1134 void thread_kernel_restore_vfp(void)
1135 {
1136 	struct thread_ctx *thr = threads + thread_get_id();
1137 
1138 	assert(thread_get_exceptions() & THREAD_EXCP_FOREIGN_INTR);
1139 	assert(!vfp_is_enabled());
1140 	if (thr->vfp_state.sec_lazy_saved) {
1141 		vfp_lazy_restore_state(&thr->vfp_state.sec,
1142 				       thr->vfp_state.sec_saved);
1143 		thr->vfp_state.sec_saved = false;
1144 		thr->vfp_state.sec_lazy_saved = false;
1145 	}
1146 }
1147 
1148 void thread_user_enable_vfp(struct thread_user_vfp_state *uvfp)
1149 {
1150 	struct thread_ctx *thr = threads + thread_get_id();
1151 	struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp;
1152 
1153 	assert(thread_get_exceptions() & THREAD_EXCP_FOREIGN_INTR);
1154 	assert(!vfp_is_enabled());
1155 
1156 	if (!thr->vfp_state.ns_saved) {
1157 		vfp_lazy_save_state_final(&thr->vfp_state.ns,
1158 					  true /*force_save*/);
1159 		thr->vfp_state.ns_saved = true;
1160 	} else if (tuv && uvfp != tuv) {
1161 		if (tuv->lazy_saved && !tuv->saved) {
1162 			vfp_lazy_save_state_final(&tuv->vfp,
1163 						  false /*!force_save*/);
1164 			tuv->saved = true;
1165 		}
1166 	}
1167 
1168 	if (uvfp->lazy_saved)
1169 		vfp_lazy_restore_state(&uvfp->vfp, uvfp->saved);
1170 	uvfp->lazy_saved = false;
1171 	uvfp->saved = false;
1172 
1173 	thr->vfp_state.uvfp = uvfp;
1174 	vfp_enable();
1175 }
1176 
1177 void thread_user_save_vfp(void)
1178 {
1179 	struct thread_ctx *thr = threads + thread_get_id();
1180 	struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp;
1181 
1182 	assert(thread_get_exceptions() & THREAD_EXCP_FOREIGN_INTR);
1183 	if (!vfp_is_enabled())
1184 		return;
1185 
1186 	assert(tuv && !tuv->lazy_saved && !tuv->saved);
1187 	vfp_lazy_save_state_init(&tuv->vfp);
1188 	tuv->lazy_saved = true;
1189 }
1190 
1191 void thread_user_clear_vfp(struct thread_user_vfp_state *uvfp)
1192 {
1193 	struct thread_ctx *thr = threads + thread_get_id();
1194 
1195 	if (uvfp == thr->vfp_state.uvfp)
1196 		thr->vfp_state.uvfp = NULL;
1197 	uvfp->lazy_saved = false;
1198 	uvfp->saved = false;
1199 }
1200 #endif /*CFG_WITH_VFP*/
1201 
1202 #ifdef ARM32
1203 static bool get_spsr(bool is_32bit, unsigned long entry_func, uint32_t *spsr)
1204 {
1205 	uint32_t s;
1206 
1207 	if (!is_32bit)
1208 		return false;
1209 
1210 	s = read_spsr();
1211 	s &= ~(CPSR_MODE_MASK | CPSR_T | CPSR_IT_MASK1 | CPSR_IT_MASK2);
1212 	s |= CPSR_MODE_USR;
1213 	if (entry_func & 1)
1214 		s |= CPSR_T;
1215 	*spsr = s;
1216 	return true;
1217 }
1218 #endif
1219 
1220 #ifdef ARM64
1221 static bool get_spsr(bool is_32bit, unsigned long entry_func, uint32_t *spsr)
1222 {
1223 	uint32_t s;
1224 
1225 	if (is_32bit) {
1226 		s = read_daif() & (SPSR_32_AIF_MASK << SPSR_32_AIF_SHIFT);
1227 		s |= SPSR_MODE_RW_32 << SPSR_MODE_RW_SHIFT;
1228 		s |= (entry_func & SPSR_32_T_MASK) << SPSR_32_T_SHIFT;
1229 	} else {
1230 		s = read_daif() & (SPSR_64_DAIF_MASK << SPSR_64_DAIF_SHIFT);
1231 	}
1232 
1233 	*spsr = s;
1234 	return true;
1235 }
1236 #endif
1237 
1238 uint32_t thread_enter_user_mode(unsigned long a0, unsigned long a1,
1239 		unsigned long a2, unsigned long a3, unsigned long user_sp,
1240 		unsigned long entry_func, bool is_32bit,
1241 		uint32_t *exit_status0, uint32_t *exit_status1)
1242 {
1243 	uint32_t spsr;
1244 
1245 	tee_ta_update_session_utime_resume();
1246 
1247 	if (!get_spsr(is_32bit, entry_func, &spsr)) {
1248 		*exit_status0 = 1; /* panic */
1249 		*exit_status1 = 0xbadbadba;
1250 		return 0;
1251 	}
1252 	return __thread_enter_user_mode(a0, a1, a2, a3, user_sp, entry_func,
1253 					spsr, exit_status0, exit_status1);
1254 }
1255 
1256 #ifdef CFG_CORE_UNMAP_CORE_AT_EL0
1257 void thread_get_user_kcode(struct mobj **mobj, size_t *offset,
1258 			   vaddr_t *va, size_t *sz)
1259 {
1260 	core_mmu_get_user_va_range(va, NULL);
1261 	*mobj = mobj_tee_ram;
1262 	*offset = thread_user_kcode_va - TEE_RAM_START;
1263 	*sz = thread_user_kcode_size;
1264 }
1265 #endif
1266 
1267 #if defined(CFG_CORE_UNMAP_CORE_AT_EL0) && \
1268 	defined(CFG_CORE_WORKAROUND_SPECTRE_BP_SEC) && defined(ARM64)
1269 void thread_get_user_kdata(struct mobj **mobj, size_t *offset,
1270 			   vaddr_t *va, size_t *sz)
1271 {
1272 	vaddr_t v;
1273 
1274 	core_mmu_get_user_va_range(&v, NULL);
1275 	*va = v + thread_user_kcode_size;
1276 	*mobj = mobj_tee_ram;
1277 	*offset = (vaddr_t)thread_user_kdata_page - TEE_RAM_START;
1278 	*sz = sizeof(thread_user_kdata_page);
1279 }
1280 #endif
1281