1 // SPDX-License-Identifier: BSD-2-Clause 2 /* 3 * Copyright (c) 2016, Linaro Limited 4 * Copyright (c) 2014, STMicroelectronics International N.V. 5 */ 6 7 #include <platform_config.h> 8 9 #include <arm.h> 10 #include <assert.h> 11 #include <io.h> 12 #include <keep.h> 13 #include <kernel/asan.h> 14 #include <kernel/boot.h> 15 #include <kernel/linker.h> 16 #include <kernel/lockdep.h> 17 #include <kernel/misc.h> 18 #include <kernel/panic.h> 19 #include <kernel/spinlock.h> 20 #include <kernel/tee_ta_manager.h> 21 #include <kernel/thread_defs.h> 22 #include <kernel/thread.h> 23 #include <kernel/virtualization.h> 24 #include <mm/core_memprot.h> 25 #include <mm/mobj.h> 26 #include <mm/tee_mm.h> 27 #include <mm/tee_mmu.h> 28 #include <mm/tee_pager.h> 29 #include <smccc.h> 30 #include <sm/sm.h> 31 #include <trace.h> 32 #include <util.h> 33 34 #include "thread_private.h" 35 36 #ifdef CFG_WITH_ARM_TRUSTED_FW 37 #define STACK_TMP_OFFS 0 38 #else 39 #define STACK_TMP_OFFS SM_STACK_TMP_RESERVE_SIZE 40 #endif 41 42 43 #ifdef ARM32 44 #ifdef CFG_CORE_SANITIZE_KADDRESS 45 #define STACK_TMP_SIZE (3072 + STACK_TMP_OFFS) 46 #else 47 #define STACK_TMP_SIZE (2048 + STACK_TMP_OFFS) 48 #endif 49 #define STACK_THREAD_SIZE 8192 50 51 #if defined(CFG_CORE_SANITIZE_KADDRESS) || defined(__clang__) 52 #define STACK_ABT_SIZE 3072 53 #else 54 #define STACK_ABT_SIZE 2048 55 #endif 56 57 #endif /*ARM32*/ 58 59 #ifdef ARM64 60 #if defined(__clang__) && !defined(CFG_CC_OPTIMIZE_FOR_SIZE) 61 #define STACK_TMP_SIZE (4096 + STACK_TMP_OFFS) 62 #else 63 #define STACK_TMP_SIZE (2048 + STACK_TMP_OFFS) 64 #endif 65 #define STACK_THREAD_SIZE 8192 66 67 #if TRACE_LEVEL > 0 68 #define STACK_ABT_SIZE 3072 69 #else 70 #define STACK_ABT_SIZE 1024 71 #endif 72 #endif /*ARM64*/ 73 74 struct thread_ctx threads[CFG_NUM_THREADS]; 75 76 struct thread_core_local thread_core_local[CFG_TEE_CORE_NB_CORE] __nex_bss; 77 78 #ifdef CFG_WITH_STACK_CANARIES 79 #ifdef ARM32 80 #define STACK_CANARY_SIZE (4 * sizeof(uint32_t)) 81 #endif 82 #ifdef ARM64 83 #define STACK_CANARY_SIZE (8 * sizeof(uint32_t)) 84 #endif 85 #define START_CANARY_VALUE 0xdededede 86 #define END_CANARY_VALUE 0xabababab 87 #define GET_START_CANARY(name, stack_num) name[stack_num][0] 88 #define GET_END_CANARY(name, stack_num) \ 89 name[stack_num][sizeof(name[stack_num]) / sizeof(uint32_t) - 1] 90 #else 91 #define STACK_CANARY_SIZE 0 92 #endif 93 94 #define DECLARE_STACK(name, num_stacks, stack_size, linkage) \ 95 linkage uint32_t name[num_stacks] \ 96 [ROUNDUP(stack_size + STACK_CANARY_SIZE, STACK_ALIGNMENT) / \ 97 sizeof(uint32_t)] \ 98 __attribute__((section(".nozi_stack." # name), \ 99 aligned(STACK_ALIGNMENT))) 100 101 #define STACK_SIZE(stack) (sizeof(stack) - STACK_CANARY_SIZE / 2) 102 103 #define GET_STACK(stack) \ 104 ((vaddr_t)(stack) + STACK_SIZE(stack)) 105 106 DECLARE_STACK(stack_tmp, CFG_TEE_CORE_NB_CORE, STACK_TMP_SIZE, static); 107 DECLARE_STACK(stack_abt, CFG_TEE_CORE_NB_CORE, STACK_ABT_SIZE, static); 108 #ifndef CFG_WITH_PAGER 109 DECLARE_STACK(stack_thread, CFG_NUM_THREADS, STACK_THREAD_SIZE, static); 110 #endif 111 112 const void *stack_tmp_export __section(".identity_map.stack_tmp_export") = 113 (uint8_t *)stack_tmp + sizeof(stack_tmp[0]) - 114 (STACK_TMP_OFFS + STACK_CANARY_SIZE / 2); 115 const uint32_t stack_tmp_stride __section(".identity_map.stack_tmp_stride") = 116 sizeof(stack_tmp[0]); 117 118 /* 119 * These stack setup info are required by secondary boot cores before they 120 * each locally enable the pager (the mmu). Hence kept in pager sections. 121 */ 122 DECLARE_KEEP_PAGER(stack_tmp_export); 123 DECLARE_KEEP_PAGER(stack_tmp_stride); 124 125 #ifdef CFG_CORE_UNMAP_CORE_AT_EL0 126 static vaddr_t thread_user_kcode_va __nex_bss; 127 long thread_user_kcode_offset __nex_bss; 128 static size_t thread_user_kcode_size __nex_bss; 129 #endif 130 131 #if defined(CFG_CORE_UNMAP_CORE_AT_EL0) && \ 132 defined(CFG_CORE_WORKAROUND_SPECTRE_BP_SEC) && defined(ARM64) 133 long thread_user_kdata_sp_offset __nex_bss; 134 static uint8_t thread_user_kdata_page[ 135 ROUNDUP(sizeof(thread_core_local), SMALL_PAGE_SIZE)] 136 __aligned(SMALL_PAGE_SIZE) 137 #ifndef CFG_VIRTUALIZATION 138 __section(".nozi.kdata_page"); 139 #else 140 __section(".nex_nozi.kdata_page"); 141 #endif 142 #endif 143 144 static unsigned int thread_global_lock __nex_bss = SPINLOCK_UNLOCK; 145 146 static void init_canaries(void) 147 { 148 #ifdef CFG_WITH_STACK_CANARIES 149 size_t n; 150 #define INIT_CANARY(name) \ 151 for (n = 0; n < ARRAY_SIZE(name); n++) { \ 152 uint32_t *start_canary = &GET_START_CANARY(name, n); \ 153 uint32_t *end_canary = &GET_END_CANARY(name, n); \ 154 \ 155 *start_canary = START_CANARY_VALUE; \ 156 *end_canary = END_CANARY_VALUE; \ 157 DMSG("#Stack canaries for %s[%zu] with top at %p", \ 158 #name, n, (void *)(end_canary - 1)); \ 159 DMSG("watch *%p", (void *)end_canary); \ 160 } 161 162 INIT_CANARY(stack_tmp); 163 INIT_CANARY(stack_abt); 164 #if !defined(CFG_WITH_PAGER) && !defined(CFG_VIRTUALIZATION) 165 INIT_CANARY(stack_thread); 166 #endif 167 #endif/*CFG_WITH_STACK_CANARIES*/ 168 } 169 170 #define CANARY_DIED(stack, loc, n) \ 171 do { \ 172 EMSG_RAW("Dead canary at %s of '%s[%zu]'", #loc, #stack, n); \ 173 panic(); \ 174 } while (0) 175 176 void thread_check_canaries(void) 177 { 178 #ifdef CFG_WITH_STACK_CANARIES 179 size_t n; 180 181 for (n = 0; n < ARRAY_SIZE(stack_tmp); n++) { 182 if (GET_START_CANARY(stack_tmp, n) != START_CANARY_VALUE) 183 CANARY_DIED(stack_tmp, start, n); 184 if (GET_END_CANARY(stack_tmp, n) != END_CANARY_VALUE) 185 CANARY_DIED(stack_tmp, end, n); 186 } 187 188 for (n = 0; n < ARRAY_SIZE(stack_abt); n++) { 189 if (GET_START_CANARY(stack_abt, n) != START_CANARY_VALUE) 190 CANARY_DIED(stack_abt, start, n); 191 if (GET_END_CANARY(stack_abt, n) != END_CANARY_VALUE) 192 CANARY_DIED(stack_abt, end, n); 193 194 } 195 #if !defined(CFG_WITH_PAGER) && !defined(CFG_VIRTUALIZATION) 196 for (n = 0; n < ARRAY_SIZE(stack_thread); n++) { 197 if (GET_START_CANARY(stack_thread, n) != START_CANARY_VALUE) 198 CANARY_DIED(stack_thread, start, n); 199 if (GET_END_CANARY(stack_thread, n) != END_CANARY_VALUE) 200 CANARY_DIED(stack_thread, end, n); 201 } 202 #endif 203 #endif/*CFG_WITH_STACK_CANARIES*/ 204 } 205 206 void thread_lock_global(void) 207 { 208 cpu_spin_lock(&thread_global_lock); 209 } 210 211 void thread_unlock_global(void) 212 { 213 cpu_spin_unlock(&thread_global_lock); 214 } 215 216 #ifdef ARM32 217 uint32_t thread_get_exceptions(void) 218 { 219 uint32_t cpsr = read_cpsr(); 220 221 return (cpsr >> CPSR_F_SHIFT) & THREAD_EXCP_ALL; 222 } 223 224 void thread_set_exceptions(uint32_t exceptions) 225 { 226 uint32_t cpsr = read_cpsr(); 227 228 /* Foreign interrupts must not be unmasked while holding a spinlock */ 229 if (!(exceptions & THREAD_EXCP_FOREIGN_INTR)) 230 assert_have_no_spinlock(); 231 232 cpsr &= ~(THREAD_EXCP_ALL << CPSR_F_SHIFT); 233 cpsr |= ((exceptions & THREAD_EXCP_ALL) << CPSR_F_SHIFT); 234 write_cpsr(cpsr); 235 } 236 #endif /*ARM32*/ 237 238 #ifdef ARM64 239 uint32_t thread_get_exceptions(void) 240 { 241 uint32_t daif = read_daif(); 242 243 return (daif >> DAIF_F_SHIFT) & THREAD_EXCP_ALL; 244 } 245 246 void thread_set_exceptions(uint32_t exceptions) 247 { 248 uint32_t daif = read_daif(); 249 250 /* Foreign interrupts must not be unmasked while holding a spinlock */ 251 if (!(exceptions & THREAD_EXCP_FOREIGN_INTR)) 252 assert_have_no_spinlock(); 253 254 daif &= ~(THREAD_EXCP_ALL << DAIF_F_SHIFT); 255 daif |= ((exceptions & THREAD_EXCP_ALL) << DAIF_F_SHIFT); 256 write_daif(daif); 257 } 258 #endif /*ARM64*/ 259 260 uint32_t thread_mask_exceptions(uint32_t exceptions) 261 { 262 uint32_t state = thread_get_exceptions(); 263 264 thread_set_exceptions(state | (exceptions & THREAD_EXCP_ALL)); 265 return state; 266 } 267 268 void thread_unmask_exceptions(uint32_t state) 269 { 270 thread_set_exceptions(state & THREAD_EXCP_ALL); 271 } 272 273 274 static struct thread_core_local *get_core_local(unsigned int pos) 275 { 276 /* 277 * Foreign interrupts must be disabled before playing with core_local 278 * since we otherwise may be rescheduled to a different core in the 279 * middle of this function. 280 */ 281 assert(thread_get_exceptions() & THREAD_EXCP_FOREIGN_INTR); 282 283 assert(pos < CFG_TEE_CORE_NB_CORE); 284 return &thread_core_local[pos]; 285 } 286 287 struct thread_core_local *thread_get_core_local(void) 288 { 289 unsigned int pos = get_core_pos(); 290 291 return get_core_local(pos); 292 } 293 294 static void thread_lazy_save_ns_vfp(void) 295 { 296 #ifdef CFG_WITH_VFP 297 struct thread_ctx *thr = threads + thread_get_id(); 298 299 thr->vfp_state.ns_saved = false; 300 vfp_lazy_save_state_init(&thr->vfp_state.ns); 301 #endif /*CFG_WITH_VFP*/ 302 } 303 304 static void thread_lazy_restore_ns_vfp(void) 305 { 306 #ifdef CFG_WITH_VFP 307 struct thread_ctx *thr = threads + thread_get_id(); 308 struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp; 309 310 assert(!thr->vfp_state.sec_lazy_saved && !thr->vfp_state.sec_saved); 311 312 if (tuv && tuv->lazy_saved && !tuv->saved) { 313 vfp_lazy_save_state_final(&tuv->vfp, false /*!force_save*/); 314 tuv->saved = true; 315 } 316 317 vfp_lazy_restore_state(&thr->vfp_state.ns, thr->vfp_state.ns_saved); 318 thr->vfp_state.ns_saved = false; 319 #endif /*CFG_WITH_VFP*/ 320 } 321 322 #ifdef ARM32 323 static void init_regs(struct thread_ctx *thread, uint32_t a0, uint32_t a1, 324 uint32_t a2, uint32_t a3) 325 { 326 thread->regs.pc = (uint32_t)thread_std_smc_entry; 327 328 /* 329 * Stdcalls starts in SVC mode with masked foreign interrupts, masked 330 * Asynchronous abort and unmasked native interrupts. 331 */ 332 thread->regs.cpsr = read_cpsr() & ARM32_CPSR_E; 333 thread->regs.cpsr |= CPSR_MODE_SVC | CPSR_A | 334 (THREAD_EXCP_FOREIGN_INTR << ARM32_CPSR_F_SHIFT); 335 /* Enable thumb mode if it's a thumb instruction */ 336 if (thread->regs.pc & 1) 337 thread->regs.cpsr |= CPSR_T; 338 /* Reinitialize stack pointer */ 339 thread->regs.svc_sp = thread->stack_va_end; 340 341 /* 342 * Copy arguments into context. This will make the 343 * arguments appear in r0-r7 when thread is started. 344 */ 345 thread->regs.r0 = a0; 346 thread->regs.r1 = a1; 347 thread->regs.r2 = a2; 348 thread->regs.r3 = a3; 349 thread->regs.r4 = 0; 350 thread->regs.r5 = 0; 351 thread->regs.r6 = 0; 352 thread->regs.r7 = 0; 353 } 354 #endif /*ARM32*/ 355 356 #ifdef ARM64 357 static void init_regs(struct thread_ctx *thread, uint32_t a0, uint32_t a1, 358 uint32_t a2, uint32_t a3) 359 { 360 thread->regs.pc = (uint64_t)thread_std_smc_entry; 361 362 /* 363 * Stdcalls starts in SVC mode with masked foreign interrupts, masked 364 * Asynchronous abort and unmasked native interrupts. 365 */ 366 thread->regs.cpsr = SPSR_64(SPSR_64_MODE_EL1, SPSR_64_MODE_SP_EL0, 367 THREAD_EXCP_FOREIGN_INTR | DAIFBIT_ABT); 368 /* Reinitialize stack pointer */ 369 thread->regs.sp = thread->stack_va_end; 370 371 /* 372 * Copy arguments into context. This will make the 373 * arguments appear in x0-x7 when thread is started. 374 */ 375 thread->regs.x[0] = a0; 376 thread->regs.x[1] = a1; 377 thread->regs.x[2] = a2; 378 thread->regs.x[3] = a3; 379 thread->regs.x[4] = 0; 380 thread->regs.x[5] = 0; 381 thread->regs.x[6] = 0; 382 thread->regs.x[7] = 0; 383 384 /* Set up frame pointer as per the Aarch64 AAPCS */ 385 thread->regs.x[29] = 0; 386 } 387 #endif /*ARM64*/ 388 389 void thread_init_boot_thread(void) 390 { 391 struct thread_core_local *l = thread_get_core_local(); 392 393 thread_init_threads(); 394 395 l->curr_thread = 0; 396 threads[0].state = THREAD_STATE_ACTIVE; 397 } 398 399 void thread_clr_boot_thread(void) 400 { 401 struct thread_core_local *l = thread_get_core_local(); 402 403 assert(l->curr_thread >= 0 && l->curr_thread < CFG_NUM_THREADS); 404 assert(threads[l->curr_thread].state == THREAD_STATE_ACTIVE); 405 threads[l->curr_thread].state = THREAD_STATE_FREE; 406 l->curr_thread = -1; 407 } 408 409 void thread_alloc_and_run(uint32_t a0, uint32_t a1, uint32_t a2, uint32_t a3) 410 { 411 size_t n; 412 struct thread_core_local *l = thread_get_core_local(); 413 bool found_thread = false; 414 415 assert(l->curr_thread == -1); 416 417 thread_lock_global(); 418 419 for (n = 0; n < CFG_NUM_THREADS; n++) { 420 if (threads[n].state == THREAD_STATE_FREE) { 421 threads[n].state = THREAD_STATE_ACTIVE; 422 found_thread = true; 423 break; 424 } 425 } 426 427 thread_unlock_global(); 428 429 if (!found_thread) 430 return; 431 432 l->curr_thread = n; 433 434 threads[n].flags = 0; 435 init_regs(threads + n, a0, a1, a2, a3); 436 437 thread_lazy_save_ns_vfp(); 438 439 l->flags &= ~THREAD_CLF_TMP; 440 thread_resume(&threads[n].regs); 441 /*NOTREACHED*/ 442 panic(); 443 } 444 445 #ifdef ARM32 446 static void copy_a0_to_a3(struct thread_ctx_regs *regs, uint32_t a0, 447 uint32_t a1, uint32_t a2, uint32_t a3) 448 { 449 /* 450 * Update returned values from RPC, values will appear in 451 * r0-r3 when thread is resumed. 452 */ 453 regs->r0 = a0; 454 regs->r1 = a1; 455 regs->r2 = a2; 456 regs->r3 = a3; 457 } 458 #endif /*ARM32*/ 459 460 #ifdef ARM64 461 static void copy_a0_to_a3(struct thread_ctx_regs *regs, uint32_t a0, 462 uint32_t a1, uint32_t a2, uint32_t a3) 463 { 464 /* 465 * Update returned values from RPC, values will appear in 466 * x0-x3 when thread is resumed. 467 */ 468 regs->x[0] = a0; 469 regs->x[1] = a1; 470 regs->x[2] = a2; 471 regs->x[3] = a3; 472 } 473 #endif /*ARM64*/ 474 475 #ifdef ARM32 476 static bool is_from_user(uint32_t cpsr) 477 { 478 return (cpsr & ARM32_CPSR_MODE_MASK) == ARM32_CPSR_MODE_USR; 479 } 480 #endif 481 482 #ifdef ARM64 483 static bool is_from_user(uint32_t cpsr) 484 { 485 if (cpsr & (SPSR_MODE_RW_32 << SPSR_MODE_RW_SHIFT)) 486 return true; 487 if (((cpsr >> SPSR_64_MODE_EL_SHIFT) & SPSR_64_MODE_EL_MASK) == 488 SPSR_64_MODE_EL0) 489 return true; 490 return false; 491 } 492 #endif 493 494 #ifdef CFG_SYSCALL_FTRACE 495 static void __noprof ftrace_suspend(void) 496 { 497 struct tee_ta_session *s = TAILQ_FIRST(&thread_get_tsd()->sess_stack); 498 499 if (!s) 500 return; 501 502 if (s->fbuf) 503 s->fbuf->syscall_trace_suspended = true; 504 } 505 506 static void __noprof ftrace_resume(void) 507 { 508 struct tee_ta_session *s = TAILQ_FIRST(&thread_get_tsd()->sess_stack); 509 510 if (!s) 511 return; 512 513 if (s->fbuf) 514 s->fbuf->syscall_trace_suspended = false; 515 } 516 #else 517 static void __noprof ftrace_suspend(void) 518 { 519 } 520 521 static void __noprof ftrace_resume(void) 522 { 523 } 524 #endif 525 526 static bool is_user_mode(struct thread_ctx_regs *regs) 527 { 528 return is_from_user((uint32_t)regs->cpsr); 529 } 530 531 void thread_resume_from_rpc(uint32_t thread_id, uint32_t a0, uint32_t a1, 532 uint32_t a2, uint32_t a3) 533 { 534 size_t n = thread_id; 535 struct thread_core_local *l = thread_get_core_local(); 536 bool found_thread = false; 537 538 assert(l->curr_thread == -1); 539 540 thread_lock_global(); 541 542 if (n < CFG_NUM_THREADS && threads[n].state == THREAD_STATE_SUSPENDED) { 543 threads[n].state = THREAD_STATE_ACTIVE; 544 found_thread = true; 545 } 546 547 thread_unlock_global(); 548 549 if (!found_thread) 550 return; 551 552 l->curr_thread = n; 553 554 if (threads[n].have_user_map) { 555 core_mmu_set_user_map(&threads[n].user_map); 556 if (threads[n].flags & THREAD_FLAGS_EXIT_ON_FOREIGN_INTR) 557 tee_ta_ftrace_update_times_resume(); 558 } 559 560 if (is_user_mode(&threads[n].regs)) 561 tee_ta_update_session_utime_resume(); 562 563 /* 564 * Return from RPC to request service of a foreign interrupt must not 565 * get parameters from non-secure world. 566 */ 567 if (threads[n].flags & THREAD_FLAGS_COPY_ARGS_ON_RETURN) { 568 copy_a0_to_a3(&threads[n].regs, a0, a1, a2, a3); 569 threads[n].flags &= ~THREAD_FLAGS_COPY_ARGS_ON_RETURN; 570 } 571 572 thread_lazy_save_ns_vfp(); 573 574 if (threads[n].have_user_map) 575 ftrace_resume(); 576 577 l->flags &= ~THREAD_CLF_TMP; 578 thread_resume(&threads[n].regs); 579 /*NOTREACHED*/ 580 panic(); 581 } 582 583 void *thread_get_tmp_sp(void) 584 { 585 struct thread_core_local *l = thread_get_core_local(); 586 587 /* 588 * Called from assembly when switching to the temporary stack, so flags 589 * need updating 590 */ 591 l->flags |= THREAD_CLF_TMP; 592 593 return (void *)l->tmp_stack_va_end; 594 } 595 596 #ifdef ARM64 597 vaddr_t thread_get_saved_thread_sp(void) 598 { 599 struct thread_core_local *l = thread_get_core_local(); 600 int ct = l->curr_thread; 601 602 assert(ct != -1); 603 return threads[ct].kern_sp; 604 } 605 #endif /*ARM64*/ 606 607 vaddr_t thread_stack_start(void) 608 { 609 struct thread_ctx *thr; 610 int ct = thread_get_id_may_fail(); 611 612 if (ct == -1) 613 return 0; 614 615 thr = threads + ct; 616 return thr->stack_va_end - STACK_THREAD_SIZE; 617 } 618 619 size_t thread_stack_size(void) 620 { 621 return STACK_THREAD_SIZE; 622 } 623 624 void get_stack_limits(vaddr_t *start, vaddr_t *end) 625 { 626 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR); 627 unsigned int pos = get_core_pos(); 628 struct thread_core_local *l = get_core_local(pos); 629 struct thread_ctx *thr = NULL; 630 int ct = -1; 631 632 if (l->flags & THREAD_CLF_TMP) { 633 /* We're using the temporary stack for this core */ 634 *start = (vaddr_t)stack_tmp[pos]; 635 *end = *start + STACK_TMP_SIZE; 636 } else if (l->flags & THREAD_CLF_ABORT) { 637 /* We're using the abort stack for this core */ 638 *start = (vaddr_t)stack_abt[pos]; 639 *end = *start + STACK_ABT_SIZE; 640 } else if (!l->flags) { 641 /* We're using a thread stack */ 642 ct = l->curr_thread; 643 assert(ct >= 0 && ct < CFG_NUM_THREADS); 644 thr = threads + ct; 645 *end = thr->stack_va_end; 646 *start = *end - STACK_THREAD_SIZE; 647 } 648 649 thread_unmask_exceptions(exceptions); 650 } 651 652 bool thread_is_from_abort_mode(void) 653 { 654 struct thread_core_local *l = thread_get_core_local(); 655 656 return (l->flags >> THREAD_CLF_SAVED_SHIFT) & THREAD_CLF_ABORT; 657 } 658 659 #ifdef ARM32 660 bool thread_is_in_normal_mode(void) 661 { 662 return (read_cpsr() & ARM32_CPSR_MODE_MASK) == ARM32_CPSR_MODE_SVC; 663 } 664 #endif 665 666 #ifdef ARM64 667 bool thread_is_in_normal_mode(void) 668 { 669 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR); 670 struct thread_core_local *l = thread_get_core_local(); 671 bool ret; 672 673 /* 674 * If any bit in l->flags is set aside from THREAD_CLF_TMP we're 675 * handling some exception. 676 */ 677 ret = (l->curr_thread != -1) && !(l->flags & ~THREAD_CLF_TMP); 678 thread_unmask_exceptions(exceptions); 679 680 return ret; 681 } 682 #endif 683 684 void thread_state_free(void) 685 { 686 struct thread_core_local *l = thread_get_core_local(); 687 int ct = l->curr_thread; 688 689 assert(ct != -1); 690 691 thread_lazy_restore_ns_vfp(); 692 tee_pager_release_phys( 693 (void *)(threads[ct].stack_va_end - STACK_THREAD_SIZE), 694 STACK_THREAD_SIZE); 695 696 thread_lock_global(); 697 698 assert(threads[ct].state == THREAD_STATE_ACTIVE); 699 threads[ct].state = THREAD_STATE_FREE; 700 threads[ct].flags = 0; 701 l->curr_thread = -1; 702 703 #ifdef CFG_VIRTUALIZATION 704 virt_unset_guest(); 705 #endif 706 thread_unlock_global(); 707 } 708 709 #ifdef CFG_WITH_PAGER 710 static void release_unused_kernel_stack(struct thread_ctx *thr, 711 uint32_t cpsr __maybe_unused) 712 { 713 #ifdef ARM64 714 /* 715 * If we're from user mode then thr->regs.sp is the saved user 716 * stack pointer and thr->kern_sp holds the last kernel stack 717 * pointer. But if we're from kernel mode then thr->kern_sp isn't 718 * up to date so we need to read from thr->regs.sp instead. 719 */ 720 vaddr_t sp = is_from_user(cpsr) ? thr->kern_sp : thr->regs.sp; 721 #else 722 vaddr_t sp = thr->regs.svc_sp; 723 #endif 724 vaddr_t base = thr->stack_va_end - STACK_THREAD_SIZE; 725 size_t len = sp - base; 726 727 tee_pager_release_phys((void *)base, len); 728 } 729 #else 730 static void release_unused_kernel_stack(struct thread_ctx *thr __unused, 731 uint32_t cpsr __unused) 732 { 733 } 734 #endif 735 736 int thread_state_suspend(uint32_t flags, uint32_t cpsr, vaddr_t pc) 737 { 738 struct thread_core_local *l = thread_get_core_local(); 739 int ct = l->curr_thread; 740 741 assert(ct != -1); 742 743 if (core_mmu_user_mapping_is_active()) 744 ftrace_suspend(); 745 746 thread_check_canaries(); 747 748 release_unused_kernel_stack(threads + ct, cpsr); 749 750 if (is_from_user(cpsr)) { 751 thread_user_save_vfp(); 752 tee_ta_update_session_utime_suspend(); 753 tee_ta_gprof_sample_pc(pc); 754 } 755 thread_lazy_restore_ns_vfp(); 756 757 thread_lock_global(); 758 759 assert(threads[ct].state == THREAD_STATE_ACTIVE); 760 threads[ct].flags |= flags; 761 threads[ct].regs.cpsr = cpsr; 762 threads[ct].regs.pc = pc; 763 threads[ct].state = THREAD_STATE_SUSPENDED; 764 765 threads[ct].have_user_map = core_mmu_user_mapping_is_active(); 766 if (threads[ct].have_user_map) { 767 if (threads[ct].flags & THREAD_FLAGS_EXIT_ON_FOREIGN_INTR) 768 tee_ta_ftrace_update_times_suspend(); 769 core_mmu_get_user_map(&threads[ct].user_map); 770 core_mmu_set_user_map(NULL); 771 } 772 773 l->curr_thread = -1; 774 775 #ifdef CFG_VIRTUALIZATION 776 virt_unset_guest(); 777 #endif 778 779 thread_unlock_global(); 780 781 return ct; 782 } 783 784 #ifdef ARM32 785 static void set_tmp_stack(struct thread_core_local *l, vaddr_t sp) 786 { 787 l->tmp_stack_va_end = sp; 788 thread_set_irq_sp(sp); 789 thread_set_fiq_sp(sp); 790 } 791 792 static void set_abt_stack(struct thread_core_local *l, vaddr_t sp) 793 { 794 l->abt_stack_va_end = sp; 795 thread_set_abt_sp((vaddr_t)l); 796 thread_set_und_sp((vaddr_t)l); 797 } 798 #endif /*ARM32*/ 799 800 #ifdef ARM64 801 static void set_tmp_stack(struct thread_core_local *l, vaddr_t sp) 802 { 803 /* 804 * We're already using the tmp stack when this function is called 805 * so there's no need to assign it to any stack pointer. However, 806 * we'll need to restore it at different times so store it here. 807 */ 808 l->tmp_stack_va_end = sp; 809 } 810 811 static void set_abt_stack(struct thread_core_local *l, vaddr_t sp) 812 { 813 l->abt_stack_va_end = sp; 814 } 815 #endif /*ARM64*/ 816 817 bool thread_init_stack(uint32_t thread_id, vaddr_t sp) 818 { 819 if (thread_id >= CFG_NUM_THREADS) 820 return false; 821 threads[thread_id].stack_va_end = sp; 822 return true; 823 } 824 825 short int thread_get_id_may_fail(void) 826 { 827 /* 828 * thread_get_core_local() requires foreign interrupts to be disabled 829 */ 830 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR); 831 struct thread_core_local *l = thread_get_core_local(); 832 short int ct = l->curr_thread; 833 834 thread_unmask_exceptions(exceptions); 835 return ct; 836 } 837 838 short int thread_get_id(void) 839 { 840 short int ct = thread_get_id_may_fail(); 841 842 /* Thread ID has to fit in a short int */ 843 COMPILE_TIME_ASSERT(CFG_NUM_THREADS <= SHRT_MAX); 844 assert(ct >= 0 && ct < CFG_NUM_THREADS); 845 return ct; 846 } 847 848 #ifdef CFG_WITH_PAGER 849 static void init_thread_stacks(void) 850 { 851 size_t n = 0; 852 853 /* 854 * Allocate virtual memory for thread stacks. 855 */ 856 for (n = 0; n < CFG_NUM_THREADS; n++) { 857 tee_mm_entry_t *mm = NULL; 858 vaddr_t sp = 0; 859 size_t num_pages = 0; 860 struct fobj *fobj = NULL; 861 862 /* Find vmem for thread stack and its protection gap */ 863 mm = tee_mm_alloc(&tee_mm_vcore, 864 SMALL_PAGE_SIZE + STACK_THREAD_SIZE); 865 assert(mm); 866 867 /* Claim eventual physical page */ 868 tee_pager_add_pages(tee_mm_get_smem(mm), tee_mm_get_size(mm), 869 true); 870 871 num_pages = tee_mm_get_bytes(mm) / SMALL_PAGE_SIZE - 1; 872 fobj = fobj_locked_paged_alloc(num_pages); 873 874 /* Add the area to the pager */ 875 tee_pager_add_core_area(tee_mm_get_smem(mm) + SMALL_PAGE_SIZE, 876 PAGER_AREA_TYPE_LOCK, fobj); 877 fobj_put(fobj); 878 879 /* init effective stack */ 880 sp = tee_mm_get_smem(mm) + tee_mm_get_bytes(mm); 881 asan_tag_access((void *)tee_mm_get_smem(mm), (void *)sp); 882 if (!thread_init_stack(n, sp)) 883 panic("init stack failed"); 884 } 885 } 886 #else 887 static void init_thread_stacks(void) 888 { 889 size_t n; 890 891 /* Assign the thread stacks */ 892 for (n = 0; n < CFG_NUM_THREADS; n++) { 893 if (!thread_init_stack(n, GET_STACK(stack_thread[n]))) 894 panic("thread_init_stack failed"); 895 } 896 } 897 #endif /*CFG_WITH_PAGER*/ 898 899 static void init_user_kcode(void) 900 { 901 #ifdef CFG_CORE_UNMAP_CORE_AT_EL0 902 vaddr_t v = (vaddr_t)thread_excp_vect; 903 vaddr_t ve = (vaddr_t)thread_excp_vect_end; 904 905 thread_user_kcode_va = ROUNDDOWN(v, CORE_MMU_USER_CODE_SIZE); 906 ve = ROUNDUP(ve, CORE_MMU_USER_CODE_SIZE); 907 thread_user_kcode_size = ve - thread_user_kcode_va; 908 909 core_mmu_get_user_va_range(&v, NULL); 910 thread_user_kcode_offset = thread_user_kcode_va - v; 911 912 #if defined(CFG_CORE_WORKAROUND_SPECTRE_BP_SEC) && defined(ARM64) 913 /* 914 * When transitioning to EL0 subtract SP with this much to point to 915 * this special kdata page instead. SP is restored by add this much 916 * while transitioning back to EL1. 917 */ 918 v += thread_user_kcode_size; 919 thread_user_kdata_sp_offset = (vaddr_t)thread_core_local - v; 920 #endif 921 #endif /*CFG_CORE_UNMAP_CORE_AT_EL0*/ 922 } 923 924 void thread_init_threads(void) 925 { 926 size_t n = 0; 927 928 init_thread_stacks(); 929 pgt_init(); 930 931 mutex_lockdep_init(); 932 933 for (n = 0; n < CFG_NUM_THREADS; n++) { 934 TAILQ_INIT(&threads[n].tsd.sess_stack); 935 SLIST_INIT(&threads[n].tsd.pgt_cache); 936 } 937 } 938 939 void thread_init_thread_core_local(void) 940 { 941 size_t n = 0; 942 struct thread_core_local *tcl = thread_core_local; 943 944 for (n = 0; n < CFG_TEE_CORE_NB_CORE; n++) { 945 tcl[n].curr_thread = -1; 946 tcl[n].flags = THREAD_CLF_TMP; 947 } 948 } 949 950 void thread_init_primary(void) 951 { 952 /* Initialize canaries around the stacks */ 953 init_canaries(); 954 955 init_user_kcode(); 956 } 957 958 static void init_sec_mon_stack(size_t pos __maybe_unused) 959 { 960 #if !defined(CFG_WITH_ARM_TRUSTED_FW) 961 /* Initialize secure monitor */ 962 sm_init(GET_STACK(stack_tmp[pos])); 963 #endif 964 } 965 966 static uint32_t __maybe_unused get_midr_implementer(uint32_t midr) 967 { 968 return (midr >> MIDR_IMPLEMENTER_SHIFT) & MIDR_IMPLEMENTER_MASK; 969 } 970 971 static uint32_t __maybe_unused get_midr_primary_part(uint32_t midr) 972 { 973 return (midr >> MIDR_PRIMARY_PART_NUM_SHIFT) & 974 MIDR_PRIMARY_PART_NUM_MASK; 975 } 976 977 #ifdef ARM64 978 static bool probe_workaround_available(void) 979 { 980 int32_t r; 981 982 r = thread_smc(SMCCC_VERSION, 0, 0, 0); 983 if (r < 0) 984 return false; 985 if (r < 0x10001) /* compare with version 1.1 */ 986 return false; 987 988 /* Version >= 1.1, so SMCCC_ARCH_FEATURES is available */ 989 r = thread_smc(SMCCC_ARCH_FEATURES, SMCCC_ARCH_WORKAROUND_1, 0, 0); 990 return r >= 0; 991 } 992 993 static vaddr_t __maybe_unused select_vector(vaddr_t a) 994 { 995 if (probe_workaround_available()) { 996 DMSG("SMCCC_ARCH_WORKAROUND_1 (%#08" PRIx32 ") available", 997 SMCCC_ARCH_WORKAROUND_1); 998 DMSG("SMC Workaround for CVE-2017-5715 used"); 999 return a; 1000 } 1001 1002 DMSG("SMCCC_ARCH_WORKAROUND_1 (%#08" PRIx32 ") unavailable", 1003 SMCCC_ARCH_WORKAROUND_1); 1004 DMSG("SMC Workaround for CVE-2017-5715 not needed (if ARM-TF is up to date)"); 1005 return (vaddr_t)thread_excp_vect; 1006 } 1007 #else 1008 static vaddr_t __maybe_unused select_vector(vaddr_t a) 1009 { 1010 return a; 1011 } 1012 #endif 1013 1014 static vaddr_t get_excp_vect(void) 1015 { 1016 #ifdef CFG_CORE_WORKAROUND_SPECTRE_BP_SEC 1017 uint32_t midr = read_midr(); 1018 1019 if (get_midr_implementer(midr) != MIDR_IMPLEMENTER_ARM) 1020 return (vaddr_t)thread_excp_vect; 1021 1022 switch (get_midr_primary_part(midr)) { 1023 #ifdef ARM32 1024 case CORTEX_A8_PART_NUM: 1025 case CORTEX_A9_PART_NUM: 1026 case CORTEX_A17_PART_NUM: 1027 #endif 1028 case CORTEX_A57_PART_NUM: 1029 case CORTEX_A72_PART_NUM: 1030 case CORTEX_A73_PART_NUM: 1031 case CORTEX_A75_PART_NUM: 1032 return select_vector((vaddr_t)thread_excp_vect_workaround); 1033 #ifdef ARM32 1034 case CORTEX_A15_PART_NUM: 1035 return select_vector((vaddr_t)thread_excp_vect_workaround_a15); 1036 #endif 1037 default: 1038 return (vaddr_t)thread_excp_vect; 1039 } 1040 #endif /*CFG_CORE_WORKAROUND_SPECTRE_BP_SEC*/ 1041 1042 return (vaddr_t)thread_excp_vect; 1043 } 1044 1045 void thread_init_per_cpu(void) 1046 { 1047 size_t pos = get_core_pos(); 1048 struct thread_core_local *l = thread_get_core_local(); 1049 1050 init_sec_mon_stack(pos); 1051 1052 set_tmp_stack(l, GET_STACK(stack_tmp[pos]) - STACK_TMP_OFFS); 1053 set_abt_stack(l, GET_STACK(stack_abt[pos])); 1054 1055 thread_init_vbar(get_excp_vect()); 1056 1057 #ifdef CFG_FTRACE_SUPPORT 1058 /* 1059 * Enable accesses to frequency register and physical counter 1060 * register in EL0/PL0 required for timestamping during 1061 * function tracing. 1062 */ 1063 write_cntkctl(read_cntkctl() | CNTKCTL_PL0PCTEN); 1064 #endif 1065 } 1066 1067 struct thread_specific_data *thread_get_tsd(void) 1068 { 1069 return &threads[thread_get_id()].tsd; 1070 } 1071 1072 struct thread_ctx_regs *thread_get_ctx_regs(void) 1073 { 1074 struct thread_core_local *l = thread_get_core_local(); 1075 1076 assert(l->curr_thread != -1); 1077 return &threads[l->curr_thread].regs; 1078 } 1079 1080 void thread_set_foreign_intr(bool enable) 1081 { 1082 /* thread_get_core_local() requires foreign interrupts to be disabled */ 1083 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR); 1084 struct thread_core_local *l; 1085 1086 l = thread_get_core_local(); 1087 1088 assert(l->curr_thread != -1); 1089 1090 if (enable) { 1091 threads[l->curr_thread].flags |= 1092 THREAD_FLAGS_FOREIGN_INTR_ENABLE; 1093 thread_set_exceptions(exceptions & ~THREAD_EXCP_FOREIGN_INTR); 1094 } else { 1095 /* 1096 * No need to disable foreign interrupts here since they're 1097 * already disabled above. 1098 */ 1099 threads[l->curr_thread].flags &= 1100 ~THREAD_FLAGS_FOREIGN_INTR_ENABLE; 1101 } 1102 } 1103 1104 void thread_restore_foreign_intr(void) 1105 { 1106 /* thread_get_core_local() requires foreign interrupts to be disabled */ 1107 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR); 1108 struct thread_core_local *l; 1109 1110 l = thread_get_core_local(); 1111 1112 assert(l->curr_thread != -1); 1113 1114 if (threads[l->curr_thread].flags & THREAD_FLAGS_FOREIGN_INTR_ENABLE) 1115 thread_set_exceptions(exceptions & ~THREAD_EXCP_FOREIGN_INTR); 1116 } 1117 1118 #ifdef CFG_WITH_VFP 1119 uint32_t thread_kernel_enable_vfp(void) 1120 { 1121 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR); 1122 struct thread_ctx *thr = threads + thread_get_id(); 1123 struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp; 1124 1125 assert(!vfp_is_enabled()); 1126 1127 if (!thr->vfp_state.ns_saved) { 1128 vfp_lazy_save_state_final(&thr->vfp_state.ns, 1129 true /*force_save*/); 1130 thr->vfp_state.ns_saved = true; 1131 } else if (thr->vfp_state.sec_lazy_saved && 1132 !thr->vfp_state.sec_saved) { 1133 /* 1134 * This happens when we're handling an abort while the 1135 * thread was using the VFP state. 1136 */ 1137 vfp_lazy_save_state_final(&thr->vfp_state.sec, 1138 false /*!force_save*/); 1139 thr->vfp_state.sec_saved = true; 1140 } else if (tuv && tuv->lazy_saved && !tuv->saved) { 1141 /* 1142 * This can happen either during syscall or abort 1143 * processing (while processing a syscall). 1144 */ 1145 vfp_lazy_save_state_final(&tuv->vfp, false /*!force_save*/); 1146 tuv->saved = true; 1147 } 1148 1149 vfp_enable(); 1150 return exceptions; 1151 } 1152 1153 void thread_kernel_disable_vfp(uint32_t state) 1154 { 1155 uint32_t exceptions; 1156 1157 assert(vfp_is_enabled()); 1158 1159 vfp_disable(); 1160 exceptions = thread_get_exceptions(); 1161 assert(exceptions & THREAD_EXCP_FOREIGN_INTR); 1162 exceptions &= ~THREAD_EXCP_FOREIGN_INTR; 1163 exceptions |= state & THREAD_EXCP_FOREIGN_INTR; 1164 thread_set_exceptions(exceptions); 1165 } 1166 1167 void thread_kernel_save_vfp(void) 1168 { 1169 struct thread_ctx *thr = threads + thread_get_id(); 1170 1171 assert(thread_get_exceptions() & THREAD_EXCP_FOREIGN_INTR); 1172 if (vfp_is_enabled()) { 1173 vfp_lazy_save_state_init(&thr->vfp_state.sec); 1174 thr->vfp_state.sec_lazy_saved = true; 1175 } 1176 } 1177 1178 void thread_kernel_restore_vfp(void) 1179 { 1180 struct thread_ctx *thr = threads + thread_get_id(); 1181 1182 assert(thread_get_exceptions() & THREAD_EXCP_FOREIGN_INTR); 1183 assert(!vfp_is_enabled()); 1184 if (thr->vfp_state.sec_lazy_saved) { 1185 vfp_lazy_restore_state(&thr->vfp_state.sec, 1186 thr->vfp_state.sec_saved); 1187 thr->vfp_state.sec_saved = false; 1188 thr->vfp_state.sec_lazy_saved = false; 1189 } 1190 } 1191 1192 void thread_user_enable_vfp(struct thread_user_vfp_state *uvfp) 1193 { 1194 struct thread_ctx *thr = threads + thread_get_id(); 1195 struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp; 1196 1197 assert(thread_get_exceptions() & THREAD_EXCP_FOREIGN_INTR); 1198 assert(!vfp_is_enabled()); 1199 1200 if (!thr->vfp_state.ns_saved) { 1201 vfp_lazy_save_state_final(&thr->vfp_state.ns, 1202 true /*force_save*/); 1203 thr->vfp_state.ns_saved = true; 1204 } else if (tuv && uvfp != tuv) { 1205 if (tuv->lazy_saved && !tuv->saved) { 1206 vfp_lazy_save_state_final(&tuv->vfp, 1207 false /*!force_save*/); 1208 tuv->saved = true; 1209 } 1210 } 1211 1212 if (uvfp->lazy_saved) 1213 vfp_lazy_restore_state(&uvfp->vfp, uvfp->saved); 1214 uvfp->lazy_saved = false; 1215 uvfp->saved = false; 1216 1217 thr->vfp_state.uvfp = uvfp; 1218 vfp_enable(); 1219 } 1220 1221 void thread_user_save_vfp(void) 1222 { 1223 struct thread_ctx *thr = threads + thread_get_id(); 1224 struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp; 1225 1226 assert(thread_get_exceptions() & THREAD_EXCP_FOREIGN_INTR); 1227 if (!vfp_is_enabled()) 1228 return; 1229 1230 assert(tuv && !tuv->lazy_saved && !tuv->saved); 1231 vfp_lazy_save_state_init(&tuv->vfp); 1232 tuv->lazy_saved = true; 1233 } 1234 1235 void thread_user_clear_vfp(struct thread_user_vfp_state *uvfp) 1236 { 1237 struct thread_ctx *thr = threads + thread_get_id(); 1238 1239 if (uvfp == thr->vfp_state.uvfp) 1240 thr->vfp_state.uvfp = NULL; 1241 uvfp->lazy_saved = false; 1242 uvfp->saved = false; 1243 } 1244 #endif /*CFG_WITH_VFP*/ 1245 1246 #ifdef ARM32 1247 static bool get_spsr(bool is_32bit, unsigned long entry_func, uint32_t *spsr) 1248 { 1249 uint32_t s; 1250 1251 if (!is_32bit) 1252 return false; 1253 1254 s = read_cpsr(); 1255 s &= ~(CPSR_MODE_MASK | CPSR_T | CPSR_IT_MASK1 | CPSR_IT_MASK2); 1256 s |= CPSR_MODE_USR; 1257 if (entry_func & 1) 1258 s |= CPSR_T; 1259 *spsr = s; 1260 return true; 1261 } 1262 #endif 1263 1264 #ifdef ARM64 1265 static bool get_spsr(bool is_32bit, unsigned long entry_func, uint32_t *spsr) 1266 { 1267 uint32_t s; 1268 1269 if (is_32bit) { 1270 s = read_daif() & (SPSR_32_AIF_MASK << SPSR_32_AIF_SHIFT); 1271 s |= SPSR_MODE_RW_32 << SPSR_MODE_RW_SHIFT; 1272 s |= (entry_func & SPSR_32_T_MASK) << SPSR_32_T_SHIFT; 1273 } else { 1274 s = read_daif() & (SPSR_64_DAIF_MASK << SPSR_64_DAIF_SHIFT); 1275 } 1276 1277 *spsr = s; 1278 return true; 1279 } 1280 #endif 1281 1282 static void set_ctx_regs(struct thread_ctx_regs *regs, unsigned long a0, 1283 unsigned long a1, unsigned long a2, unsigned long a3, 1284 unsigned long user_sp, unsigned long entry_func, 1285 uint32_t spsr) 1286 { 1287 /* 1288 * First clear all registers to avoid leaking information from 1289 * other TAs or even the Core itself. 1290 */ 1291 *regs = (struct thread_ctx_regs){ }; 1292 #ifdef ARM32 1293 regs->r0 = a0; 1294 regs->r1 = a1; 1295 regs->r2 = a2; 1296 regs->r3 = a3; 1297 regs->usr_sp = user_sp; 1298 regs->pc = entry_func; 1299 regs->cpsr = spsr; 1300 #endif 1301 #ifdef ARM64 1302 regs->x[0] = a0; 1303 regs->x[1] = a1; 1304 regs->x[2] = a2; 1305 regs->x[3] = a3; 1306 regs->sp = user_sp; 1307 regs->pc = entry_func; 1308 regs->cpsr = spsr; 1309 regs->x[13] = user_sp; /* Used when running TA in Aarch32 */ 1310 regs->sp = user_sp; /* Used when running TA in Aarch64 */ 1311 /* Set frame pointer (user stack can't be unwound past this point) */ 1312 regs->x[29] = 0; 1313 #endif 1314 } 1315 1316 uint32_t thread_enter_user_mode(unsigned long a0, unsigned long a1, 1317 unsigned long a2, unsigned long a3, unsigned long user_sp, 1318 unsigned long entry_func, bool is_32bit, 1319 uint32_t *exit_status0, uint32_t *exit_status1) 1320 { 1321 uint32_t spsr = 0; 1322 uint32_t exceptions = 0; 1323 uint32_t rc = 0; 1324 struct thread_ctx_regs *regs = NULL; 1325 1326 tee_ta_update_session_utime_resume(); 1327 1328 /* Derive SPSR from current CPSR/PSTATE readout. */ 1329 if (!get_spsr(is_32bit, entry_func, &spsr)) { 1330 *exit_status0 = 1; /* panic */ 1331 *exit_status1 = 0xbadbadba; 1332 return 0; 1333 } 1334 1335 exceptions = thread_mask_exceptions(THREAD_EXCP_ALL); 1336 /* 1337 * We're using the per thread location of saved context registers 1338 * for temporary storage. Now that exceptions are masked they will 1339 * not be used for any thing else until they are eventually 1340 * unmasked when user mode has been entered. 1341 */ 1342 regs = thread_get_ctx_regs(); 1343 set_ctx_regs(regs, a0, a1, a2, a3, user_sp, entry_func, spsr); 1344 rc = __thread_enter_user_mode(regs, exit_status0, exit_status1); 1345 thread_unmask_exceptions(exceptions); 1346 return rc; 1347 } 1348 1349 #ifdef CFG_CORE_UNMAP_CORE_AT_EL0 1350 void thread_get_user_kcode(struct mobj **mobj, size_t *offset, 1351 vaddr_t *va, size_t *sz) 1352 { 1353 core_mmu_get_user_va_range(va, NULL); 1354 *mobj = mobj_tee_ram; 1355 *offset = thread_user_kcode_va - VCORE_START_VA; 1356 *sz = thread_user_kcode_size; 1357 } 1358 #endif 1359 1360 #if defined(CFG_CORE_UNMAP_CORE_AT_EL0) && \ 1361 defined(CFG_CORE_WORKAROUND_SPECTRE_BP_SEC) && defined(ARM64) 1362 void thread_get_user_kdata(struct mobj **mobj, size_t *offset, 1363 vaddr_t *va, size_t *sz) 1364 { 1365 vaddr_t v; 1366 1367 core_mmu_get_user_va_range(&v, NULL); 1368 *va = v + thread_user_kcode_size; 1369 *mobj = mobj_tee_ram; 1370 *offset = (vaddr_t)thread_user_kdata_page - VCORE_START_VA; 1371 *sz = sizeof(thread_user_kdata_page); 1372 } 1373 #endif 1374 1375 static void setup_unwind_user_mode(struct thread_svc_regs *regs) 1376 { 1377 #ifdef ARM32 1378 regs->lr = (uintptr_t)thread_unwind_user_mode; 1379 regs->spsr = read_cpsr(); 1380 #endif 1381 #ifdef ARM64 1382 regs->elr = (uintptr_t)thread_unwind_user_mode; 1383 regs->spsr = SPSR_64(SPSR_64_MODE_EL1, SPSR_64_MODE_SP_EL0, 0); 1384 regs->spsr |= read_daif(); 1385 /* 1386 * Regs is the value of stack pointer before calling the SVC 1387 * handler. By the addition matches for the reserved space at the 1388 * beginning of el0_sync_svc(). This prepares the stack when 1389 * returning to thread_unwind_user_mode instead of a normal 1390 * exception return. 1391 */ 1392 regs->sp_el0 = (uint64_t)(regs + 1); 1393 #endif 1394 } 1395 1396 /* 1397 * Note: this function is weak just to make it possible to exclude it from 1398 * the unpaged area. 1399 */ 1400 void __weak thread_svc_handler(struct thread_svc_regs *regs) 1401 { 1402 struct tee_ta_session *sess = NULL; 1403 uint32_t state = 0; 1404 1405 /* Enable native interrupts */ 1406 state = thread_get_exceptions(); 1407 thread_unmask_exceptions(state & ~THREAD_EXCP_NATIVE_INTR); 1408 1409 thread_user_save_vfp(); 1410 1411 /* TA has just entered kernel mode */ 1412 tee_ta_update_session_utime_suspend(); 1413 1414 /* Restore foreign interrupts which are disabled on exception entry */ 1415 thread_restore_foreign_intr(); 1416 1417 tee_ta_get_current_session(&sess); 1418 assert(sess && sess->ctx->ops && sess->ctx->ops->handle_svc); 1419 if (sess->ctx->ops->handle_svc(regs)) { 1420 /* We're about to switch back to user mode */ 1421 tee_ta_update_session_utime_resume(); 1422 } else { 1423 /* We're returning from __thread_enter_user_mode() */ 1424 setup_unwind_user_mode(regs); 1425 } 1426 } 1427 1428 static struct mobj *alloc_shm(enum thread_shm_type shm_type, size_t size) 1429 { 1430 switch (shm_type) { 1431 case THREAD_SHM_TYPE_APPLICATION: 1432 return thread_rpc_alloc_payload(size); 1433 case THREAD_SHM_TYPE_KERNEL_PRIVATE: 1434 return thread_rpc_alloc_kernel_payload(size); 1435 case THREAD_SHM_TYPE_GLOBAL: 1436 return thread_rpc_alloc_global_payload(size); 1437 default: 1438 return NULL; 1439 } 1440 } 1441 1442 void *thread_rpc_shm_cache_alloc(enum thread_shm_type shm_type, size_t size, 1443 struct mobj **mobj) 1444 { 1445 struct thread_shm_cache *cache = &threads[thread_get_id()].shm_cache; 1446 size_t sz = size; 1447 paddr_t p = 0; 1448 void *va = NULL; 1449 1450 if (!size) 1451 return NULL; 1452 1453 /* 1454 * Always allocate in page chunks as normal world allocates payload 1455 * memory as complete pages. 1456 */ 1457 sz = ROUNDUP(size, SMALL_PAGE_SIZE); 1458 1459 if (cache->type != shm_type || sz > cache->size) { 1460 thread_rpc_shm_cache_clear(cache); 1461 1462 cache->mobj = alloc_shm(shm_type, sz); 1463 if (!cache->mobj) 1464 return NULL; 1465 1466 if (mobj_get_pa(cache->mobj, 0, 0, &p)) 1467 goto err; 1468 1469 if (!ALIGNMENT_IS_OK(p, uint64_t)) 1470 goto err; 1471 1472 va = mobj_get_va(cache->mobj, 0); 1473 if (!va) 1474 goto err; 1475 1476 cache->size = sz; 1477 cache->type = shm_type; 1478 } else { 1479 va = mobj_get_va(cache->mobj, 0); 1480 if (!va) 1481 goto err; 1482 } 1483 *mobj = cache->mobj; 1484 1485 return va; 1486 err: 1487 thread_rpc_shm_cache_clear(cache); 1488 return NULL; 1489 } 1490 1491 void thread_rpc_shm_cache_clear(struct thread_shm_cache *cache) 1492 { 1493 if (cache->mobj) { 1494 switch (cache->type) { 1495 case THREAD_SHM_TYPE_APPLICATION: 1496 thread_rpc_free_payload(cache->mobj); 1497 break; 1498 case THREAD_SHM_TYPE_KERNEL_PRIVATE: 1499 thread_rpc_free_kernel_payload(cache->mobj); 1500 break; 1501 case THREAD_SHM_TYPE_GLOBAL: 1502 thread_rpc_free_global_payload(cache->mobj); 1503 break; 1504 default: 1505 assert(0); /* "can't happen" */ 1506 break; 1507 } 1508 cache->mobj = NULL; 1509 cache->size = 0; 1510 } 1511 } 1512 1513 #ifdef CFG_WITH_ARM_TRUSTED_FW 1514 /* 1515 * These five functions are __weak to allow platforms to override them if 1516 * needed. 1517 */ 1518 unsigned long __weak thread_cpu_off_handler(unsigned long a0 __unused, 1519 unsigned long a1 __unused) 1520 { 1521 return 0; 1522 } 1523 DECLARE_KEEP_PAGER(thread_cpu_off_handler); 1524 1525 unsigned long __weak thread_cpu_suspend_handler(unsigned long a0 __unused, 1526 unsigned long a1 __unused) 1527 { 1528 return 0; 1529 } 1530 DECLARE_KEEP_PAGER(thread_cpu_suspend_handler); 1531 1532 unsigned long __weak thread_cpu_resume_handler(unsigned long a0 __unused, 1533 unsigned long a1 __unused) 1534 { 1535 return 0; 1536 } 1537 DECLARE_KEEP_PAGER(thread_cpu_resume_handler); 1538 1539 unsigned long __weak thread_system_off_handler(unsigned long a0 __unused, 1540 unsigned long a1 __unused) 1541 { 1542 return 0; 1543 } 1544 DECLARE_KEEP_PAGER(thread_system_off_handler); 1545 1546 unsigned long __weak thread_system_reset_handler(unsigned long a0 __unused, 1547 unsigned long a1 __unused) 1548 { 1549 return 0; 1550 } 1551 DECLARE_KEEP_PAGER(thread_system_reset_handler); 1552 #endif /*CFG_WITH_ARM_TRUSTED_FW*/ 1553