1/* 2 * Copyright (c) 2014, STMicroelectronics International N.V. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, 9 * this list of conditions and the following disclaimer. 10 * 11 * 2. Redistributions in binary form must reproduce the above copyright notice, 12 * this list of conditions and the following disclaimer in the documentation 13 * and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28#include <asm.S> 29#include <arm.h> 30#include <arm32_macros.S> 31#include <kernel/unwind.h> 32#include <platform_config.h> 33 34/* Let platforms override this if needed */ 35.weak get_core_pos_mpidr 36 37/* size_t get_core_pos(void); */ 38FUNC get_core_pos , : 39UNWIND( .fnstart) 40 read_mpidr r0 41 b get_core_pos_mpidr 42UNWIND( .fnend) 43END_FUNC get_core_pos 44 45/* size_t get_core_pos_mpidr(uint32_t mpidr); */ 46FUNC get_core_pos_mpidr , : 47UNWIND( .fnstart) 48 /* Calculate CorePos = (ClusterId * (cores/cluster)) + CoreId */ 49 and r1, r0, #MPIDR_CPU_MASK 50 and r0, r0, #MPIDR_CLUSTER_MASK 51 add r0, r1, r0, LSR #(MPIDR_CLUSTER_SHIFT - CFG_CORE_CLUSTER_SHIFT) 52 bx lr 53UNWIND( .fnend) 54END_FUNC get_core_pos_mpidr 55 56/* 57 * uint32_t temp_set_mode(int cpu_mode) 58 * returns cpsr to be set 59 */ 60LOCAL_FUNC temp_set_mode , : 61UNWIND( .fnstart) 62 mov r1, r0 63 cmp r1, #CPSR_MODE_USR /* update mode: usr -> sys */ 64 moveq r1, #CPSR_MODE_SYS 65 cpsid aif /* disable interrupts */ 66 mrs r0, cpsr /* get cpsr with disabled its*/ 67 bic r0, #CPSR_MODE_MASK /* clear mode */ 68 orr r0, r1 /* set expected mode */ 69 bx lr 70UNWIND( .fnend) 71END_FUNC temp_set_mode 72 73/* uint32_t read_mode_sp(int cpu_mode) */ 74FUNC read_mode_sp , : 75UNWIND( .fnstart) 76 push {r4, lr} 77UNWIND( .save {r4, lr}) 78 mrs r4, cpsr /* save cpsr */ 79 bl temp_set_mode 80 msr cpsr, r0 /* set the new mode */ 81 mov r0, sp /* get the function result */ 82 msr cpsr, r4 /* back to the old mode */ 83 pop {r4, pc} 84UNWIND( .fnend) 85END_FUNC read_mode_sp 86 87/* uint32_t read_mode_lr(int cpu_mode) */ 88FUNC read_mode_lr , : 89UNWIND( .fnstart) 90 push {r4, lr} 91UNWIND( .save {r4, lr}) 92 mrs r4, cpsr /* save cpsr */ 93 bl temp_set_mode 94 msr cpsr, r0 /* set the new mode */ 95 mov r0, lr /* get the function result */ 96 msr cpsr, r4 /* back to the old mode */ 97 pop {r4, pc} 98UNWIND( .fnend) 99END_FUNC read_mode_lr 100