xref: /optee_os/core/arch/arm/kernel/link_dummy.ld (revision 1bb929836182ecb96d2d9d268daa807c67596396)
1/* SPDX-License-Identifier: BSD-2-Clause */
2/*
3 * Copyright (c) 2017, Linaro Limited
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright notice,
10 * this list of conditions and the following disclaimer.
11 *
12 * 2. Redistributions in binary form must reproduce the above copyright notice,
13 * this list of conditions and the following disclaimer in the documentation
14 * and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
20 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 * POSSIBILITY OF SUCH DAMAGE.
27 */
28
29SECTIONS
30{
31	/*
32	 * This seems to make the ARMv7 linker happy with regards to glue_7
33	 * sections etc.
34	 */
35	..dummy : { }
36}
37
38__asan_map_end = .;
39__asan_map_start = .;
40__asan_map_size = .;
41__asan_shadow_end = .;
42__asan_shadow_start = .;
43__asan_shadow_size = .;
44__bss_end = .;
45__bss_start = .;
46__ctor_end = .;
47__ctor_list = .;
48__data_end = .;
49__end = .;
50__end_phys_mem_map_section = .;
51__end_phys_nsec_ddr_section = .;
52__end_phys_sdp_mem_section = .;
53__exidx_end = .;
54__exidx_start = .;
55__extab_end = .;
56__extab_start = .;
57__heap1_end = .;
58__heap1_start = .;
59__heap2_end = .;
60__heap2_start = .;
61__initcall_end = .;
62__initcall_start = .;
63__init_end = .;
64__init_size = .;
65__init_start = .;
66__nozi_end = .;
67__nozi_stack_end = .;
68__nozi_stack_start = .;
69__nozi_start = .;
70__pageable_end = .;
71__pageable_part_end = .;
72__pageable_part_start = .;
73__pageable_start = .;
74__rodata_dtdrv_end = .;
75__rodata_dtdrv_start = .;
76__rodata_early_ta_start = .;
77__rodata_early_ta_end = .;
78__rodata_end = .;
79__rodata_start = .;
80__start_phys_nsec_ddr_section = .;
81__text_init_start = .;
82__text_start = .;
83__tmp_hashes_end = .;
84__tmp_hashes_size = .;
85__tmp_hashes_start = .;
86__vcore_init_ro_size = .;
87__vcore_init_ro_start = .;
88__vcore_init_rx_size = .;
89__vcore_init_rx_start = .;
90__vcore_unpg_ro_size = .;
91__vcore_unpg_ro_start = .;
92__vcore_unpg_rw_size = .;
93__vcore_unpg_rw_start = .;
94__vcore_unpg_rx_size = .;
95__vcore_unpg_rx_start = .;
96PROVIDE(core_v_str = 0);
97PROVIDE(tee_entry_std = 0);
98PROVIDE(tee_svc_handler = 0);
99PROVIDE(init_teecore = 0);
100