1/* SPDX-License-Identifier: (BSD-2-Clause AND MIT) */ 2/* 3 * Copyright (c) 2014, Linaro Limited 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright notice, 10 * this list of conditions and the following disclaimer. 11 * 12 * 2. Redistributions in binary form must reproduce the above copyright notice, 13 * this list of conditions and the following disclaimer in the documentation 14 * and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 20 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29/* 30 * Copyright (c) 2008-2010 Travis Geiselbrecht 31 * 32 * Permission is hereby granted, free of charge, to any person obtaining 33 * a copy of this software and associated documentation files 34 * (the "Software"), to deal in the Software without restriction, 35 * including without limitation the rights to use, copy, modify, merge, 36 * publish, distribute, sublicense, and/or sell copies of the Software, 37 * and to permit persons to whom the Software is furnished to do so, 38 * subject to the following conditions: 39 * 40 * The above copyright notice and this permission notice shall be 41 * included in all copies or substantial portions of the Software. 42 * 43 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 44 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 45 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 46 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY 47 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 48 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 49 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 50 */ 51 52#include <platform_config.h> 53 54#ifndef SMALL_PAGE_SIZE 55#define SMALL_PAGE_SIZE 4096 56#endif 57#ifndef ROUNDUP 58#define ROUNDUP(x, y) ((((x) + (y) - 1) / (y)) * (y)) 59#define ROUNDDOWN(x, y) (((x) / (y)) * (y)) 60#endif 61 62/* 63 * TEE_RAM_VA_START: The start virtual address of the TEE RAM 64 * TEE_TEXT_VA_START: The start virtual address of the OP-TEE text 65 */ 66#define TEE_RAM_VA_START CFG_TEE_RAM_START 67#define TEE_TEXT_VA_START (TEE_RAM_VA_START + \ 68 (CFG_TEE_LOAD_ADDR - CFG_TEE_RAM_START)) 69 70OUTPUT_FORMAT(CFG_KERN_LINKER_FORMAT) 71OUTPUT_ARCH(CFG_KERN_LINKER_ARCH) 72 73ENTRY(_start) 74SECTIONS 75{ 76 . = TEE_TEXT_VA_START; 77#ifdef ARM32 78 ASSERT(!(TEE_TEXT_VA_START & 31), "text start should align to 32bytes") 79#endif 80#ifdef ARM64 81 ASSERT(!(TEE_TEXT_VA_START & 127), "text start should align to 128bytes") 82#endif 83 __text_start = .; 84 85 /* 86 * Memory between TEE_TEXT_VA_START and page aligned rounded down 87 * value will be mapped with unpaged "text" section attributes: 88 * likely to be read-only/executable. 89 */ 90 __flatmap_unpg_rx_start = ROUNDDOWN(__text_start, SMALL_PAGE_SIZE); 91 92 .text : { 93 KEEP(*(.text._start)) 94 KEEP(*(.text.init .text.plat_cpu_reset_early \ 95 .text.reset .text.reset_primary .text.unhandled_cpu \ 96 .text.__assert_flat_mapped_range)) 97 98 . = ALIGN(8); 99 __initcall_start = .; 100 KEEP(*(.initcall1)) 101 KEEP(*(.initcall2)) 102 KEEP(*(.initcall3)) 103 KEEP(*(.initcall4)) 104 __initcall_end = .; 105 106#ifdef CFG_WITH_PAGER 107 *(.text) 108/* Include list of sections needed for paging */ 109#include <text_unpaged.ld.S> 110#else 111 *(.text .text.*) 112#endif 113 *(.sram.text.glue_7* .gnu.linkonce.t.*) 114 . = ALIGN(8); 115 } 116 __text_end = .; 117 118#ifdef CFG_CORE_RODATA_NOEXEC 119 . = ALIGN(SMALL_PAGE_SIZE); 120#endif 121 __flatmap_unpg_rx_size = . - __flatmap_unpg_rx_start; 122 __flatmap_unpg_ro_start = .; 123 124 .rodata : ALIGN(8) { 125 __rodata_start = .; 126 *(.gnu.linkonce.r.*) 127#ifdef CFG_WITH_PAGER 128 *(.rodata .rodata.__unpaged) 129#include <rodata_unpaged.ld.S> 130#else 131#ifdef CFG_DT 132 __rodata_dtdrv_start = .; 133 KEEP(*(.rodata.dtdrv)) 134 __rodata_dtdrv_end = .; 135#endif 136#ifdef CFG_EARLY_TA 137 . = ALIGN(8); 138 __rodata_early_ta_start = .; 139 KEEP(*(.rodata.early_ta)) 140 __rodata_early_ta_end = .; 141#endif 142 143 *(.rodata .rodata.*) 144 145 /* 146 * 8 to avoid unwanted padding between __start_ta_head_section 147 * and the first structure in ta_head_section, in 64-bit 148 * builds 149 */ 150 . = ALIGN(8); 151 __start_ta_head_section = . ; 152 KEEP(*(ta_head_section)) 153 __stop_ta_head_section = . ; 154 . = ALIGN(8); 155 __start_phys_mem_map_section = . ; 156 KEEP(*(phys_mem_map_section)) 157 __end_phys_mem_map_section = . ; 158 . = ALIGN(8); 159 __start_phys_sdp_mem_section = . ; 160 KEEP(*(phys_sdp_mem_section)) 161 __end_phys_sdp_mem_section = . ; 162 . = ALIGN(8); 163 __start_phys_nsec_ddr_section = . ; 164 KEEP(*(phys_nsec_ddr_section)) 165 __end_phys_nsec_ddr_section = . ; 166 . = ALIGN(8); 167 __start_phys_ddr_overall_section = . ; 168 KEEP(*(phys_ddr_overall_section)) 169 __end_phys_ddr_overall_section = . ; 170#endif 171 . = ALIGN(8); 172 __rodata_end = .; 173 } 174 175 .interp : { *(.interp) } 176 .hash : { *(.hash) } 177 .dynsym : { *(.dynsym) } 178 .dynstr : { *(.dynstr) } 179 .rel.text : { *(.rel.text) *(.rel.gnu.linkonce.t*) } 180 .rela.text : { *(.rela.text) *(.rela.gnu.linkonce.t*) } 181 .rel.data : { *(.rel.data) *(.rel.gnu.linkonce.d*) } 182 .rela.data : { *(.rela.data) *(.rela.gnu.linkonce.d*) } 183 .rel.rodata : { *(.rel.rodata) *(.rel.gnu.linkonce.r*) } 184 .rela.rodata : { *(.rela.rodata) *(.rela.gnu.linkonce.r*) } 185 .rel.got : { *(.rel.got) } 186 .rela.got : { *(.rela.got) } 187 .rel.ctors : { *(.rel.ctors) } 188 .rela.ctors : { *(.rela.ctors) } 189 .rel.dtors : { *(.rel.dtors) } 190 .rela.dtors : { *(.rela.dtors) } 191 .rel.init : { *(.rel.init) } 192 .rela.init : { *(.rela.init) } 193 .rel.fini : { *(.rel.fini) } 194 .rela.fini : { *(.rela.fini) } 195 .rel.bss : { *(.rel.bss) } 196 .rela.bss : { *(.rela.bss) } 197 .rel.plt : { *(.rel.plt) } 198 .rela.plt : { *(.rela.plt) } 199 .init : { *(.init) } =0x9090 200 .plt : { *(.plt) } 201 202 /* .ARM.exidx is sorted, so has to go in its own output section. */ 203 .ARM.exidx : { 204 __exidx_start = .; 205 *(.ARM.exidx* .gnu.linkonce.armexidx.*) 206 __exidx_end = .; 207 } 208 209 .ARM.extab : { 210 __extab_start = .; 211 *(.ARM.extab*) 212 __extab_end = .; 213 } 214 215 /* Start page aligned read-write memory */ 216#ifdef CFG_CORE_RWDATA_NOEXEC 217 . = ALIGN(SMALL_PAGE_SIZE); 218#endif 219 __flatmap_unpg_ro_size = . - __flatmap_unpg_ro_start; 220 __flatmap_unpg_rw_start = .; 221 222 .data : ALIGN(8) { 223 /* writable data */ 224 __data_start_rom = .; 225 /* in one segment binaries, the rom data address is on top 226 of the ram data address */ 227 __data_start = .; 228 *(.data .data.* .gnu.linkonce.d.*) 229 . = ALIGN(8); 230 } 231 232 .ctors : ALIGN(8) { 233 __ctor_list = .; 234 KEEP(*(.ctors .ctors.* .init_array .init_array.*)) 235 __ctor_end = .; 236 } 237 .dtors : ALIGN(8) { 238 __dtor_list = .; 239 KEEP(*(.dtors .dtors.* .fini_array .fini_array.*)) 240 __dtor_end = .; 241 } 242 .got : { *(.got.plt) *(.got) } 243 .dynamic : { *(.dynamic) } 244 245 /* unintialized data */ 246 .bss : { 247 __data_end = .; 248 __bss_start = .; 249 *(.bss .bss.*) 250 *(.gnu.linkonce.b.*) 251 *(COMMON) 252 . = ALIGN(8); 253 __bss_end = .; 254 } 255 256 .heap1 (NOLOAD) : { 257 /* 258 * We're keeping track of the padding added before the 259 * .nozi section so we can do something useful with 260 * this otherwise wasted memory. 261 */ 262 __heap1_start = .; 263#ifndef CFG_WITH_PAGER 264 . += CFG_CORE_HEAP_SIZE; 265#endif 266 . = ALIGN(16 * 1024); 267 __heap1_end = .; 268 } 269 270 /* 271 * Uninitialized data that shouldn't be zero initialized at 272 * runtime. 273 * 274 * L1 mmu table requires 16 KiB alignment 275 */ 276 .nozi (NOLOAD) : { 277 __nozi_start = .; 278 ASSERT(!(__nozi_start & (16 * 1024 - 1)), "align nozi to 16kB"); 279 280 KEEP(*(.nozi .nozi.*)) 281 . = ALIGN(16); 282 __nozi_end = .; 283 __nozi_stack_start = .; 284 KEEP(*(.nozi_stack)) 285 . = ALIGN(8); 286 __nozi_stack_end = .; 287 } 288 289#ifdef CFG_WITH_PAGER 290 .heap2 (NOLOAD) : { 291 __heap2_start = .; 292 /* 293 * Reserve additional memory for heap, the total should be 294 * at least CFG_CORE_HEAP_SIZE, but count what has already 295 * been reserved in .heap1 296 */ 297 . += CFG_CORE_HEAP_SIZE - (__heap1_end - __heap1_start); 298 . = ALIGN(SMALL_PAGE_SIZE); 299 __heap2_end = .; 300 } 301 302 /* Start page aligned read-only memory */ 303 __flatmap_unpg_rw_size = . - __flatmap_unpg_rw_start; 304 305 __init_start = .; 306 __flatmap_init_rx_start = .; 307 308 ASSERT(!(__flatmap_init_rx_start & (SMALL_PAGE_SIZE - 1)), 309 "read-write memory is not paged aligned") 310 311 .text_init : { 312/* 313 * Include list of sections needed for boot initialization, this list 314 * overlaps with unpaged.ld.S but since unpaged.ld.S is first all those 315 * sections will go into the unpaged area. 316 */ 317#include <text_init.ld.S> 318 KEEP(*(.text.startup.*)); 319 /* Make sure constructor functions are available during init */ 320 KEEP(*(.text._GLOBAL__sub_*)); 321 . = ALIGN(8); 322 } 323 324#ifdef CFG_CORE_RODATA_NOEXEC 325 . = ALIGN(SMALL_PAGE_SIZE); 326#endif 327 __flatmap_init_rx_size = . - __flatmap_init_rx_start; 328 __flatmap_init_ro_start = .; 329 330 .rodata_init : { 331#include <rodata_init.ld.S> 332 . = ALIGN(8); 333 __start_phys_mem_map_section = . ; 334 KEEP(*(phys_mem_map_section)) 335 __end_phys_mem_map_section = . ; 336 . = ALIGN(8); 337 __start_phys_sdp_mem_section = . ; 338 KEEP(*(phys_sdp_mem_section)) 339 __end_phys_sdp_mem_section = . ; 340 . = ALIGN(8); 341 __start_phys_nsec_ddr_section = . ; 342 KEEP(*(phys_nsec_ddr_section)) 343 __end_phys_nsec_ddr_section = . ; 344 . = ALIGN(8); 345 __start_phys_ddr_overall_section = . ; 346 KEEP(*(phys_ddr_overall_section)) 347 __end_phys_ddr_overall_section = . ; 348 . = ALIGN(8); 349 __rodata_init_end = .; 350 } 351 __rodata_init_end = .; 352 353 __init_end = ROUNDUP(__rodata_init_end, SMALL_PAGE_SIZE); 354 __init_size = __init_end - __init_start; 355 356 /* vcore flat map stops here. No need to page align, rodata follows. */ 357 __flatmap_init_ro_size = __init_end - __flatmap_init_ro_start; 358 359 .rodata_pageable : ALIGN(8) { 360#ifdef CFG_DT 361 __rodata_dtdrv_start = .; 362 KEEP(*(.rodata.dtdrv)) 363 __rodata_dtdrv_end = .; 364#endif 365#ifdef CFG_EARLY_TA 366 . = ALIGN(8); 367 __rodata_early_ta_start = .; 368 KEEP(*(.rodata.early_ta)) 369 __rodata_early_ta_end = .; 370#endif 371 *(.rodata*) 372 /* 373 * 8 to avoid unwanted padding between __start_ta_head_section 374 * and the first structure in ta_head_section, in 64-bit 375 * builds 376 */ 377 . = ALIGN(8); 378 __start_ta_head_section = . ; 379 KEEP(*(ta_head_section)) 380 __stop_ta_head_section = . ; 381 } 382 383#ifdef CFG_CORE_RODATA_NOEXEC 384 . = ALIGN(SMALL_PAGE_SIZE); 385#endif 386 387 .text_pageable : ALIGN(8) { 388 *(.text*) 389 . = ALIGN(SMALL_PAGE_SIZE); 390 } 391 392 __pageable_part_end = .; 393 __pageable_part_start = __init_end; 394 __pageable_start = __init_start; 395 __pageable_end = __pageable_part_end; 396 397 /* 398 * Assign a safe spot to store the hashes of the pages before 399 * heap is initialized. 400 */ 401 __tmp_hashes_start = __init_end; 402 __tmp_hashes_size = ((__pageable_end - __pageable_start) / 403 SMALL_PAGE_SIZE) * 32; 404 __tmp_hashes_end = __tmp_hashes_start + __tmp_hashes_size; 405 406 __init_mem_usage = __tmp_hashes_end - TEE_TEXT_VA_START; 407 408 ASSERT(CFG_TEE_LOAD_ADDR >= CFG_TEE_RAM_START, 409 "Load address before start of physical memory") 410 ASSERT(CFG_TEE_LOAD_ADDR < (CFG_TEE_RAM_START + CFG_TEE_RAM_PH_SIZE), 411 "Load address after end of physical memory") 412 ASSERT(__tmp_hashes_end < (TEE_RAM_VA_START + CFG_TEE_RAM_PH_SIZE), 413 "OP-TEE can't fit init part into available physical memory") 414 ASSERT((TEE_RAM_VA_START + CFG_TEE_RAM_PH_SIZE - __init_end) > 415 SMALL_PAGE_SIZE, "Too few free pages to initialize paging") 416 417 418#endif /*CFG_WITH_PAGER*/ 419 420#ifdef CFG_CORE_SANITIZE_KADDRESS 421 . = TEE_RAM_VA_START + (CFG_TEE_RAM_VA_SIZE * 8) / 9 - 8; 422 . = ALIGN(8); 423 .asan_shadow : { 424 __asan_shadow_start = .; 425 . += CFG_TEE_RAM_VA_SIZE / 9; 426 __asan_shadow_end = .; 427 __asan_shadow_size = __asan_shadow_end - __asan_shadow_start; 428 } 429#endif /*CFG_CORE_SANITIZE_KADDRESS*/ 430 431 __end = .; 432 433#ifndef CFG_WITH_PAGER 434 __init_size = __data_end - TEE_TEXT_VA_START; 435 __init_mem_usage = __end - TEE_TEXT_VA_START; 436#endif 437 /* 438 * Guard against moving the location counter backwards in the assignment 439 * below. 440 */ 441 ASSERT(. <= (TEE_RAM_VA_START + CFG_TEE_RAM_VA_SIZE), 442 "CFG_TEE_RAM_VA_SIZE is too small") 443 . = TEE_RAM_VA_START + CFG_TEE_RAM_VA_SIZE; 444 445 _end_of_ram = .; 446 447#ifndef CFG_WITH_PAGER 448 __flatmap_unpg_rw_size = _end_of_ram - __flatmap_unpg_rw_start; 449#endif 450 451 /DISCARD/ : { 452 /* Strip unnecessary stuff */ 453 *(.comment .note .eh_frame) 454 /* Strip meta variables */ 455 *(__keep_meta_vars*) 456 } 457 458} 459 460/* Unpaged read-only memories */ 461__vcore_unpg_rx_start = __flatmap_unpg_rx_start; 462__vcore_unpg_ro_start = __flatmap_unpg_ro_start; 463#ifdef CFG_CORE_RODATA_NOEXEC 464__vcore_unpg_rx_size = __flatmap_unpg_rx_size; 465__vcore_unpg_ro_size = __flatmap_unpg_ro_size; 466#else 467__vcore_unpg_rx_size = __flatmap_unpg_rx_size + __flatmap_unpg_ro_size; 468__vcore_unpg_ro_size = 0; 469#endif 470 471/* Unpaged read-write memory */ 472__vcore_unpg_rw_start = __flatmap_unpg_rw_start; 473__vcore_unpg_rw_size = __flatmap_unpg_rw_size; 474 475#ifdef CFG_WITH_PAGER 476/* 477 * Core init mapping shall cover up to end of the physical RAM. 478 * This is required since the hash table is appended to the 479 * binary data after the firmware build sequence. 480 */ 481#define __FLATMAP_PAGER_TRAILING_SPACE \ 482 (CFG_TEE_RAM_START + CFG_TEE_RAM_PH_SIZE - \ 483 (__flatmap_init_ro_start + __flatmap_init_ro_size)) 484 485/* Paged/init read-only memories */ 486__vcore_init_rx_start = __flatmap_init_rx_start; 487__vcore_init_ro_start = __flatmap_init_ro_start; 488#ifdef CFG_CORE_RODATA_NOEXEC 489__vcore_init_rx_size = __flatmap_init_rx_size; 490__vcore_init_ro_size = __flatmap_init_ro_size + __FLATMAP_PAGER_TRAILING_SPACE; 491#else 492__vcore_init_rx_size = __flatmap_init_rx_size + __flatmap_init_ro_size + 493 __FLATMAP_PAGER_TRAILING_SPACE; 494__vcore_init_ro_size = 0; 495#endif /* CFG_CORE_RODATA_NOEXEC */ 496#endif /* CFG_WITH_PAGER */ 497 498#ifdef CFG_CORE_SANITIZE_KADDRESS 499__asan_map_start = (__asan_shadow_start / SMALL_PAGE_SIZE) * 500 SMALL_PAGE_SIZE; 501__asan_map_end = ((__asan_shadow_end - 1) / SMALL_PAGE_SIZE) * 502 SMALL_PAGE_SIZE + SMALL_PAGE_SIZE; 503__asan_map_size = __asan_map_end - __asan_map_start; 504#endif /*CFG_CORE_SANITIZE_KADDRESS*/ 505