1/* SPDX-License-Identifier: (BSD-2-Clause AND MIT) */ 2/* 3 * Copyright (c) 2014, Linaro Limited 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright notice, 10 * this list of conditions and the following disclaimer. 11 * 12 * 2. Redistributions in binary form must reproduce the above copyright notice, 13 * this list of conditions and the following disclaimer in the documentation 14 * and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 20 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29/* 30 * Copyright (c) 2008-2010 Travis Geiselbrecht 31 * 32 * Permission is hereby granted, free of charge, to any person obtaining 33 * a copy of this software and associated documentation files 34 * (the "Software"), to deal in the Software without restriction, 35 * including without limitation the rights to use, copy, modify, merge, 36 * publish, distribute, sublicense, and/or sell copies of the Software, 37 * and to permit persons to whom the Software is furnished to do so, 38 * subject to the following conditions: 39 * 40 * The above copyright notice and this permission notice shall be 41 * included in all copies or substantial portions of the Software. 42 * 43 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 44 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 45 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 46 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY 47 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 48 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 49 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 50 */ 51 52#include <mm/core_mmu.h> 53#include <platform_config.h> 54#include <util.h> 55 56/* 57 * TEE_RAM_VA_START: The start virtual address of the TEE RAM 58 * TEE_TEXT_VA_START: The start virtual address of the OP-TEE text 59 */ 60#define TEE_RAM_VA_START TEE_RAM_START 61#define TEE_TEXT_VA_START (TEE_RAM_VA_START + \ 62 (TEE_LOAD_ADDR - TEE_RAM_START)) 63 64OUTPUT_FORMAT(CFG_KERN_LINKER_FORMAT) 65OUTPUT_ARCH(CFG_KERN_LINKER_ARCH) 66 67ENTRY(_start) 68SECTIONS 69{ 70 . = TEE_TEXT_VA_START; 71#ifdef ARM32 72 ASSERT(!(TEE_TEXT_VA_START & 31), "text start should align to 32bytes") 73#endif 74#ifdef ARM64 75 ASSERT(!(TEE_TEXT_VA_START & 127), "text start should align to 128bytes") 76#endif 77 __text_start = .; 78 79 /* 80 * Memory between TEE_TEXT_VA_START and page aligned rounded down 81 * value will be mapped with unpaged "text" section attributes: 82 * likely to be read-only/executable. 83 */ 84 __flatmap_unpg_rx_start = ROUNDDOWN(__text_start, SMALL_PAGE_SIZE); 85 86 .text : { 87 KEEP(*(.text._start)) 88 __identity_map_init_start = .; 89 *(.identity_map .identity_map.* \ 90 /* 91 * The one below is needed because it's a weak 92 * symbol that may be overridden by platform 93 * specific code. 94 */ 95 .text.get_core_pos_mpidr) 96 __identity_map_init_end = .; 97 KEEP(*(.text.init .text.plat_cpu_reset_early \ 98 .text.reset .text.reset_primary .text.unhandled_cpu \ 99 .text.__assert_flat_mapped_range)) 100 101#ifdef CFG_WITH_PAGER 102 *(.text) 103/* Include list of sections needed for paging */ 104#include <text_unpaged.ld.S> 105#else 106 *(.text .text.*) 107#endif 108 *(.sram.text.glue_7* .gnu.linkonce.t.*) 109 . = ALIGN(8); 110 } 111 __text_end = .; 112 113#ifdef CFG_CORE_RODATA_NOEXEC 114 . = ALIGN(SMALL_PAGE_SIZE); 115#endif 116 __flatmap_unpg_rx_size = . - __flatmap_unpg_rx_start; 117 __flatmap_unpg_ro_start = .; 118 119 .rodata : ALIGN(8) { 120 __rodata_start = .; 121 *(.gnu.linkonce.r.*) 122#ifdef CFG_WITH_PAGER 123 *(.rodata .rodata.__unpaged) 124#include <rodata_unpaged.ld.S> 125#else 126#ifdef CFG_DT 127 __rodata_dtdrv_start = .; 128 KEEP(*(.rodata.dtdrv)) 129 __rodata_dtdrv_end = .; 130#endif 131 *(.rodata .rodata.*) 132 . = ALIGN(8); 133 KEEP(*(SORT(.scattered_array*))); 134#endif 135 . = ALIGN(8); 136 __rodata_end = .; 137 } 138 139 .got : { *(.got.plt) *(.got) } 140 .plt : { *(.plt) } 141 142 .ctors : ALIGN(8) { 143 __ctor_list = .; 144 KEEP(*(.ctors .ctors.* .init_array .init_array.*)) 145 __ctor_end = .; 146 } 147 .dtors : ALIGN(8) { 148 __dtor_list = .; 149 KEEP(*(.dtors .dtors.* .fini_array .fini_array.*)) 150 __dtor_end = .; 151 } 152 153 /* .ARM.exidx is sorted, so has to go in its own output section. */ 154 .ARM.exidx : { 155 __exidx_start = .; 156 *(.ARM.exidx* .gnu.linkonce.armexidx.*) 157 __exidx_end = .; 158 } 159 160 .ARM.extab : { 161 __extab_start = .; 162 *(.ARM.extab*) 163 __extab_end = .; 164 } 165 166 /* Start page aligned read-write memory */ 167#ifdef CFG_CORE_RWDATA_NOEXEC 168 . = ALIGN(SMALL_PAGE_SIZE); 169#endif 170 __flatmap_unpg_ro_size = . - __flatmap_unpg_ro_start; 171 172#ifdef CFG_VIRTUALIZATION 173 __flatmap_nex_rw_start = . ; 174 .nex_data : ALIGN(8) { 175 *(.nex_data .nex_data.*) 176 } 177 178 .nex_bss : ALIGN(8) { 179 __nex_bss_start = .; 180 *(.nex_bss .nex_bss.*) 181 __nex_bss_end = .; 182 } 183 184 /* 185 * We want to keep all nexus memory in one place, because 186 * it should be always mapped and it is easier to map one 187 * memory region than two. 188 * Next section are NOLOAD ones, but they are followed 189 * by sections with data. Thus, this NOLOAD section will 190 * be included in the resulting binary, filled with zeroes 191 */ 192 .nex_stack (NOLOAD) : { 193 __nozi_stack_start = .; 194 KEEP(*(.nozi_stack.stack_tmp .nozi_stack.stack_abt)) 195 . = ALIGN(8); 196 __nozi_stack_end = .; 197 } 198 199 .nex_heap (NOLOAD) : { 200 __nex_heap_start = .; 201 . += CFG_CORE_NEX_HEAP_SIZE; 202 . = ALIGN(16 * 1024); 203 __nex_heap_end = .; 204 } 205 .nex_nozi (NOLOAD) : { 206 ASSERT(!(ABSOLUTE(.) & (16 * 1024 - 1)), "align nozi to 16kB"); 207 KEEP(*(.nozi.mmu.l1 .nozi.mmu.l2)) 208 } 209 210 . = ALIGN(SMALL_PAGE_SIZE); 211 212 __flatmap_nex_rw_size = . - __flatmap_nex_rw_start; 213 __flatmap_nex_rw_end = .; 214#endif 215 216 __flatmap_unpg_rw_start = .; 217 218 .data : ALIGN(8) { 219 /* writable data */ 220 __data_start_rom = .; 221 /* in one segment binaries, the rom data address is on top 222 of the ram data address */ 223 __data_start = .; 224 *(.data .data.* .gnu.linkonce.d.*) 225 . = ALIGN(8); 226 } 227 228 /* unintialized data */ 229 .bss : { 230 __data_end = .; 231 __bss_start = .; 232 *(.bss .bss.*) 233 *(.gnu.linkonce.b.*) 234 *(COMMON) 235 . = ALIGN(8); 236 __bss_end = .; 237 } 238 239 .heap1 (NOLOAD) : { 240 /* 241 * We're keeping track of the padding added before the 242 * .nozi section so we can do something useful with 243 * this otherwise wasted memory. 244 */ 245 __heap1_start = .; 246#ifndef CFG_WITH_PAGER 247 . += CFG_CORE_HEAP_SIZE; 248#endif 249#ifdef CFG_WITH_LPAE 250 . = ALIGN(4 * 1024); 251#else 252 . = ALIGN(16 * 1024); 253#endif 254 __heap1_end = .; 255 } 256 /* 257 * Uninitialized data that shouldn't be zero initialized at 258 * runtime. 259 * 260 * L1 mmu table requires 16 KiB alignment 261 */ 262 .nozi (NOLOAD) : { 263 __nozi_start = .; 264 KEEP(*(.nozi .nozi.*)) 265 . = ALIGN(16); 266 __nozi_end = .; 267 /* 268 * If virtualization is enabled, abt and tmp stacks will placed 269 * at above .nex_stack section and thread stacks will go there 270 */ 271 __nozi_stack_start = .; 272 KEEP(*(.nozi_stack .nozi_stack.*)) 273 . = ALIGN(8); 274 __nozi_stack_end = .; 275 } 276 277#ifdef CFG_WITH_PAGER 278 .heap2 (NOLOAD) : { 279 __heap2_start = .; 280 /* 281 * Reserve additional memory for heap, the total should be 282 * at least CFG_CORE_HEAP_SIZE, but count what has already 283 * been reserved in .heap1 284 */ 285 . += CFG_CORE_HEAP_SIZE - (__heap1_end - __heap1_start); 286 . = ALIGN(SMALL_PAGE_SIZE); 287 __heap2_end = .; 288 } 289 290 /* Start page aligned read-only memory */ 291 __flatmap_unpg_rw_size = . - __flatmap_unpg_rw_start; 292 293 __init_start = .; 294 __flatmap_init_rx_start = .; 295 296 ASSERT(!(__flatmap_init_rx_start & (SMALL_PAGE_SIZE - 1)), 297 "read-write memory is not paged aligned") 298 299 .text_init : { 300/* 301 * Include list of sections needed for boot initialization, this list 302 * overlaps with unpaged.ld.S but since unpaged.ld.S is first all those 303 * sections will go into the unpaged area. 304 */ 305#include <text_init.ld.S> 306 KEEP(*(.text.startup.*)); 307 /* Make sure constructor functions are available during init */ 308 KEEP(*(.text._GLOBAL__sub_*)); 309 . = ALIGN(8); 310 } 311 312#ifdef CFG_CORE_RODATA_NOEXEC 313 . = ALIGN(SMALL_PAGE_SIZE); 314#endif 315 __flatmap_init_rx_size = . - __flatmap_init_rx_start; 316 __flatmap_init_ro_start = .; 317 318 .rodata_init : { 319#include <rodata_init.ld.S> 320 321 . = ALIGN(8); 322 KEEP(*(SORT(.scattered_array*))); 323 324 . = ALIGN(8); 325 __rodata_init_end = .; 326 } 327 __rodata_init_end = .; 328 329 __init_end = ROUNDUP(__rodata_init_end, SMALL_PAGE_SIZE); 330 __get_tee_init_end = __init_end; 331 __init_size = __init_end - __init_start; 332 333 /* vcore flat map stops here. No need to page align, rodata follows. */ 334 __flatmap_init_ro_size = __init_end - __flatmap_init_ro_start; 335 336 .rodata_pageable : ALIGN(8) { 337#ifdef CFG_DT 338 __rodata_dtdrv_start = .; 339 KEEP(*(.rodata.dtdrv)) 340 __rodata_dtdrv_end = .; 341#endif 342 *(.rodata*) 343 } 344 345#ifdef CFG_CORE_RODATA_NOEXEC 346 . = ALIGN(SMALL_PAGE_SIZE); 347#endif 348 349 .text_pageable : ALIGN(8) { 350 *(.text*) 351 . = ALIGN(SMALL_PAGE_SIZE); 352 } 353 354 __pageable_part_end = .; 355 __pageable_part_start = __init_end; 356 __pageable_start = __init_start; 357 __pageable_end = __pageable_part_end; 358 359 ASSERT(TEE_LOAD_ADDR >= TEE_RAM_START, 360 "Load address before start of physical memory") 361 ASSERT(TEE_LOAD_ADDR < (TEE_RAM_START + TEE_RAM_PH_SIZE), 362 "Load address after end of physical memory") 363 ASSERT((TEE_RAM_VA_START + TEE_RAM_PH_SIZE - __init_end) > 364 SMALL_PAGE_SIZE, "Too few free pages to initialize paging") 365 366 367#endif /*CFG_WITH_PAGER*/ 368 369#ifdef CFG_CORE_SANITIZE_KADDRESS 370 . = TEE_RAM_VA_START + (TEE_RAM_VA_SIZE * 8) / 9 - 8; 371 . = ALIGN(8); 372 .asan_shadow : { 373 __asan_shadow_start = .; 374 . += TEE_RAM_VA_SIZE / 9; 375 __asan_shadow_end = .; 376 __asan_shadow_size = __asan_shadow_end - __asan_shadow_start; 377 } 378#endif /*CFG_CORE_SANITIZE_KADDRESS*/ 379 380 __end = .; 381 382#ifndef CFG_WITH_PAGER 383 __init_size = __data_end - TEE_TEXT_VA_START; 384#endif 385 /* 386 * Guard against moving the location counter backwards in the assignment 387 * below. 388 */ 389 ASSERT(. <= (TEE_RAM_VA_START + TEE_RAM_VA_SIZE), 390 "TEE_RAM_VA_SIZE is too small") 391 . = TEE_RAM_VA_START + TEE_RAM_VA_SIZE; 392 393 _end_of_ram = .; 394 395#ifndef CFG_WITH_PAGER 396 __flatmap_unpg_rw_size = _end_of_ram - __flatmap_unpg_rw_start; 397 __get_tee_init_end = .; 398#endif 399 400 /* 401 * These regions will not become a normal part of the dumped 402 * binary, instead some are interpreted by the dump script and 403 * converted into suitable format for OP-TEE itself to use. 404 */ 405 .dynamic : { *(.dynamic) } 406 .hash : { *(.hash) } 407 .dynsym : { *(.dynsym) } 408 .dynstr : { *(.dynstr) } 409 410 .rel : { 411 *(.rel.*) 412 } 413 .rela : { 414 *(.rela.*) 415 } 416#ifndef CFG_CORE_ASLR 417 ASSERT(SIZEOF(.rel) == 0, "Relocation entries not expected") 418 ASSERT(SIZEOF(.rela) == 0, "Relocation entries not expected") 419#endif 420 421 /DISCARD/ : { 422 /* Strip unnecessary stuff */ 423 *(.comment .note .eh_frame .interp) 424 /* Strip meta variables */ 425 *(__keep_meta_vars*) 426 } 427 428} 429 430/* Unpaged read-only memories */ 431__vcore_unpg_rx_start = __flatmap_unpg_rx_start; 432__vcore_unpg_ro_start = __flatmap_unpg_ro_start; 433#ifdef CFG_CORE_RODATA_NOEXEC 434__vcore_unpg_rx_size = __flatmap_unpg_rx_size; 435__vcore_unpg_ro_size = __flatmap_unpg_ro_size; 436#else 437__vcore_unpg_rx_size = __flatmap_unpg_rx_size + __flatmap_unpg_ro_size; 438__vcore_unpg_ro_size = 0; 439#endif 440 441/* Unpaged read-write memory */ 442__vcore_unpg_rw_start = __flatmap_unpg_rw_start; 443__vcore_unpg_rw_size = __flatmap_unpg_rw_size; 444 445#ifdef CFG_VIRTUALIZATION 446/* Nexus read-write memory */ 447__vcore_nex_rw_start = __flatmap_nex_rw_start; 448__vcore_nex_rw_size = __flatmap_nex_rw_size; 449#endif 450 451#ifdef CFG_WITH_PAGER 452/* 453 * Core init mapping shall cover up to end of the physical RAM. 454 * This is required since the hash table is appended to the 455 * binary data after the firmware build sequence. 456 */ 457#define __FLATMAP_PAGER_TRAILING_SPACE \ 458 (TEE_RAM_START + TEE_RAM_PH_SIZE - \ 459 (__flatmap_init_ro_start + __flatmap_init_ro_size)) 460 461/* Paged/init read-only memories */ 462__vcore_init_rx_start = __flatmap_init_rx_start; 463__vcore_init_ro_start = __flatmap_init_ro_start; 464#ifdef CFG_CORE_RODATA_NOEXEC 465__vcore_init_rx_size = __flatmap_init_rx_size; 466__vcore_init_ro_size = __flatmap_init_ro_size + __FLATMAP_PAGER_TRAILING_SPACE; 467#else 468__vcore_init_rx_size = __flatmap_init_rx_size + __flatmap_init_ro_size + 469 __FLATMAP_PAGER_TRAILING_SPACE; 470__vcore_init_ro_size = 0; 471#endif /* CFG_CORE_RODATA_NOEXEC */ 472#endif /* CFG_WITH_PAGER */ 473 474#ifdef CFG_CORE_SANITIZE_KADDRESS 475__asan_map_start = (__asan_shadow_start / SMALL_PAGE_SIZE) * 476 SMALL_PAGE_SIZE; 477__asan_map_end = ((__asan_shadow_end - 1) / SMALL_PAGE_SIZE) * 478 SMALL_PAGE_SIZE + SMALL_PAGE_SIZE; 479__asan_map_size = __asan_map_end - __asan_map_start; 480#endif /*CFG_CORE_SANITIZE_KADDRESS*/ 481