1/* 2 * Copyright (c) 2014, Linaro Limited 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, 9 * this list of conditions and the following disclaimer. 10 * 11 * 2. Redistributions in binary form must reproduce the above copyright notice, 12 * this list of conditions and the following disclaimer in the documentation 13 * and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28/* 29 * Copyright (c) 2008-2010 Travis Geiselbrecht 30 * 31 * Permission is hereby granted, free of charge, to any person obtaining 32 * a copy of this software and associated documentation files 33 * (the "Software"), to deal in the Software without restriction, 34 * including without limitation the rights to use, copy, modify, merge, 35 * publish, distribute, sublicense, and/or sell copies of the Software, 36 * and to permit persons to whom the Software is furnished to do so, 37 * subject to the following conditions: 38 * 39 * The above copyright notice and this permission notice shall be 40 * included in all copies or substantial portions of the Software. 41 * 42 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 43 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 44 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 45 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY 46 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 47 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 48 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 49 */ 50 51#include <platform_config.h> 52 53#ifndef SMALL_PAGE_SIZE 54#define SMALL_PAGE_SIZE 4096 55#endif 56#ifndef ROUNDUP 57#define ROUNDUP(x, y) ((((x) + (y) - 1) / (y)) * (y)) 58#define ROUNDDOWN(x, y) (((x) / (y)) * (y)) 59#endif 60 61OUTPUT_FORMAT(CFG_KERN_LINKER_FORMAT) 62OUTPUT_ARCH(CFG_KERN_LINKER_ARCH) 63 64ENTRY(_start) 65SECTIONS 66{ 67 . = CFG_TEE_LOAD_ADDR; 68 69 __text_start = .; 70 71 /* 72 * Memory between CFG_TEE_LOAD_ADDR and page aligned rounded down 73 * value will be mapped with unpaged "text" section attributes: 74 * likely to be read-only/executable. 75 */ 76 __flatmap_unpg_rx_start = ROUNDDOWN(__text_start, SMALL_PAGE_SIZE); 77 78 .text : { 79 KEEP(*(.text.boot.vectab1)) 80 KEEP(*(.text.boot.vectab2)) 81 KEEP(*(.text.boot)) 82 83 . = ALIGN(8); 84 __initcall_start = .; 85 KEEP(*(.initcall1)) 86 KEEP(*(.initcall2)) 87 KEEP(*(.initcall3)) 88 KEEP(*(.initcall4)) 89 __initcall_end = .; 90 91#ifdef CFG_WITH_PAGER 92 *(.text) 93/* Include list of sections needed for paging */ 94#include <text_unpaged.ld.S> 95#else 96 *(.text .text.*) 97#endif 98 *(.sram.text.glue_7* .gnu.linkonce.t.*) 99 . = ALIGN(8); 100 } 101 __text_end = .; 102 103#ifdef CFG_CORE_RODATA_NOEXEC 104 . = ALIGN(SMALL_PAGE_SIZE); 105#endif 106 __flatmap_unpg_rx_size = . - __flatmap_unpg_rx_start; 107 __flatmap_unpg_ro_start = .; 108 109 .rodata : ALIGN(8) { 110 __rodata_start = .; 111 *(.gnu.linkonce.r.*) 112#ifdef CFG_WITH_PAGER 113 *(.rodata .rodata.__unpaged) 114#include <rodata_unpaged.ld.S> 115#else 116#ifdef CFG_DT 117 __rodata_dtdrv_start = .; 118 KEEP(*(.rodata.dtdrv)) 119 __rodata_dtdrv_end = .; 120#endif 121 *(.rodata .rodata.*) 122 123 /* 124 * 8 to avoid unwanted padding between __start_ta_head_section 125 * and the first structure in ta_head_section, in 64-bit 126 * builds 127 */ 128 . = ALIGN(8); 129 __start_ta_head_section = . ; 130 KEEP(*(ta_head_section)) 131 __stop_ta_head_section = . ; 132 . = ALIGN(8); 133 __start_phys_mem_map_section = . ; 134 KEEP(*(phys_mem_map_section)) 135 __end_phys_mem_map_section = . ; 136 . = ALIGN(8); 137 __start_phys_sdp_mem_section = . ; 138 KEEP(*(phys_sdp_mem_section)) 139 __end_phys_sdp_mem_section = . ; 140#endif 141 . = ALIGN(8); 142 __rodata_end = .; 143 } 144 145 .interp : { *(.interp) } 146 .hash : { *(.hash) } 147 .dynsym : { *(.dynsym) } 148 .dynstr : { *(.dynstr) } 149 .rel.text : { *(.rel.text) *(.rel.gnu.linkonce.t*) } 150 .rela.text : { *(.rela.text) *(.rela.gnu.linkonce.t*) } 151 .rel.data : { *(.rel.data) *(.rel.gnu.linkonce.d*) } 152 .rela.data : { *(.rela.data) *(.rela.gnu.linkonce.d*) } 153 .rel.rodata : { *(.rel.rodata) *(.rel.gnu.linkonce.r*) } 154 .rela.rodata : { *(.rela.rodata) *(.rela.gnu.linkonce.r*) } 155 .rel.got : { *(.rel.got) } 156 .rela.got : { *(.rela.got) } 157 .rel.ctors : { *(.rel.ctors) } 158 .rela.ctors : { *(.rela.ctors) } 159 .rel.dtors : { *(.rel.dtors) } 160 .rela.dtors : { *(.rela.dtors) } 161 .rel.init : { *(.rel.init) } 162 .rela.init : { *(.rela.init) } 163 .rel.fini : { *(.rel.fini) } 164 .rela.fini : { *(.rela.fini) } 165 .rel.bss : { *(.rel.bss) } 166 .rela.bss : { *(.rela.bss) } 167 .rel.plt : { *(.rel.plt) } 168 .rela.plt : { *(.rela.plt) } 169 .init : { *(.init) } =0x9090 170 .plt : { *(.plt) } 171 172 /* .ARM.exidx is sorted, so has to go in its own output section. */ 173 .ARM.exidx : { 174 __exidx_start = .; 175 *(.ARM.exidx* .gnu.linkonce.armexidx.*) 176 __exidx_end = .; 177 } 178 179 .ARM.extab : { 180 __extab_start = .; 181 *(.ARM.extab*) 182 __extab_end = .; 183 } 184 185 /* Start page aligned read-write memory */ 186#ifdef CFG_CORE_RWDATA_NOEXEC 187 . = ALIGN(SMALL_PAGE_SIZE); 188#endif 189 __flatmap_unpg_ro_size = . - __flatmap_unpg_ro_start; 190 __flatmap_unpg_rw_start = .; 191 192 .data : ALIGN(8) { 193 /* writable data */ 194 __data_start_rom = .; 195 /* in one segment binaries, the rom data address is on top 196 of the ram data address */ 197 __data_start = .; 198 *(.data .data.* .gnu.linkonce.d.*) 199 . = ALIGN(8); 200 } 201 202 .ctors : ALIGN(8) { 203 __ctor_list = .; 204 KEEP(*(.ctors .ctors.* .init_array .init_array.*)) 205 __ctor_end = .; 206 } 207 .dtors : ALIGN(8) { 208 __dtor_list = .; 209 KEEP(*(.dtors .dtors.* .fini_array .fini_array.*)) 210 __dtor_end = .; 211 } 212 .got : { *(.got.plt) *(.got) } 213 .dynamic : { *(.dynamic) } 214 215 __data_end = .; 216 /* unintialized data */ 217 .bss : ALIGN(8) { 218 __bss_start = .; 219 *(.bss .bss.*) 220 *(.gnu.linkonce.b.*) 221 *(COMMON) 222 . = ALIGN(8); 223 __bss_end = .; 224 } 225 226 .heap1 (NOLOAD) : { 227 /* 228 * We're keeping track of the padding added before the 229 * .nozi section so we can do something useful with 230 * this otherwise wasted memory. 231 */ 232 __heap1_start = .; 233#ifndef CFG_WITH_PAGER 234 . += CFG_CORE_HEAP_SIZE; 235#endif 236 . = ALIGN(16 * 1024); 237 __heap1_end = .; 238 } 239 240 /* 241 * Uninitialized data that shouldn't be zero initialized at 242 * runtime. 243 * 244 * L1 mmu table requires 16 KiB alignment 245 */ 246 .nozi (NOLOAD) : { 247 __nozi_start = .; 248 ASSERT(!(__nozi_start & (16 * 1024 - 1)), "align nozi to 16kB"); 249 250 KEEP(*(.nozi .nozi.*)) 251 . = ALIGN(16); 252 __nozi_end = .; 253 __nozi_stack_start = .; 254 KEEP(*(.nozi_stack)) 255 . = ALIGN(8); 256 __nozi_stack_end = .; 257 } 258 259#ifdef CFG_WITH_PAGER 260 .heap2 (NOLOAD) : { 261 __heap2_start = .; 262 /* 263 * Reserve additional memory for heap, the total should be 264 * at least CFG_CORE_HEAP_SIZE, but count what has already 265 * been reserved in .heap1 266 */ 267 . += CFG_CORE_HEAP_SIZE - (__heap1_end - __heap1_start); 268 . = ALIGN(SMALL_PAGE_SIZE); 269 __heap2_end = .; 270 } 271 272 /* Start page aligned read-only memory */ 273 __flatmap_unpg_rw_size = . - __flatmap_unpg_rw_start; 274 275 __init_start = .; 276 __flatmap_init_rx_start = .; 277 278 ASSERT(!(__flatmap_init_rx_start & (SMALL_PAGE_SIZE - 1)), 279 "read-write memory is not paged aligned") 280 281 .text_init : { 282/* 283 * Include list of sections needed for boot initialization, this list 284 * overlaps with unpaged.ld.S but since unpaged.ld.S is first all those 285 * sections will go into the unpaged area. 286 */ 287#include <text_init.ld.S> 288 . = ALIGN(8); 289 } 290 291#ifdef CFG_CORE_RODATA_NOEXEC 292 . = ALIGN(SMALL_PAGE_SIZE); 293#endif 294 __flatmap_init_rx_size = . - __flatmap_init_rx_start; 295 __flatmap_init_ro_start = .; 296 297 .rodata_init : { 298#include <rodata_init.ld.S> 299 . = ALIGN(8); 300 __start_phys_mem_map_section = . ; 301 KEEP(*(phys_mem_map_section)) 302 __end_phys_mem_map_section = . ; 303 . = ALIGN(8); 304 __start_phys_sdp_mem_section = . ; 305 KEEP(*(phys_sdp_mem_section)) 306 __end_phys_sdp_mem_section = . ; 307 . = ALIGN(8); 308 } 309 __rodata_init_end = .; 310 311 __init_end = ROUNDUP(__rodata_init_end, SMALL_PAGE_SIZE); 312 __init_size = __init_end - __init_start; 313 314 /* vcore flat map stops here. No need to page align, rodata follows. */ 315 __flatmap_init_ro_size = __init_end - __flatmap_init_ro_start; 316 317 .rodata_pageable : ALIGN(8) { 318#ifdef CFG_DT 319 __rodata_dtdrv_start = .; 320 KEEP(*(.rodata.dtdrv)) 321 __rodata_dtdrv_end = .; 322#endif 323 *(.rodata*) 324 /* 325 * 8 to avoid unwanted padding between __start_ta_head_section 326 * and the first structure in ta_head_section, in 64-bit 327 * builds 328 */ 329 . = ALIGN(8); 330 __start_ta_head_section = . ; 331 KEEP(*(ta_head_section)) 332 __stop_ta_head_section = . ; 333 } 334 335#ifdef CFG_CORE_RODATA_NOEXEC 336 . = ALIGN(SMALL_PAGE_SIZE); 337#endif 338 339 .text_pageable : ALIGN(8) { 340 *(.text*) 341 . = ALIGN(SMALL_PAGE_SIZE); 342 } 343 344 __pageable_part_end = .; 345 __pageable_part_start = __init_end; 346 __pageable_start = __init_start; 347 __pageable_end = __pageable_part_end; 348 349 /* 350 * Assign a safe spot to store the hashes of the pages before 351 * heap is initialized. 352 */ 353 __tmp_hashes_start = __init_end; 354 __tmp_hashes_size = ((__pageable_end - __pageable_start) / 355 SMALL_PAGE_SIZE) * 32; 356 __tmp_hashes_end = __tmp_hashes_start + __tmp_hashes_size; 357 358 __init_mem_usage = __tmp_hashes_end - CFG_TEE_LOAD_ADDR; 359 360 ASSERT(CFG_TEE_LOAD_ADDR >= CFG_TEE_RAM_START, 361 "Load address before start of physical memory") 362 ASSERT(CFG_TEE_LOAD_ADDR < (CFG_TEE_RAM_START + CFG_TEE_RAM_PH_SIZE), 363 "Load address after end of physical memory") 364 ASSERT(__tmp_hashes_end < (CFG_TEE_RAM_START + CFG_TEE_RAM_PH_SIZE), 365 "OP-TEE can't fit init part into available physical memory") 366 ASSERT((CFG_TEE_RAM_START + CFG_TEE_RAM_PH_SIZE - __init_end) > 367 SMALL_PAGE_SIZE, "Too few free pages to initialize paging") 368 369 370#endif /*CFG_WITH_PAGER*/ 371 372#ifdef CFG_CORE_SANITIZE_KADDRESS 373 . = CFG_TEE_RAM_START + (CFG_TEE_RAM_VA_SIZE * 8) / 9 - 8; 374 . = ALIGN(8); 375 .asan_shadow : { 376 __asan_shadow_start = .; 377 . += CFG_TEE_RAM_VA_SIZE / 9; 378 __asan_shadow_end = .; 379 } 380#endif /*CFG_CORE_SANITIZE_KADDRESS*/ 381 382 __end = .; 383 384#ifndef CFG_WITH_PAGER 385 __init_size = __data_end - CFG_TEE_LOAD_ADDR; 386 __init_mem_usage = __end - CFG_TEE_LOAD_ADDR; 387#endif 388 . = CFG_TEE_RAM_START + CFG_TEE_RAM_VA_SIZE; 389 390 _end_of_ram = .; 391 392#ifndef CFG_WITH_PAGER 393 __flatmap_unpg_rw_size = _end_of_ram - __flatmap_unpg_rw_start; 394#endif 395 396 /DISCARD/ : { 397 /* Strip unnecessary stuff */ 398 *(.comment .note .eh_frame) 399 /* Strip meta variables */ 400 *(__keep_meta_vars*) 401 } 402 403} 404 405/* Unpaged read-only memories */ 406PROVIDE(__vcore_unpg_rx_start = __flatmap_unpg_rx_start); 407PROVIDE(__vcore_unpg_ro_start = __flatmap_unpg_ro_start); 408#ifdef CFG_CORE_RODATA_NOEXEC 409PROVIDE(__vcore_unpg_rx_size = __flatmap_unpg_rx_size); 410PROVIDE(__vcore_unpg_ro_size = __flatmap_unpg_ro_size); 411#else 412PROVIDE(__vcore_unpg_rx_size = __flatmap_unpg_rx_size + 413 __flatmap_unpg_ro_size); 414PROVIDE(__vcore_unpg_ro_size = 0); 415#endif 416 417/* Unpaged read-write memory */ 418PROVIDE(__vcore_unpg_rw_start = __flatmap_unpg_rw_start); 419PROVIDE(__vcore_unpg_rw_size = __flatmap_unpg_rw_size); 420 421#ifdef CFG_WITH_PAGER 422/* 423 * Core init mapping shall cover up to end of the physical RAM. 424 * This is required since the hash table is appended to the 425 * binary data after the firmware build sequence. 426 */ 427#define __FLATMAP_PAGER_TRAILING_SPACE \ 428 (CFG_TEE_RAM_START + CFG_TEE_RAM_PH_SIZE - \ 429 (__flatmap_init_ro_start + __flatmap_init_ro_size)) 430 431/* Paged/init read-only memories */ 432PROVIDE(__vcore_init_rx_start = __flatmap_init_rx_start); 433PROVIDE(__vcore_init_ro_start = __flatmap_init_ro_start); 434#ifdef CFG_CORE_RODATA_NOEXEC 435PROVIDE(__vcore_init_rx_size = __flatmap_init_rx_size); 436PROVIDE(__vcore_init_ro_size = __flatmap_init_ro_size + 437 __FLATMAP_PAGER_TRAILING_SPACE); 438#else 439PROVIDE(__vcore_init_rx_size = __flatmap_init_rx_size + 440 __flatmap_init_ro_size + 441 __FLATMAP_PAGER_TRAILING_SPACE); 442PROVIDE(__vcore_init_ro_size = 0); 443#endif /* CFG_CORE_RODATA_NOEXEC */ 444#endif /* CFG_WITH_PAGER */ 445