xref: /optee_os/core/arch/arm/kernel/kern.ld.S (revision b8bb0afa738e6038bbd92b57742aa2526df9f20a)
1/* SPDX-License-Identifier: (BSD-2-Clause AND MIT) */
2/*
3 * Copyright (c) 2014, Linaro Limited
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright notice,
10 * this list of conditions and the following disclaimer.
11 *
12 * 2. Redistributions in binary form must reproduce the above copyright notice,
13 * this list of conditions and the following disclaimer in the documentation
14 * and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
20 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 * POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/*
30 * Copyright (c) 2008-2010 Travis Geiselbrecht
31 *
32 * Permission is hereby granted, free of charge, to any person obtaining
33 * a copy of this software and associated documentation files
34 * (the "Software"), to deal in the Software without restriction,
35 * including without limitation the rights to use, copy, modify, merge,
36 * publish, distribute, sublicense, and/or sell copies of the Software,
37 * and to permit persons to whom the Software is furnished to do so,
38 * subject to the following conditions:
39 *
40 * The above copyright notice and this permission notice shall be
41 * included in all copies or substantial portions of the Software.
42 *
43 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
44 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
45 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
46 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
47 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
48 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
49 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
50 */
51
52#include <mm/core_mmu.h>
53#include <platform_config.h>
54#include <util.h>
55
56/*
57 * TEE_RAM_VA_START:            The start virtual address of the TEE RAM
58 * TEE_TEXT_VA_START:           The start virtual address of the OP-TEE text
59 */
60#define TEE_RAM_VA_START        TEE_RAM_START
61#define TEE_TEXT_VA_START       (TEE_RAM_VA_START + \
62					(TEE_LOAD_ADDR - TEE_RAM_START))
63
64OUTPUT_FORMAT(CFG_KERN_LINKER_FORMAT)
65OUTPUT_ARCH(CFG_KERN_LINKER_ARCH)
66
67ENTRY(_start)
68SECTIONS
69{
70	. = TEE_TEXT_VA_START;
71#ifdef ARM32
72	ASSERT(!(TEE_TEXT_VA_START & 31), "text start should align to 32bytes")
73#endif
74#ifdef ARM64
75	ASSERT(!(TEE_TEXT_VA_START & 127), "text start should align to 128bytes")
76#endif
77	__text_start = .;
78
79	/*
80	 * Memory between TEE_TEXT_VA_START and page aligned rounded down
81	 * value will be mapped with unpaged "text" section attributes:
82	 * likely to be read-only/executable.
83	 */
84	__flatmap_unpg_rx_start = ROUNDDOWN(__text_start, SMALL_PAGE_SIZE);
85
86	.text : {
87		KEEP(*(.text._start))
88		KEEP(*(.text.init .text.plat_cpu_reset_early \
89		       .text.reset .text.reset_primary .text.unhandled_cpu \
90		       .text.__assert_flat_mapped_range))
91
92#ifdef CFG_WITH_PAGER
93		*(.text)
94/* Include list of sections needed for paging */
95#include <text_unpaged.ld.S>
96#else
97		*(.text .text.*)
98#endif
99		*(.sram.text.glue_7* .gnu.linkonce.t.*)
100		. = ALIGN(8);
101	}
102	__text_end = .;
103
104#ifdef CFG_CORE_RODATA_NOEXEC
105	. = ALIGN(SMALL_PAGE_SIZE);
106#endif
107	__flatmap_unpg_rx_size = . - __flatmap_unpg_rx_start;
108	__flatmap_unpg_ro_start = .;
109
110	.rodata : ALIGN(8) {
111		__rodata_start = .;
112		*(.gnu.linkonce.r.*)
113#ifdef CFG_WITH_PAGER
114		*(.rodata .rodata.__unpaged)
115#include <rodata_unpaged.ld.S>
116#else
117#ifdef CFG_DT
118		__rodata_dtdrv_start = .;
119		KEEP(*(.rodata.dtdrv))
120		__rodata_dtdrv_end = .;
121#endif
122#ifdef CFG_EARLY_TA
123		. = ALIGN(8);
124		__rodata_early_ta_start = .;
125		KEEP(*(.rodata.early_ta))
126		__rodata_early_ta_end = .;
127#endif
128
129		*(.rodata .rodata.*)
130		. = ALIGN(8);
131		KEEP(*(SORT(.scattered_array*)));
132#endif
133		. = ALIGN(8);
134		__rodata_end = .;
135	}
136
137	.interp : { *(.interp) }
138	.hash : { *(.hash) }
139	.dynsym : { *(.dynsym) }
140	.dynstr : { *(.dynstr) }
141	.rel.text : { *(.rel.text) *(.rel.gnu.linkonce.t*) }
142	.rela.text : { *(.rela.text) *(.rela.gnu.linkonce.t*) }
143	.rel.data : { *(.rel.data) *(.rel.gnu.linkonce.d*) }
144	.rela.data : { *(.rela.data) *(.rela.gnu.linkonce.d*) }
145	.rel.rodata : { *(.rel.rodata) *(.rel.gnu.linkonce.r*) }
146	.rela.rodata : { *(.rela.rodata) *(.rela.gnu.linkonce.r*) }
147	.rel.got : { *(.rel.got) }
148	.rela.got : { *(.rela.got) }
149	.rel.ctors : { *(.rel.ctors) }
150	.rela.ctors : { *(.rela.ctors) }
151	.rel.dtors : { *(.rel.dtors) }
152	.rela.dtors : { *(.rela.dtors) }
153	.rel.init : { *(.rel.init) }
154	.rela.init : { *(.rela.init) }
155	.rel.fini : { *(.rel.fini) }
156	.rela.fini : { *(.rela.fini) }
157	.rel.bss : { *(.rel.bss) }
158	.rela.bss : { *(.rela.bss) }
159	.rel.plt : { *(.rel.plt) }
160	.rela.plt : { *(.rela.plt) }
161	.init : { *(.init) } =0x9090
162	.plt : { *(.plt) }
163
164	/* .ARM.exidx is sorted, so has to go in its own output section.  */
165	.ARM.exidx : {
166		__exidx_start = .;
167		*(.ARM.exidx* .gnu.linkonce.armexidx.*)
168		__exidx_end = .;
169	}
170
171	.ARM.extab : {
172		__extab_start = .;
173		*(.ARM.extab*)
174		__extab_end = .;
175	}
176
177	/* Start page aligned read-write memory */
178#ifdef CFG_CORE_RWDATA_NOEXEC
179	. = ALIGN(SMALL_PAGE_SIZE);
180#endif
181	__flatmap_unpg_ro_size = . - __flatmap_unpg_ro_start;
182	__flatmap_unpg_rw_start = .;
183
184	.data : ALIGN(8) {
185		/* writable data  */
186		__data_start_rom = .;
187		/* in one segment binaries, the rom data address is on top
188		   of the ram data address */
189		__data_start = .;
190		*(.data .data.* .gnu.linkonce.d.*)
191		. = ALIGN(8);
192	}
193
194	.ctors : ALIGN(8) {
195		__ctor_list = .;
196		KEEP(*(.ctors .ctors.* .init_array .init_array.*))
197		__ctor_end = .;
198	}
199	.dtors : ALIGN(8) {
200		__dtor_list = .;
201		KEEP(*(.dtors .dtors.* .fini_array .fini_array.*))
202		__dtor_end = .;
203	}
204	.got : { *(.got.plt) *(.got) }
205	.dynamic : { *(.dynamic) }
206
207	/* unintialized data */
208	.bss : {
209		__data_end = .;
210		__bss_start = .;
211		*(.bss .bss.*)
212		*(.gnu.linkonce.b.*)
213		*(COMMON)
214		. = ALIGN(8);
215		__bss_end = .;
216	}
217
218	.heap1 (NOLOAD) : {
219		/*
220		 * We're keeping track of the padding added before the
221		 * .nozi section so we can do something useful with
222		 * this otherwise wasted memory.
223		 */
224		__heap1_start = .;
225#ifndef CFG_WITH_PAGER
226		. += CFG_CORE_HEAP_SIZE;
227#endif
228		. = ALIGN(16 * 1024);
229		__heap1_end = .;
230	}
231
232	/*
233	 * Uninitialized data that shouldn't be zero initialized at
234	 * runtime.
235	 *
236	 * L1 mmu table requires 16 KiB alignment
237	 */
238	.nozi (NOLOAD) : {
239		__nozi_start = .;
240		ASSERT(!(__nozi_start & (16 * 1024 - 1)), "align nozi to 16kB");
241
242		KEEP(*(.nozi .nozi.*))
243		. = ALIGN(16);
244		__nozi_end = .;
245		__nozi_stack_start = .;
246		KEEP(*(.nozi_stack .nozi_stack.*))
247		. = ALIGN(8);
248		__nozi_stack_end = .;
249	}
250
251#ifdef CFG_WITH_PAGER
252	.heap2 (NOLOAD) : {
253		__heap2_start = .;
254		/*
255		 * Reserve additional memory for heap, the total should be
256		 * at least CFG_CORE_HEAP_SIZE, but count what has already
257		 * been reserved in .heap1
258		 */
259		. += CFG_CORE_HEAP_SIZE - (__heap1_end - __heap1_start);
260		. = ALIGN(SMALL_PAGE_SIZE);
261		__heap2_end = .;
262	}
263
264	/* Start page aligned read-only memory */
265	__flatmap_unpg_rw_size = . - __flatmap_unpg_rw_start;
266
267	__init_start = .;
268	__flatmap_init_rx_start = .;
269
270	ASSERT(!(__flatmap_init_rx_start & (SMALL_PAGE_SIZE - 1)),
271		"read-write memory is not paged aligned")
272
273	.text_init : {
274/*
275 * Include list of sections needed for boot initialization, this list
276 * overlaps with unpaged.ld.S but since unpaged.ld.S is first all those
277 * sections will go into the unpaged area.
278 */
279#include <text_init.ld.S>
280		KEEP(*(.text.startup.*));
281		/* Make sure constructor functions are available during init */
282		KEEP(*(.text._GLOBAL__sub_*));
283		. = ALIGN(8);
284	}
285
286#ifdef CFG_CORE_RODATA_NOEXEC
287	. = ALIGN(SMALL_PAGE_SIZE);
288#endif
289	__flatmap_init_rx_size = . - __flatmap_init_rx_start;
290	__flatmap_init_ro_start = .;
291
292	.rodata_init : {
293#include <rodata_init.ld.S>
294
295		. = ALIGN(8);
296		KEEP(*(SORT(.scattered_array*)));
297
298		. = ALIGN(8);
299		__rodata_init_end = .;
300	}
301	__rodata_init_end = .;
302
303	__init_end = ROUNDUP(__rodata_init_end, SMALL_PAGE_SIZE);
304	__init_size = __init_end - __init_start;
305
306	/* vcore flat map stops here. No need to page align, rodata follows. */
307	__flatmap_init_ro_size = __init_end - __flatmap_init_ro_start;
308
309	.rodata_pageable : ALIGN(8) {
310#ifdef CFG_DT
311		__rodata_dtdrv_start = .;
312		KEEP(*(.rodata.dtdrv))
313		__rodata_dtdrv_end = .;
314#endif
315#ifdef CFG_EARLY_TA
316		. = ALIGN(8);
317		__rodata_early_ta_start = .;
318		KEEP(*(.rodata.early_ta))
319		__rodata_early_ta_end = .;
320#endif
321		*(.rodata*)
322	}
323
324#ifdef CFG_CORE_RODATA_NOEXEC
325	. = ALIGN(SMALL_PAGE_SIZE);
326#endif
327
328	.text_pageable : ALIGN(8) {
329		*(.text*)
330		. = ALIGN(SMALL_PAGE_SIZE);
331	}
332
333	__pageable_part_end = .;
334	__pageable_part_start = __init_end;
335	__pageable_start = __init_start;
336	__pageable_end = __pageable_part_end;
337
338	/*
339	 * Assign a safe spot to store the hashes of the pages before
340	 * heap is initialized.
341	 */
342	__tmp_hashes_start = __init_end;
343	__tmp_hashes_size = ((__pageable_end - __pageable_start) /
344				SMALL_PAGE_SIZE) * 32;
345	__tmp_hashes_end = __tmp_hashes_start + __tmp_hashes_size;
346
347	__init_mem_usage = __tmp_hashes_end - TEE_TEXT_VA_START;
348
349	ASSERT(TEE_LOAD_ADDR >= TEE_RAM_START,
350		"Load address before start of physical memory")
351	ASSERT(TEE_LOAD_ADDR < (TEE_RAM_START + TEE_RAM_PH_SIZE),
352		"Load address after end of physical memory")
353	ASSERT(__tmp_hashes_end < (TEE_RAM_VA_START + TEE_RAM_PH_SIZE),
354		"OP-TEE can't fit init part into available physical memory")
355	ASSERT((TEE_RAM_VA_START + TEE_RAM_PH_SIZE - __init_end) >
356		SMALL_PAGE_SIZE, "Too few free pages to initialize paging")
357
358
359#endif /*CFG_WITH_PAGER*/
360
361#ifdef CFG_CORE_SANITIZE_KADDRESS
362	. = TEE_RAM_VA_START + (TEE_RAM_VA_SIZE * 8) / 9 - 8;
363	. = ALIGN(8);
364	.asan_shadow : {
365		__asan_shadow_start = .;
366		. += TEE_RAM_VA_SIZE / 9;
367		__asan_shadow_end = .;
368		__asan_shadow_size = __asan_shadow_end - __asan_shadow_start;
369	}
370#endif /*CFG_CORE_SANITIZE_KADDRESS*/
371
372	__end = .;
373
374#ifndef CFG_WITH_PAGER
375	__init_size = __data_end - TEE_TEXT_VA_START;
376	__init_mem_usage = __end - TEE_TEXT_VA_START;
377#endif
378	/*
379	 * Guard against moving the location counter backwards in the assignment
380	 * below.
381	 */
382	ASSERT(. <= (TEE_RAM_VA_START + TEE_RAM_VA_SIZE),
383		"TEE_RAM_VA_SIZE is too small")
384	. = TEE_RAM_VA_START + TEE_RAM_VA_SIZE;
385
386	_end_of_ram = .;
387
388#ifndef CFG_WITH_PAGER
389	__flatmap_unpg_rw_size = _end_of_ram - __flatmap_unpg_rw_start;
390#endif
391
392	/DISCARD/ : {
393		/* Strip unnecessary stuff */
394		*(.comment .note .eh_frame)
395		/* Strip meta variables */
396		*(__keep_meta_vars*)
397	}
398
399}
400
401/* Unpaged read-only memories */
402__vcore_unpg_rx_start = __flatmap_unpg_rx_start;
403__vcore_unpg_ro_start = __flatmap_unpg_ro_start;
404#ifdef CFG_CORE_RODATA_NOEXEC
405__vcore_unpg_rx_size = __flatmap_unpg_rx_size;
406__vcore_unpg_ro_size = __flatmap_unpg_ro_size;
407#else
408__vcore_unpg_rx_size = __flatmap_unpg_rx_size + __flatmap_unpg_ro_size;
409__vcore_unpg_ro_size = 0;
410#endif
411
412/* Unpaged read-write memory */
413__vcore_unpg_rw_start = __flatmap_unpg_rw_start;
414__vcore_unpg_rw_size = __flatmap_unpg_rw_size;
415
416#ifdef CFG_WITH_PAGER
417/*
418 * Core init mapping shall cover up to end of the physical RAM.
419 * This is required since the hash table is appended to the
420 * binary data after the firmware build sequence.
421 */
422#define __FLATMAP_PAGER_TRAILING_SPACE	\
423	(TEE_RAM_START + TEE_RAM_PH_SIZE - \
424		(__flatmap_init_ro_start + __flatmap_init_ro_size))
425
426/* Paged/init read-only memories */
427__vcore_init_rx_start = __flatmap_init_rx_start;
428__vcore_init_ro_start = __flatmap_init_ro_start;
429#ifdef CFG_CORE_RODATA_NOEXEC
430__vcore_init_rx_size = __flatmap_init_rx_size;
431__vcore_init_ro_size = __flatmap_init_ro_size + __FLATMAP_PAGER_TRAILING_SPACE;
432#else
433__vcore_init_rx_size = __flatmap_init_rx_size + __flatmap_init_ro_size +
434		       __FLATMAP_PAGER_TRAILING_SPACE;
435__vcore_init_ro_size = 0;
436#endif /* CFG_CORE_RODATA_NOEXEC */
437#endif /* CFG_WITH_PAGER */
438
439#ifdef CFG_CORE_SANITIZE_KADDRESS
440__asan_map_start = (__asan_shadow_start / SMALL_PAGE_SIZE) *
441		   SMALL_PAGE_SIZE;
442__asan_map_end = ((__asan_shadow_end - 1) / SMALL_PAGE_SIZE) *
443		 SMALL_PAGE_SIZE + SMALL_PAGE_SIZE;
444__asan_map_size = __asan_map_end - __asan_map_start;
445#endif /*CFG_CORE_SANITIZE_KADDRESS*/
446