xref: /optee_os/core/arch/arm/kernel/kern.ld.S (revision b3be2f66b22b7fceaeb67c58f07c18b1b0611191)
1/*
2 * Copyright (c) 2014, Linaro Limited
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
10 *
11 * 2. Redistributions in binary form must reproduce the above copyright notice,
12 * this list of conditions and the following disclaimer in the documentation
13 * and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25 * POSSIBILITY OF SUCH DAMAGE.
26 */
27
28/*
29 * Copyright (c) 2008-2010 Travis Geiselbrecht
30 *
31 * Permission is hereby granted, free of charge, to any person obtaining
32 * a copy of this software and associated documentation files
33 * (the "Software"), to deal in the Software without restriction,
34 * including without limitation the rights to use, copy, modify, merge,
35 * publish, distribute, sublicense, and/or sell copies of the Software,
36 * and to permit persons to whom the Software is furnished to do so,
37 * subject to the following conditions:
38 *
39 * The above copyright notice and this permission notice shall be
40 * included in all copies or substantial portions of the Software.
41 *
42 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
43 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
44 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
45 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
46 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
47 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
48 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
49 */
50
51#include <platform_config.h>
52
53#ifndef SMALL_PAGE_SIZE
54#define SMALL_PAGE_SIZE		4096
55#endif
56#ifndef ROUNDUP
57#define ROUNDUP(x, y)		((((x) + (y) - 1) / (y)) * (y))
58#define ROUNDDOWN(x, y)		(((x) / (y)) * (y))
59#endif
60
61OUTPUT_FORMAT(CFG_KERN_LINKER_FORMAT)
62OUTPUT_ARCH(CFG_KERN_LINKER_ARCH)
63
64ENTRY(_start)
65SECTIONS
66{
67	. = CFG_TEE_LOAD_ADDR;
68
69	__text_start = .;
70
71	/*
72	 * Memory between CFG_TEE_LOAD_ADDR and page aligned rounded down
73	 * value will be mapped with unpaged "text" section attributes:
74	 * likely to be read-only/executable.
75	 */
76	__flatmap_unpg_rx_start = ROUNDDOWN(__text_start, SMALL_PAGE_SIZE);
77
78	.text : {
79		KEEP(*(.text.boot.vectab1))
80		KEEP(*(.text.boot.vectab2))
81		KEEP(*(.text.boot))
82
83		. = ALIGN(8);
84		__initcall_start = .;
85		KEEP(*(.initcall1))
86		KEEP(*(.initcall2))
87		KEEP(*(.initcall3))
88		KEEP(*(.initcall4))
89		__initcall_end = .;
90
91#ifdef CFG_WITH_PAGER
92		*(.text)
93/* Include list of sections needed for paging */
94#include <text_unpaged.ld.S>
95#else
96		*(.text .text.*)
97#endif
98		*(.sram.text.glue_7* .gnu.linkonce.t.*)
99		. = ALIGN(8);
100	}
101	__text_end = .;
102
103#ifdef CFG_CORE_RODATA_NOEXEC
104	. = ALIGN(SMALL_PAGE_SIZE);
105#endif
106	__flatmap_unpg_rx_size = . - __flatmap_unpg_rx_start;
107	__flatmap_unpg_ro_start = .;
108
109	.rodata : ALIGN(8) {
110		__rodata_start = .;
111		*(.gnu.linkonce.r.*)
112#ifdef CFG_WITH_PAGER
113		*(.rodata .rodata.__unpaged)
114#include <rodata_unpaged.ld.S>
115#else
116#ifdef CFG_DT
117		__rodata_dtdrv_start = .;
118		KEEP(*(.rodata.dtdrv))
119		__rodata_dtdrv_end = .;
120#endif
121#ifdef CFG_EARLY_TA
122		. = ALIGN(8);
123		__rodata_early_ta_start = .;
124		KEEP(*(.rodata.early_ta))
125		__rodata_early_ta_end = .;
126#endif
127
128		*(.rodata .rodata.*)
129
130		/*
131		 * 8 to avoid unwanted padding between __start_ta_head_section
132		 * and the first structure in ta_head_section, in 64-bit
133		 * builds
134		 */
135		. = ALIGN(8);
136		__start_ta_head_section = . ;
137		KEEP(*(ta_head_section))
138		__stop_ta_head_section = . ;
139		. = ALIGN(8);
140		__start_phys_mem_map_section = . ;
141		KEEP(*(phys_mem_map_section))
142		__end_phys_mem_map_section = . ;
143		. = ALIGN(8);
144		__start_phys_sdp_mem_section = . ;
145		KEEP(*(phys_sdp_mem_section))
146		__end_phys_sdp_mem_section = . ;
147		. = ALIGN(8);
148		__start_phys_nsec_ddr_section = . ;
149		KEEP(*(phys_nsec_ddr_section))
150		__end_phys_nsec_ddr_section = . ;
151#endif
152		. = ALIGN(8);
153		__rodata_end = .;
154	}
155
156	.interp : { *(.interp) }
157	.hash : { *(.hash) }
158	.dynsym : { *(.dynsym) }
159	.dynstr : { *(.dynstr) }
160	.rel.text : { *(.rel.text) *(.rel.gnu.linkonce.t*) }
161	.rela.text : { *(.rela.text) *(.rela.gnu.linkonce.t*) }
162	.rel.data : { *(.rel.data) *(.rel.gnu.linkonce.d*) }
163	.rela.data : { *(.rela.data) *(.rela.gnu.linkonce.d*) }
164	.rel.rodata : { *(.rel.rodata) *(.rel.gnu.linkonce.r*) }
165	.rela.rodata : { *(.rela.rodata) *(.rela.gnu.linkonce.r*) }
166	.rel.got : { *(.rel.got) }
167	.rela.got : { *(.rela.got) }
168	.rel.ctors : { *(.rel.ctors) }
169	.rela.ctors : { *(.rela.ctors) }
170	.rel.dtors : { *(.rel.dtors) }
171	.rela.dtors : { *(.rela.dtors) }
172	.rel.init : { *(.rel.init) }
173	.rela.init : { *(.rela.init) }
174	.rel.fini : { *(.rel.fini) }
175	.rela.fini : { *(.rela.fini) }
176	.rel.bss : { *(.rel.bss) }
177	.rela.bss : { *(.rela.bss) }
178	.rel.plt : { *(.rel.plt) }
179	.rela.plt : { *(.rela.plt) }
180	.init : { *(.init) } =0x9090
181	.plt : { *(.plt) }
182
183	/* .ARM.exidx is sorted, so has to go in its own output section.  */
184	.ARM.exidx : {
185		__exidx_start = .;
186		*(.ARM.exidx* .gnu.linkonce.armexidx.*)
187		__exidx_end = .;
188	}
189
190	.ARM.extab : {
191		__extab_start = .;
192		*(.ARM.extab*)
193		__extab_end = .;
194	}
195
196	/* Start page aligned read-write memory */
197#ifdef CFG_CORE_RWDATA_NOEXEC
198	. = ALIGN(SMALL_PAGE_SIZE);
199#endif
200	__flatmap_unpg_ro_size = . - __flatmap_unpg_ro_start;
201	__flatmap_unpg_rw_start = .;
202
203	.data : ALIGN(8) {
204		/* writable data  */
205		__data_start_rom = .;
206		/* in one segment binaries, the rom data address is on top
207		   of the ram data address */
208		__data_start = .;
209		*(.data .data.* .gnu.linkonce.d.*)
210		. = ALIGN(8);
211	}
212
213	.ctors : ALIGN(8) {
214		__ctor_list = .;
215		KEEP(*(.ctors .ctors.* .init_array .init_array.*))
216		__ctor_end = .;
217	}
218	.dtors : ALIGN(8) {
219		__dtor_list = .;
220		KEEP(*(.dtors .dtors.* .fini_array .fini_array.*))
221		__dtor_end = .;
222	}
223	.got : { *(.got.plt) *(.got) }
224	.dynamic : { *(.dynamic) }
225
226	/* unintialized data */
227	.bss : {
228		__data_end = .;
229		__bss_start = .;
230		*(.bss .bss.*)
231		*(.gnu.linkonce.b.*)
232		*(COMMON)
233		. = ALIGN(8);
234		__bss_end = .;
235	}
236
237	.heap1 (NOLOAD) : {
238		/*
239		 * We're keeping track of the padding added before the
240		 * .nozi section so we can do something useful with
241		 * this otherwise wasted memory.
242		 */
243		__heap1_start = .;
244#ifndef CFG_WITH_PAGER
245		. += CFG_CORE_HEAP_SIZE;
246#endif
247		. = ALIGN(16 * 1024);
248		__heap1_end = .;
249	}
250
251	/*
252	 * Uninitialized data that shouldn't be zero initialized at
253	 * runtime.
254	 *
255	 * L1 mmu table requires 16 KiB alignment
256	 */
257	.nozi (NOLOAD) : {
258		__nozi_start = .;
259		ASSERT(!(__nozi_start & (16 * 1024 - 1)), "align nozi to 16kB");
260
261		KEEP(*(.nozi .nozi.*))
262		. = ALIGN(16);
263		__nozi_end = .;
264		__nozi_stack_start = .;
265		KEEP(*(.nozi_stack))
266		. = ALIGN(8);
267		__nozi_stack_end = .;
268	}
269
270#ifdef CFG_WITH_PAGER
271	.heap2 (NOLOAD) : {
272		__heap2_start = .;
273		/*
274		 * Reserve additional memory for heap, the total should be
275		 * at least CFG_CORE_HEAP_SIZE, but count what has already
276		 * been reserved in .heap1
277		 */
278		. += CFG_CORE_HEAP_SIZE - (__heap1_end - __heap1_start);
279		. = ALIGN(SMALL_PAGE_SIZE);
280		__heap2_end = .;
281	}
282
283	/* Start page aligned read-only memory */
284	__flatmap_unpg_rw_size = . - __flatmap_unpg_rw_start;
285
286	__init_start = .;
287	__flatmap_init_rx_start = .;
288
289	ASSERT(!(__flatmap_init_rx_start & (SMALL_PAGE_SIZE - 1)),
290		"read-write memory is not paged aligned")
291
292	.text_init : {
293/*
294 * Include list of sections needed for boot initialization, this list
295 * overlaps with unpaged.ld.S but since unpaged.ld.S is first all those
296 * sections will go into the unpaged area.
297 */
298#include <text_init.ld.S>
299		. = ALIGN(8);
300	}
301
302#ifdef CFG_CORE_RODATA_NOEXEC
303	. = ALIGN(SMALL_PAGE_SIZE);
304#endif
305	__flatmap_init_rx_size = . - __flatmap_init_rx_start;
306	__flatmap_init_ro_start = .;
307
308	.rodata_init : {
309#include <rodata_init.ld.S>
310		. = ALIGN(8);
311		__start_phys_mem_map_section = . ;
312		KEEP(*(phys_mem_map_section))
313		__end_phys_mem_map_section = . ;
314		. = ALIGN(8);
315		__start_phys_sdp_mem_section = . ;
316		KEEP(*(phys_sdp_mem_section))
317		__end_phys_sdp_mem_section = . ;
318		. = ALIGN(8);
319		__start_phys_nsec_ddr_section = . ;
320		KEEP(*(phys_nsec_ddr_section))
321		__end_phys_nsec_ddr_section = . ;
322		. = ALIGN(8);
323		__rodata_init_end = .;
324	}
325	__rodata_init_end = .;
326
327	__init_end = ROUNDUP(__rodata_init_end, SMALL_PAGE_SIZE);
328	__init_size = __init_end - __init_start;
329
330	/* vcore flat map stops here. No need to page align, rodata follows. */
331	__flatmap_init_ro_size = __init_end - __flatmap_init_ro_start;
332
333	.rodata_pageable : ALIGN(8) {
334#ifdef CFG_DT
335		__rodata_dtdrv_start = .;
336		KEEP(*(.rodata.dtdrv))
337		__rodata_dtdrv_end = .;
338#endif
339#ifdef CFG_EARLY_TA
340		. = ALIGN(8);
341		__rodata_early_ta_start = .;
342		KEEP(*(.rodata.early_ta))
343		__rodata_early_ta_end = .;
344#endif
345		*(.rodata*)
346		/*
347		 * 8 to avoid unwanted padding between __start_ta_head_section
348		 * and the first structure in ta_head_section, in 64-bit
349		 * builds
350		 */
351		. = ALIGN(8);
352		__start_ta_head_section = . ;
353		KEEP(*(ta_head_section))
354		__stop_ta_head_section = . ;
355	}
356
357#ifdef CFG_CORE_RODATA_NOEXEC
358	. = ALIGN(SMALL_PAGE_SIZE);
359#endif
360
361	.text_pageable : ALIGN(8) {
362		*(.text*)
363		. = ALIGN(SMALL_PAGE_SIZE);
364	}
365
366	__pageable_part_end = .;
367	__pageable_part_start = __init_end;
368	__pageable_start = __init_start;
369	__pageable_end = __pageable_part_end;
370
371	/*
372	 * Assign a safe spot to store the hashes of the pages before
373	 * heap is initialized.
374	 */
375	__tmp_hashes_start = __init_end;
376	__tmp_hashes_size = ((__pageable_end - __pageable_start) /
377				SMALL_PAGE_SIZE) * 32;
378	__tmp_hashes_end = __tmp_hashes_start + __tmp_hashes_size;
379
380	__init_mem_usage = __tmp_hashes_end - CFG_TEE_LOAD_ADDR;
381
382	ASSERT(CFG_TEE_LOAD_ADDR >= CFG_TEE_RAM_START,
383		"Load address before start of physical memory")
384	ASSERT(CFG_TEE_LOAD_ADDR < (CFG_TEE_RAM_START + CFG_TEE_RAM_PH_SIZE),
385		"Load address after end of physical memory")
386	ASSERT(__tmp_hashes_end < (CFG_TEE_RAM_START + CFG_TEE_RAM_PH_SIZE),
387		"OP-TEE can't fit init part into available physical memory")
388	ASSERT((CFG_TEE_RAM_START + CFG_TEE_RAM_PH_SIZE - __init_end) >
389		SMALL_PAGE_SIZE, "Too few free pages to initialize paging")
390
391
392#endif /*CFG_WITH_PAGER*/
393
394#ifdef CFG_CORE_SANITIZE_KADDRESS
395	. = CFG_TEE_RAM_START + (CFG_TEE_RAM_VA_SIZE * 8) / 9 - 8;
396	. = ALIGN(8);
397	.asan_shadow : {
398		__asan_shadow_start = .;
399		. += CFG_TEE_RAM_VA_SIZE / 9;
400		__asan_shadow_end = .;
401	}
402#endif /*CFG_CORE_SANITIZE_KADDRESS*/
403
404	__end = .;
405
406#ifndef CFG_WITH_PAGER
407	__init_size = __data_end - CFG_TEE_LOAD_ADDR;
408	__init_mem_usage = __end - CFG_TEE_LOAD_ADDR;
409#endif
410	/*
411	 * Guard against moving the location counter backwards in the assignment
412	 * below.
413	 */
414	ASSERT(. <= (CFG_TEE_RAM_START + CFG_TEE_RAM_VA_SIZE),
415		"CFG_TEE_RAM_VA_SIZE is too small")
416	. = CFG_TEE_RAM_START + CFG_TEE_RAM_VA_SIZE;
417
418	_end_of_ram = .;
419
420#ifndef CFG_WITH_PAGER
421	__flatmap_unpg_rw_size = _end_of_ram - __flatmap_unpg_rw_start;
422#endif
423
424	/DISCARD/ : {
425		/* Strip unnecessary stuff */
426		*(.comment .note .eh_frame)
427		/* Strip meta variables */
428		*(__keep_meta_vars*)
429	}
430
431}
432
433/* Unpaged read-only memories */
434PROVIDE(__vcore_unpg_rx_start = __flatmap_unpg_rx_start);
435PROVIDE(__vcore_unpg_ro_start = __flatmap_unpg_ro_start);
436#ifdef CFG_CORE_RODATA_NOEXEC
437PROVIDE(__vcore_unpg_rx_size = __flatmap_unpg_rx_size);
438PROVIDE(__vcore_unpg_ro_size = __flatmap_unpg_ro_size);
439#else
440PROVIDE(__vcore_unpg_rx_size = __flatmap_unpg_rx_size +
441				__flatmap_unpg_ro_size);
442PROVIDE(__vcore_unpg_ro_size = 0);
443#endif
444
445/* Unpaged read-write memory */
446PROVIDE(__vcore_unpg_rw_start = __flatmap_unpg_rw_start);
447PROVIDE(__vcore_unpg_rw_size = __flatmap_unpg_rw_size);
448
449#ifdef CFG_WITH_PAGER
450/*
451 * Core init mapping shall cover up to end of the physical RAM.
452 * This is required since the hash table is appended to the
453 * binary data after the firmware build sequence.
454 */
455#define __FLATMAP_PAGER_TRAILING_SPACE	\
456	(CFG_TEE_RAM_START + CFG_TEE_RAM_PH_SIZE - \
457		(__flatmap_init_ro_start + __flatmap_init_ro_size))
458
459/* Paged/init read-only memories */
460PROVIDE(__vcore_init_rx_start = __flatmap_init_rx_start);
461PROVIDE(__vcore_init_ro_start = __flatmap_init_ro_start);
462#ifdef CFG_CORE_RODATA_NOEXEC
463PROVIDE(__vcore_init_rx_size = __flatmap_init_rx_size);
464PROVIDE(__vcore_init_ro_size = __flatmap_init_ro_size +
465				__FLATMAP_PAGER_TRAILING_SPACE);
466#else
467PROVIDE(__vcore_init_rx_size = __flatmap_init_rx_size +
468				__flatmap_init_ro_size +
469				__FLATMAP_PAGER_TRAILING_SPACE);
470PROVIDE(__vcore_init_ro_size = 0);
471#endif /* CFG_CORE_RODATA_NOEXEC */
472#endif /* CFG_WITH_PAGER */
473