1/* 2 * Copyright (c) 2014, Linaro Limited 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, 9 * this list of conditions and the following disclaimer. 10 * 11 * 2. Redistributions in binary form must reproduce the above copyright notice, 12 * this list of conditions and the following disclaimer in the documentation 13 * and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28/* 29 * Copyright (c) 2008-2010 Travis Geiselbrecht 30 * 31 * Permission is hereby granted, free of charge, to any person obtaining 32 * a copy of this software and associated documentation files 33 * (the "Software"), to deal in the Software without restriction, 34 * including without limitation the rights to use, copy, modify, merge, 35 * publish, distribute, sublicense, and/or sell copies of the Software, 36 * and to permit persons to whom the Software is furnished to do so, 37 * subject to the following conditions: 38 * 39 * The above copyright notice and this permission notice shall be 40 * included in all copies or substantial portions of the Software. 41 * 42 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 43 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 44 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 45 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY 46 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 47 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 48 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 49 */ 50 51#include <platform_config.h> 52 53#ifndef SMALL_PAGE_SIZE 54#define SMALL_PAGE_SIZE 4096 55#endif 56#ifndef ROUNDUP 57#define ROUNDUP(x, y) ((((x) + (y) - 1) / (y)) * (y)) 58#define ROUNDDOWN(x, y) (((x) / (y)) * (y)) 59#endif 60 61/* 62 * TEE_RAM_VA_START: The start virtual address of the TEE RAM 63 * TEE_TEXT_VA_START: The start virtual address of the OP-TEE text 64 */ 65#define TEE_RAM_VA_START CFG_TEE_RAM_START 66#define TEE_TEXT_VA_START (TEE_RAM_VA_START + \ 67 (CFG_TEE_LOAD_ADDR - CFG_TEE_RAM_START)) 68 69OUTPUT_FORMAT(CFG_KERN_LINKER_FORMAT) 70OUTPUT_ARCH(CFG_KERN_LINKER_ARCH) 71 72ENTRY(_start) 73SECTIONS 74{ 75 . = TEE_TEXT_VA_START; 76#ifdef ARM32 77 ASSERT(!(TEE_TEXT_VA_START & 31), "text start should align to 32bytes") 78#endif 79#ifdef ARM64 80 ASSERT(!(TEE_TEXT_VA_START & 127), "text start should align to 128bytes") 81#endif 82 __text_start = .; 83 84 /* 85 * Memory between TEE_TEXT_VA_START and page aligned rounded down 86 * value will be mapped with unpaged "text" section attributes: 87 * likely to be read-only/executable. 88 */ 89 __flatmap_unpg_rx_start = ROUNDDOWN(__text_start, SMALL_PAGE_SIZE); 90 91 .text : { 92 KEEP(*(.text.boot.vectab1)) 93 KEEP(*(.text.boot.vectab2)) 94 KEEP(*(.text.boot)) 95 96 . = ALIGN(8); 97 __initcall_start = .; 98 KEEP(*(.initcall1)) 99 KEEP(*(.initcall2)) 100 KEEP(*(.initcall3)) 101 KEEP(*(.initcall4)) 102 __initcall_end = .; 103 104#ifdef CFG_WITH_PAGER 105 *(.text) 106/* Include list of sections needed for paging */ 107#include <text_unpaged.ld.S> 108#else 109 *(.text .text.*) 110#endif 111 *(.sram.text.glue_7* .gnu.linkonce.t.*) 112 . = ALIGN(8); 113 } 114 __text_end = .; 115 116#ifdef CFG_CORE_RODATA_NOEXEC 117 . = ALIGN(SMALL_PAGE_SIZE); 118#endif 119 __flatmap_unpg_rx_size = . - __flatmap_unpg_rx_start; 120 __flatmap_unpg_ro_start = .; 121 122 .rodata : ALIGN(8) { 123 __rodata_start = .; 124 *(.gnu.linkonce.r.*) 125#ifdef CFG_WITH_PAGER 126 *(.rodata .rodata.__unpaged) 127#include <rodata_unpaged.ld.S> 128#else 129#ifdef CFG_DT 130 __rodata_dtdrv_start = .; 131 KEEP(*(.rodata.dtdrv)) 132 __rodata_dtdrv_end = .; 133#endif 134#ifdef CFG_EARLY_TA 135 . = ALIGN(8); 136 __rodata_early_ta_start = .; 137 KEEP(*(.rodata.early_ta)) 138 __rodata_early_ta_end = .; 139#endif 140 141 *(.rodata .rodata.*) 142 143 /* 144 * 8 to avoid unwanted padding between __start_ta_head_section 145 * and the first structure in ta_head_section, in 64-bit 146 * builds 147 */ 148 . = ALIGN(8); 149 __start_ta_head_section = . ; 150 KEEP(*(ta_head_section)) 151 __stop_ta_head_section = . ; 152 . = ALIGN(8); 153 __start_phys_mem_map_section = . ; 154 KEEP(*(phys_mem_map_section)) 155 __end_phys_mem_map_section = . ; 156 . = ALIGN(8); 157 __start_phys_sdp_mem_section = . ; 158 KEEP(*(phys_sdp_mem_section)) 159 __end_phys_sdp_mem_section = . ; 160 . = ALIGN(8); 161 __start_phys_nsec_ddr_section = . ; 162 KEEP(*(phys_nsec_ddr_section)) 163 __end_phys_nsec_ddr_section = . ; 164#endif 165 . = ALIGN(8); 166 __rodata_end = .; 167 } 168 169 .interp : { *(.interp) } 170 .hash : { *(.hash) } 171 .dynsym : { *(.dynsym) } 172 .dynstr : { *(.dynstr) } 173 .rel.text : { *(.rel.text) *(.rel.gnu.linkonce.t*) } 174 .rela.text : { *(.rela.text) *(.rela.gnu.linkonce.t*) } 175 .rel.data : { *(.rel.data) *(.rel.gnu.linkonce.d*) } 176 .rela.data : { *(.rela.data) *(.rela.gnu.linkonce.d*) } 177 .rel.rodata : { *(.rel.rodata) *(.rel.gnu.linkonce.r*) } 178 .rela.rodata : { *(.rela.rodata) *(.rela.gnu.linkonce.r*) } 179 .rel.got : { *(.rel.got) } 180 .rela.got : { *(.rela.got) } 181 .rel.ctors : { *(.rel.ctors) } 182 .rela.ctors : { *(.rela.ctors) } 183 .rel.dtors : { *(.rel.dtors) } 184 .rela.dtors : { *(.rela.dtors) } 185 .rel.init : { *(.rel.init) } 186 .rela.init : { *(.rela.init) } 187 .rel.fini : { *(.rel.fini) } 188 .rela.fini : { *(.rela.fini) } 189 .rel.bss : { *(.rel.bss) } 190 .rela.bss : { *(.rela.bss) } 191 .rel.plt : { *(.rel.plt) } 192 .rela.plt : { *(.rela.plt) } 193 .init : { *(.init) } =0x9090 194 .plt : { *(.plt) } 195 196 /* .ARM.exidx is sorted, so has to go in its own output section. */ 197 .ARM.exidx : { 198 __exidx_start = .; 199 *(.ARM.exidx* .gnu.linkonce.armexidx.*) 200 __exidx_end = .; 201 } 202 203 .ARM.extab : { 204 __extab_start = .; 205 *(.ARM.extab*) 206 __extab_end = .; 207 } 208 209 /* Start page aligned read-write memory */ 210#ifdef CFG_CORE_RWDATA_NOEXEC 211 . = ALIGN(SMALL_PAGE_SIZE); 212#endif 213 __flatmap_unpg_ro_size = . - __flatmap_unpg_ro_start; 214 __flatmap_unpg_rw_start = .; 215 216 .data : ALIGN(8) { 217 /* writable data */ 218 __data_start_rom = .; 219 /* in one segment binaries, the rom data address is on top 220 of the ram data address */ 221 __data_start = .; 222 *(.data .data.* .gnu.linkonce.d.*) 223 . = ALIGN(8); 224 } 225 226 .ctors : ALIGN(8) { 227 __ctor_list = .; 228 KEEP(*(.ctors .ctors.* .init_array .init_array.*)) 229 __ctor_end = .; 230 } 231 .dtors : ALIGN(8) { 232 __dtor_list = .; 233 KEEP(*(.dtors .dtors.* .fini_array .fini_array.*)) 234 __dtor_end = .; 235 } 236 .got : { *(.got.plt) *(.got) } 237 .dynamic : { *(.dynamic) } 238 239 /* unintialized data */ 240 .bss : { 241 __data_end = .; 242 __bss_start = .; 243 *(.bss .bss.*) 244 *(.gnu.linkonce.b.*) 245 *(COMMON) 246 . = ALIGN(8); 247 __bss_end = .; 248 } 249 250 .heap1 (NOLOAD) : { 251 /* 252 * We're keeping track of the padding added before the 253 * .nozi section so we can do something useful with 254 * this otherwise wasted memory. 255 */ 256 __heap1_start = .; 257#ifndef CFG_WITH_PAGER 258 . += CFG_CORE_HEAP_SIZE; 259#endif 260 . = ALIGN(16 * 1024); 261 __heap1_end = .; 262 } 263 264 /* 265 * Uninitialized data that shouldn't be zero initialized at 266 * runtime. 267 * 268 * L1 mmu table requires 16 KiB alignment 269 */ 270 .nozi (NOLOAD) : { 271 __nozi_start = .; 272 ASSERT(!(__nozi_start & (16 * 1024 - 1)), "align nozi to 16kB"); 273 274 KEEP(*(.nozi .nozi.*)) 275 . = ALIGN(16); 276 __nozi_end = .; 277 __nozi_stack_start = .; 278 KEEP(*(.nozi_stack)) 279 . = ALIGN(8); 280 __nozi_stack_end = .; 281 } 282 283#ifdef CFG_WITH_PAGER 284 .heap2 (NOLOAD) : { 285 __heap2_start = .; 286 /* 287 * Reserve additional memory for heap, the total should be 288 * at least CFG_CORE_HEAP_SIZE, but count what has already 289 * been reserved in .heap1 290 */ 291 . += CFG_CORE_HEAP_SIZE - (__heap1_end - __heap1_start); 292 . = ALIGN(SMALL_PAGE_SIZE); 293 __heap2_end = .; 294 } 295 296 /* Start page aligned read-only memory */ 297 __flatmap_unpg_rw_size = . - __flatmap_unpg_rw_start; 298 299 __init_start = .; 300 __flatmap_init_rx_start = .; 301 302 ASSERT(!(__flatmap_init_rx_start & (SMALL_PAGE_SIZE - 1)), 303 "read-write memory is not paged aligned") 304 305 .text_init : { 306/* 307 * Include list of sections needed for boot initialization, this list 308 * overlaps with unpaged.ld.S but since unpaged.ld.S is first all those 309 * sections will go into the unpaged area. 310 */ 311#include <text_init.ld.S> 312 . = ALIGN(8); 313 } 314 315#ifdef CFG_CORE_RODATA_NOEXEC 316 . = ALIGN(SMALL_PAGE_SIZE); 317#endif 318 __flatmap_init_rx_size = . - __flatmap_init_rx_start; 319 __flatmap_init_ro_start = .; 320 321 .rodata_init : { 322#include <rodata_init.ld.S> 323 . = ALIGN(8); 324 __start_phys_mem_map_section = . ; 325 KEEP(*(phys_mem_map_section)) 326 __end_phys_mem_map_section = . ; 327 . = ALIGN(8); 328 __start_phys_sdp_mem_section = . ; 329 KEEP(*(phys_sdp_mem_section)) 330 __end_phys_sdp_mem_section = . ; 331 . = ALIGN(8); 332 __start_phys_nsec_ddr_section = . ; 333 KEEP(*(phys_nsec_ddr_section)) 334 __end_phys_nsec_ddr_section = . ; 335 . = ALIGN(8); 336 __rodata_init_end = .; 337 } 338 __rodata_init_end = .; 339 340 __init_end = ROUNDUP(__rodata_init_end, SMALL_PAGE_SIZE); 341 __init_size = __init_end - __init_start; 342 343 /* vcore flat map stops here. No need to page align, rodata follows. */ 344 __flatmap_init_ro_size = __init_end - __flatmap_init_ro_start; 345 346 .rodata_pageable : ALIGN(8) { 347#ifdef CFG_DT 348 __rodata_dtdrv_start = .; 349 KEEP(*(.rodata.dtdrv)) 350 __rodata_dtdrv_end = .; 351#endif 352#ifdef CFG_EARLY_TA 353 . = ALIGN(8); 354 __rodata_early_ta_start = .; 355 KEEP(*(.rodata.early_ta)) 356 __rodata_early_ta_end = .; 357#endif 358 *(.rodata*) 359 /* 360 * 8 to avoid unwanted padding between __start_ta_head_section 361 * and the first structure in ta_head_section, in 64-bit 362 * builds 363 */ 364 . = ALIGN(8); 365 __start_ta_head_section = . ; 366 KEEP(*(ta_head_section)) 367 __stop_ta_head_section = . ; 368 } 369 370#ifdef CFG_CORE_RODATA_NOEXEC 371 . = ALIGN(SMALL_PAGE_SIZE); 372#endif 373 374 .text_pageable : ALIGN(8) { 375 *(.text*) 376 . = ALIGN(SMALL_PAGE_SIZE); 377 } 378 379 __pageable_part_end = .; 380 __pageable_part_start = __init_end; 381 __pageable_start = __init_start; 382 __pageable_end = __pageable_part_end; 383 384 /* 385 * Assign a safe spot to store the hashes of the pages before 386 * heap is initialized. 387 */ 388 __tmp_hashes_start = __init_end; 389 __tmp_hashes_size = ((__pageable_end - __pageable_start) / 390 SMALL_PAGE_SIZE) * 32; 391 __tmp_hashes_end = __tmp_hashes_start + __tmp_hashes_size; 392 393 __init_mem_usage = __tmp_hashes_end - TEE_TEXT_VA_START; 394 395 ASSERT(CFG_TEE_LOAD_ADDR >= CFG_TEE_RAM_START, 396 "Load address before start of physical memory") 397 ASSERT(CFG_TEE_LOAD_ADDR < (CFG_TEE_RAM_START + CFG_TEE_RAM_PH_SIZE), 398 "Load address after end of physical memory") 399 ASSERT(__tmp_hashes_end < (TEE_RAM_VA_START + CFG_TEE_RAM_PH_SIZE), 400 "OP-TEE can't fit init part into available physical memory") 401 ASSERT((TEE_RAM_VA_START + CFG_TEE_RAM_PH_SIZE - __init_end) > 402 SMALL_PAGE_SIZE, "Too few free pages to initialize paging") 403 404 405#endif /*CFG_WITH_PAGER*/ 406 407#ifdef CFG_CORE_SANITIZE_KADDRESS 408 . = TEE_RAM_VA_START + (CFG_TEE_RAM_VA_SIZE * 8) / 9 - 8; 409 . = ALIGN(8); 410 .asan_shadow : { 411 __asan_shadow_start = .; 412 . += CFG_TEE_RAM_VA_SIZE / 9; 413 __asan_shadow_end = .; 414 } 415#endif /*CFG_CORE_SANITIZE_KADDRESS*/ 416 417 __end = .; 418 419#ifndef CFG_WITH_PAGER 420 __init_size = __data_end - TEE_TEXT_VA_START; 421 __init_mem_usage = __end - TEE_TEXT_VA_START; 422#endif 423 /* 424 * Guard against moving the location counter backwards in the assignment 425 * below. 426 */ 427 ASSERT(. <= (TEE_RAM_VA_START + CFG_TEE_RAM_VA_SIZE), 428 "CFG_TEE_RAM_VA_SIZE is too small") 429 . = TEE_RAM_VA_START + CFG_TEE_RAM_VA_SIZE; 430 431 _end_of_ram = .; 432 433#ifndef CFG_WITH_PAGER 434 __flatmap_unpg_rw_size = _end_of_ram - __flatmap_unpg_rw_start; 435#endif 436 437 /DISCARD/ : { 438 /* Strip unnecessary stuff */ 439 *(.comment .note .eh_frame) 440 /* Strip meta variables */ 441 *(__keep_meta_vars*) 442 } 443 444} 445 446/* Unpaged read-only memories */ 447PROVIDE(__vcore_unpg_rx_start = __flatmap_unpg_rx_start); 448PROVIDE(__vcore_unpg_ro_start = __flatmap_unpg_ro_start); 449#ifdef CFG_CORE_RODATA_NOEXEC 450PROVIDE(__vcore_unpg_rx_size = __flatmap_unpg_rx_size); 451PROVIDE(__vcore_unpg_ro_size = __flatmap_unpg_ro_size); 452#else 453PROVIDE(__vcore_unpg_rx_size = __flatmap_unpg_rx_size + 454 __flatmap_unpg_ro_size); 455PROVIDE(__vcore_unpg_ro_size = 0); 456#endif 457 458/* Unpaged read-write memory */ 459PROVIDE(__vcore_unpg_rw_start = __flatmap_unpg_rw_start); 460PROVIDE(__vcore_unpg_rw_size = __flatmap_unpg_rw_size); 461 462#ifdef CFG_WITH_PAGER 463/* 464 * Core init mapping shall cover up to end of the physical RAM. 465 * This is required since the hash table is appended to the 466 * binary data after the firmware build sequence. 467 */ 468#define __FLATMAP_PAGER_TRAILING_SPACE \ 469 (CFG_TEE_RAM_START + CFG_TEE_RAM_PH_SIZE - \ 470 (__flatmap_init_ro_start + __flatmap_init_ro_size)) 471 472/* Paged/init read-only memories */ 473PROVIDE(__vcore_init_rx_start = __flatmap_init_rx_start); 474PROVIDE(__vcore_init_ro_start = __flatmap_init_ro_start); 475#ifdef CFG_CORE_RODATA_NOEXEC 476PROVIDE(__vcore_init_rx_size = __flatmap_init_rx_size); 477PROVIDE(__vcore_init_ro_size = __flatmap_init_ro_size + 478 __FLATMAP_PAGER_TRAILING_SPACE); 479#else 480PROVIDE(__vcore_init_rx_size = __flatmap_init_rx_size + 481 __flatmap_init_ro_size + 482 __FLATMAP_PAGER_TRAILING_SPACE); 483PROVIDE(__vcore_init_ro_size = 0); 484#endif /* CFG_CORE_RODATA_NOEXEC */ 485#endif /* CFG_WITH_PAGER */ 486