1/* SPDX-License-Identifier: (BSD-2-Clause AND MIT) */ 2/* 3 * Copyright (c) 2014, Linaro Limited 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright notice, 10 * this list of conditions and the following disclaimer. 11 * 12 * 2. Redistributions in binary form must reproduce the above copyright notice, 13 * this list of conditions and the following disclaimer in the documentation 14 * and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 20 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29/* 30 * Copyright (c) 2008-2010 Travis Geiselbrecht 31 * 32 * Permission is hereby granted, free of charge, to any person obtaining 33 * a copy of this software and associated documentation files 34 * (the "Software"), to deal in the Software without restriction, 35 * including without limitation the rights to use, copy, modify, merge, 36 * publish, distribute, sublicense, and/or sell copies of the Software, 37 * and to permit persons to whom the Software is furnished to do so, 38 * subject to the following conditions: 39 * 40 * The above copyright notice and this permission notice shall be 41 * included in all copies or substantial portions of the Software. 42 * 43 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 44 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 45 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 46 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY 47 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 48 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 49 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 50 */ 51 52#include <mm/core_mmu.h> 53#include <platform_config.h> 54#include <util.h> 55 56/* 57 * TEE_RAM_VA_START: The start virtual address of the TEE RAM 58 * TEE_TEXT_VA_START: The start virtual address of the OP-TEE text 59 */ 60#define TEE_RAM_VA_START TEE_RAM_START 61#define TEE_TEXT_VA_START (TEE_RAM_VA_START + \ 62 (TEE_LOAD_ADDR - TEE_RAM_START)) 63 64OUTPUT_FORMAT(CFG_KERN_LINKER_FORMAT) 65OUTPUT_ARCH(CFG_KERN_LINKER_ARCH) 66 67ENTRY(_start) 68SECTIONS 69{ 70 . = TEE_TEXT_VA_START; 71#ifdef ARM32 72 ASSERT(!(TEE_TEXT_VA_START & 31), "text start should align to 32bytes") 73#endif 74#ifdef ARM64 75 ASSERT(!(TEE_TEXT_VA_START & 127), "text start should align to 128bytes") 76#endif 77 __text_start = .; 78 79 /* 80 * Memory between TEE_TEXT_VA_START and page aligned rounded down 81 * value will be mapped with unpaged "text" section attributes: 82 * likely to be read-only/executable. 83 */ 84 __flatmap_unpg_rx_start = ROUNDDOWN(__text_start, SMALL_PAGE_SIZE); 85 86 .text : { 87 KEEP(*(.text._start)) 88 KEEP(*(.text.init .text.plat_cpu_reset_early \ 89 .text.reset .text.reset_primary .text.unhandled_cpu \ 90 .text.__assert_flat_mapped_range)) 91 92#ifdef CFG_WITH_PAGER 93 *(.text) 94/* Include list of sections needed for paging */ 95#include <text_unpaged.ld.S> 96#else 97 *(.text .text.*) 98#endif 99 *(.sram.text.glue_7* .gnu.linkonce.t.*) 100 . = ALIGN(8); 101 } 102 __text_end = .; 103 104#ifdef CFG_CORE_RODATA_NOEXEC 105 . = ALIGN(SMALL_PAGE_SIZE); 106#endif 107 __flatmap_unpg_rx_size = . - __flatmap_unpg_rx_start; 108 __flatmap_unpg_ro_start = .; 109 110 .rodata : ALIGN(8) { 111 __rodata_start = .; 112 *(.gnu.linkonce.r.*) 113#ifdef CFG_WITH_PAGER 114 *(.rodata .rodata.__unpaged) 115#include <rodata_unpaged.ld.S> 116#else 117#ifdef CFG_DT 118 __rodata_dtdrv_start = .; 119 KEEP(*(.rodata.dtdrv)) 120 __rodata_dtdrv_end = .; 121#endif 122#ifdef CFG_EARLY_TA 123 . = ALIGN(8); 124 __rodata_early_ta_start = .; 125 KEEP(*(.rodata.early_ta)) 126 __rodata_early_ta_end = .; 127#endif 128 129 *(.rodata .rodata.*) 130 131 /* 132 * 8 to avoid unwanted padding between __start_ta_head_section 133 * and the first structure in ta_head_section, in 64-bit 134 * builds 135 */ 136 . = ALIGN(8); 137 __start_ta_head_section = . ; 138 KEEP(*(ta_head_section)) 139 __stop_ta_head_section = . ; 140 . = ALIGN(8); 141 __start_phys_mem_map_section = . ; 142 KEEP(*(phys_mem_map_section)) 143 __end_phys_mem_map_section = . ; 144 . = ALIGN(8); 145 __start_phys_sdp_mem_section = . ; 146 KEEP(*(phys_sdp_mem_section)) 147 __end_phys_sdp_mem_section = . ; 148 . = ALIGN(8); 149 __start_phys_nsec_ddr_section = . ; 150 KEEP(*(phys_nsec_ddr_section)) 151 __end_phys_nsec_ddr_section = . ; 152 . = ALIGN(8); 153 __start_phys_ddr_overall_section = . ; 154 KEEP(*(phys_ddr_overall_section)) 155 __end_phys_ddr_overall_section = . ; 156 157 . = ALIGN(8); 158 KEEP(*(SORT(.scattered_array*))); 159#endif 160 . = ALIGN(8); 161 __rodata_end = .; 162 } 163 164 .interp : { *(.interp) } 165 .hash : { *(.hash) } 166 .dynsym : { *(.dynsym) } 167 .dynstr : { *(.dynstr) } 168 .rel.text : { *(.rel.text) *(.rel.gnu.linkonce.t*) } 169 .rela.text : { *(.rela.text) *(.rela.gnu.linkonce.t*) } 170 .rel.data : { *(.rel.data) *(.rel.gnu.linkonce.d*) } 171 .rela.data : { *(.rela.data) *(.rela.gnu.linkonce.d*) } 172 .rel.rodata : { *(.rel.rodata) *(.rel.gnu.linkonce.r*) } 173 .rela.rodata : { *(.rela.rodata) *(.rela.gnu.linkonce.r*) } 174 .rel.got : { *(.rel.got) } 175 .rela.got : { *(.rela.got) } 176 .rel.ctors : { *(.rel.ctors) } 177 .rela.ctors : { *(.rela.ctors) } 178 .rel.dtors : { *(.rel.dtors) } 179 .rela.dtors : { *(.rela.dtors) } 180 .rel.init : { *(.rel.init) } 181 .rela.init : { *(.rela.init) } 182 .rel.fini : { *(.rel.fini) } 183 .rela.fini : { *(.rela.fini) } 184 .rel.bss : { *(.rel.bss) } 185 .rela.bss : { *(.rela.bss) } 186 .rel.plt : { *(.rel.plt) } 187 .rela.plt : { *(.rela.plt) } 188 .init : { *(.init) } =0x9090 189 .plt : { *(.plt) } 190 191 /* .ARM.exidx is sorted, so has to go in its own output section. */ 192 .ARM.exidx : { 193 __exidx_start = .; 194 *(.ARM.exidx* .gnu.linkonce.armexidx.*) 195 __exidx_end = .; 196 } 197 198 .ARM.extab : { 199 __extab_start = .; 200 *(.ARM.extab*) 201 __extab_end = .; 202 } 203 204 /* Start page aligned read-write memory */ 205#ifdef CFG_CORE_RWDATA_NOEXEC 206 . = ALIGN(SMALL_PAGE_SIZE); 207#endif 208 __flatmap_unpg_ro_size = . - __flatmap_unpg_ro_start; 209 __flatmap_unpg_rw_start = .; 210 211 .data : ALIGN(8) { 212 /* writable data */ 213 __data_start_rom = .; 214 /* in one segment binaries, the rom data address is on top 215 of the ram data address */ 216 __data_start = .; 217 *(.data .data.* .gnu.linkonce.d.*) 218 . = ALIGN(8); 219 } 220 221 .ctors : ALIGN(8) { 222 __ctor_list = .; 223 KEEP(*(.ctors .ctors.* .init_array .init_array.*)) 224 __ctor_end = .; 225 } 226 .dtors : ALIGN(8) { 227 __dtor_list = .; 228 KEEP(*(.dtors .dtors.* .fini_array .fini_array.*)) 229 __dtor_end = .; 230 } 231 .got : { *(.got.plt) *(.got) } 232 .dynamic : { *(.dynamic) } 233 234 /* unintialized data */ 235 .bss : { 236 __data_end = .; 237 __bss_start = .; 238 *(.bss .bss.*) 239 *(.gnu.linkonce.b.*) 240 *(COMMON) 241 . = ALIGN(8); 242 __bss_end = .; 243 } 244 245 .heap1 (NOLOAD) : { 246 /* 247 * We're keeping track of the padding added before the 248 * .nozi section so we can do something useful with 249 * this otherwise wasted memory. 250 */ 251 __heap1_start = .; 252#ifndef CFG_WITH_PAGER 253 . += CFG_CORE_HEAP_SIZE; 254#endif 255 . = ALIGN(16 * 1024); 256 __heap1_end = .; 257 } 258 259 /* 260 * Uninitialized data that shouldn't be zero initialized at 261 * runtime. 262 * 263 * L1 mmu table requires 16 KiB alignment 264 */ 265 .nozi (NOLOAD) : { 266 __nozi_start = .; 267 ASSERT(!(__nozi_start & (16 * 1024 - 1)), "align nozi to 16kB"); 268 269 KEEP(*(.nozi .nozi.*)) 270 . = ALIGN(16); 271 __nozi_end = .; 272 __nozi_stack_start = .; 273 KEEP(*(.nozi_stack .nozi_stack.*)) 274 . = ALIGN(8); 275 __nozi_stack_end = .; 276 } 277 278#ifdef CFG_WITH_PAGER 279 .heap2 (NOLOAD) : { 280 __heap2_start = .; 281 /* 282 * Reserve additional memory for heap, the total should be 283 * at least CFG_CORE_HEAP_SIZE, but count what has already 284 * been reserved in .heap1 285 */ 286 . += CFG_CORE_HEAP_SIZE - (__heap1_end - __heap1_start); 287 . = ALIGN(SMALL_PAGE_SIZE); 288 __heap2_end = .; 289 } 290 291 /* Start page aligned read-only memory */ 292 __flatmap_unpg_rw_size = . - __flatmap_unpg_rw_start; 293 294 __init_start = .; 295 __flatmap_init_rx_start = .; 296 297 ASSERT(!(__flatmap_init_rx_start & (SMALL_PAGE_SIZE - 1)), 298 "read-write memory is not paged aligned") 299 300 .text_init : { 301/* 302 * Include list of sections needed for boot initialization, this list 303 * overlaps with unpaged.ld.S but since unpaged.ld.S is first all those 304 * sections will go into the unpaged area. 305 */ 306#include <text_init.ld.S> 307 KEEP(*(.text.startup.*)); 308 /* Make sure constructor functions are available during init */ 309 KEEP(*(.text._GLOBAL__sub_*)); 310 . = ALIGN(8); 311 } 312 313#ifdef CFG_CORE_RODATA_NOEXEC 314 . = ALIGN(SMALL_PAGE_SIZE); 315#endif 316 __flatmap_init_rx_size = . - __flatmap_init_rx_start; 317 __flatmap_init_ro_start = .; 318 319 .rodata_init : { 320#include <rodata_init.ld.S> 321 . = ALIGN(8); 322 __start_phys_mem_map_section = . ; 323 KEEP(*(phys_mem_map_section)) 324 __end_phys_mem_map_section = . ; 325 . = ALIGN(8); 326 __start_phys_sdp_mem_section = . ; 327 KEEP(*(phys_sdp_mem_section)) 328 __end_phys_sdp_mem_section = . ; 329 . = ALIGN(8); 330 __start_phys_nsec_ddr_section = . ; 331 KEEP(*(phys_nsec_ddr_section)) 332 __end_phys_nsec_ddr_section = . ; 333 . = ALIGN(8); 334 __start_phys_ddr_overall_section = . ; 335 KEEP(*(phys_ddr_overall_section)) 336 __end_phys_ddr_overall_section = . ; 337 338 . = ALIGN(8); 339 KEEP(*(SORT(.scattered_array*))); 340 341 . = ALIGN(8); 342 __rodata_init_end = .; 343 } 344 __rodata_init_end = .; 345 346 __init_end = ROUNDUP(__rodata_init_end, SMALL_PAGE_SIZE); 347 __init_size = __init_end - __init_start; 348 349 /* vcore flat map stops here. No need to page align, rodata follows. */ 350 __flatmap_init_ro_size = __init_end - __flatmap_init_ro_start; 351 352 .rodata_pageable : ALIGN(8) { 353#ifdef CFG_DT 354 __rodata_dtdrv_start = .; 355 KEEP(*(.rodata.dtdrv)) 356 __rodata_dtdrv_end = .; 357#endif 358#ifdef CFG_EARLY_TA 359 . = ALIGN(8); 360 __rodata_early_ta_start = .; 361 KEEP(*(.rodata.early_ta)) 362 __rodata_early_ta_end = .; 363#endif 364 *(.rodata*) 365 /* 366 * 8 to avoid unwanted padding between __start_ta_head_section 367 * and the first structure in ta_head_section, in 64-bit 368 * builds 369 */ 370 . = ALIGN(8); 371 __start_ta_head_section = . ; 372 KEEP(*(ta_head_section)) 373 __stop_ta_head_section = . ; 374 } 375 376#ifdef CFG_CORE_RODATA_NOEXEC 377 . = ALIGN(SMALL_PAGE_SIZE); 378#endif 379 380 .text_pageable : ALIGN(8) { 381 *(.text*) 382 . = ALIGN(SMALL_PAGE_SIZE); 383 } 384 385 __pageable_part_end = .; 386 __pageable_part_start = __init_end; 387 __pageable_start = __init_start; 388 __pageable_end = __pageable_part_end; 389 390 /* 391 * Assign a safe spot to store the hashes of the pages before 392 * heap is initialized. 393 */ 394 __tmp_hashes_start = __init_end; 395 __tmp_hashes_size = ((__pageable_end - __pageable_start) / 396 SMALL_PAGE_SIZE) * 32; 397 __tmp_hashes_end = __tmp_hashes_start + __tmp_hashes_size; 398 399 __init_mem_usage = __tmp_hashes_end - TEE_TEXT_VA_START; 400 401 ASSERT(TEE_LOAD_ADDR >= TEE_RAM_START, 402 "Load address before start of physical memory") 403 ASSERT(TEE_LOAD_ADDR < (TEE_RAM_START + TEE_RAM_PH_SIZE), 404 "Load address after end of physical memory") 405 ASSERT(__tmp_hashes_end < (TEE_RAM_VA_START + TEE_RAM_PH_SIZE), 406 "OP-TEE can't fit init part into available physical memory") 407 ASSERT((TEE_RAM_VA_START + TEE_RAM_PH_SIZE - __init_end) > 408 SMALL_PAGE_SIZE, "Too few free pages to initialize paging") 409 410 411#endif /*CFG_WITH_PAGER*/ 412 413#ifdef CFG_CORE_SANITIZE_KADDRESS 414 . = TEE_RAM_VA_START + (TEE_RAM_VA_SIZE * 8) / 9 - 8; 415 . = ALIGN(8); 416 .asan_shadow : { 417 __asan_shadow_start = .; 418 . += TEE_RAM_VA_SIZE / 9; 419 __asan_shadow_end = .; 420 __asan_shadow_size = __asan_shadow_end - __asan_shadow_start; 421 } 422#endif /*CFG_CORE_SANITIZE_KADDRESS*/ 423 424 __end = .; 425 426#ifndef CFG_WITH_PAGER 427 __init_size = __data_end - TEE_TEXT_VA_START; 428 __init_mem_usage = __end - TEE_TEXT_VA_START; 429#endif 430 /* 431 * Guard against moving the location counter backwards in the assignment 432 * below. 433 */ 434 ASSERT(. <= (TEE_RAM_VA_START + TEE_RAM_VA_SIZE), 435 "TEE_RAM_VA_SIZE is too small") 436 . = TEE_RAM_VA_START + TEE_RAM_VA_SIZE; 437 438 _end_of_ram = .; 439 440#ifndef CFG_WITH_PAGER 441 __flatmap_unpg_rw_size = _end_of_ram - __flatmap_unpg_rw_start; 442#endif 443 444 /DISCARD/ : { 445 /* Strip unnecessary stuff */ 446 *(.comment .note .eh_frame) 447 /* Strip meta variables */ 448 *(__keep_meta_vars*) 449 } 450 451} 452 453/* Unpaged read-only memories */ 454__vcore_unpg_rx_start = __flatmap_unpg_rx_start; 455__vcore_unpg_ro_start = __flatmap_unpg_ro_start; 456#ifdef CFG_CORE_RODATA_NOEXEC 457__vcore_unpg_rx_size = __flatmap_unpg_rx_size; 458__vcore_unpg_ro_size = __flatmap_unpg_ro_size; 459#else 460__vcore_unpg_rx_size = __flatmap_unpg_rx_size + __flatmap_unpg_ro_size; 461__vcore_unpg_ro_size = 0; 462#endif 463 464/* Unpaged read-write memory */ 465__vcore_unpg_rw_start = __flatmap_unpg_rw_start; 466__vcore_unpg_rw_size = __flatmap_unpg_rw_size; 467 468#ifdef CFG_WITH_PAGER 469/* 470 * Core init mapping shall cover up to end of the physical RAM. 471 * This is required since the hash table is appended to the 472 * binary data after the firmware build sequence. 473 */ 474#define __FLATMAP_PAGER_TRAILING_SPACE \ 475 (TEE_RAM_START + TEE_RAM_PH_SIZE - \ 476 (__flatmap_init_ro_start + __flatmap_init_ro_size)) 477 478/* Paged/init read-only memories */ 479__vcore_init_rx_start = __flatmap_init_rx_start; 480__vcore_init_ro_start = __flatmap_init_ro_start; 481#ifdef CFG_CORE_RODATA_NOEXEC 482__vcore_init_rx_size = __flatmap_init_rx_size; 483__vcore_init_ro_size = __flatmap_init_ro_size + __FLATMAP_PAGER_TRAILING_SPACE; 484#else 485__vcore_init_rx_size = __flatmap_init_rx_size + __flatmap_init_ro_size + 486 __FLATMAP_PAGER_TRAILING_SPACE; 487__vcore_init_ro_size = 0; 488#endif /* CFG_CORE_RODATA_NOEXEC */ 489#endif /* CFG_WITH_PAGER */ 490 491#ifdef CFG_CORE_SANITIZE_KADDRESS 492__asan_map_start = (__asan_shadow_start / SMALL_PAGE_SIZE) * 493 SMALL_PAGE_SIZE; 494__asan_map_end = ((__asan_shadow_end - 1) / SMALL_PAGE_SIZE) * 495 SMALL_PAGE_SIZE + SMALL_PAGE_SIZE; 496__asan_map_size = __asan_map_end - __asan_map_start; 497#endif /*CFG_CORE_SANITIZE_KADDRESS*/ 498