1/* 2 * Copyright (c) 2014, Linaro Limited 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, 9 * this list of conditions and the following disclaimer. 10 * 11 * 2. Redistributions in binary form must reproduce the above copyright notice, 12 * this list of conditions and the following disclaimer in the documentation 13 * and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28/* 29 * Copyright (c) 2008-2010 Travis Geiselbrecht 30 * 31 * Permission is hereby granted, free of charge, to any person obtaining 32 * a copy of this software and associated documentation files 33 * (the "Software"), to deal in the Software without restriction, 34 * including without limitation the rights to use, copy, modify, merge, 35 * publish, distribute, sublicense, and/or sell copies of the Software, 36 * and to permit persons to whom the Software is furnished to do so, 37 * subject to the following conditions: 38 * 39 * The above copyright notice and this permission notice shall be 40 * included in all copies or substantial portions of the Software. 41 * 42 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 43 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 44 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 45 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY 46 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 47 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 48 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 49 */ 50 51#include <platform_config.h> 52 53#ifndef SMALL_PAGE_SIZE 54#define SMALL_PAGE_SIZE 4096 55#endif 56#ifndef ROUNDUP 57#define ROUNDUP(x, y) ((((x) + (y) - 1) / (y)) * (y)) 58#define ROUNDDOWN(x, y) (((x) / (y)) * (y)) 59#endif 60 61/* 62 * TEE_RAM_VA_START: The start virtual address of the TEE RAM 63 * TEE_TEXT_VA_START: The start virtual address of the OP-TEE text 64 */ 65#define TEE_RAM_VA_START CFG_TEE_RAM_START 66#define TEE_TEXT_VA_START (TEE_RAM_VA_START + \ 67 (CFG_TEE_LOAD_ADDR - CFG_TEE_RAM_START)) 68 69OUTPUT_FORMAT(CFG_KERN_LINKER_FORMAT) 70OUTPUT_ARCH(CFG_KERN_LINKER_ARCH) 71 72ENTRY(_start) 73SECTIONS 74{ 75 . = TEE_TEXT_VA_START; 76#ifdef ARM32 77 ASSERT(!(TEE_TEXT_VA_START & 31), "text start should align to 32bytes") 78#endif 79#ifdef ARM64 80 ASSERT(!(TEE_TEXT_VA_START & 127), "text start should align to 128bytes") 81#endif 82 __text_start = .; 83 84 /* 85 * Memory between TEE_TEXT_VA_START and page aligned rounded down 86 * value will be mapped with unpaged "text" section attributes: 87 * likely to be read-only/executable. 88 */ 89 __flatmap_unpg_rx_start = ROUNDDOWN(__text_start, SMALL_PAGE_SIZE); 90 91 .text : { 92 KEEP(*(.text._start)) 93 KEEP(*(.text.init .text.plat_cpu_reset_early \ 94 .text.reset .text.reset_primary .text.unhandled_cpu \ 95 .text.__assert_flat_mapped_range)) 96 97 . = ALIGN(8); 98 __initcall_start = .; 99 KEEP(*(.initcall1)) 100 KEEP(*(.initcall2)) 101 KEEP(*(.initcall3)) 102 KEEP(*(.initcall4)) 103 __initcall_end = .; 104 105#ifdef CFG_WITH_PAGER 106 *(.text) 107/* Include list of sections needed for paging */ 108#include <text_unpaged.ld.S> 109#else 110 *(.text .text.*) 111#endif 112 *(.sram.text.glue_7* .gnu.linkonce.t.*) 113 . = ALIGN(8); 114 } 115 __text_end = .; 116 117#ifdef CFG_CORE_RODATA_NOEXEC 118 . = ALIGN(SMALL_PAGE_SIZE); 119#endif 120 __flatmap_unpg_rx_size = . - __flatmap_unpg_rx_start; 121 __flatmap_unpg_ro_start = .; 122 123 .rodata : ALIGN(8) { 124 __rodata_start = .; 125 *(.gnu.linkonce.r.*) 126#ifdef CFG_WITH_PAGER 127 *(.rodata .rodata.__unpaged) 128#include <rodata_unpaged.ld.S> 129#else 130#ifdef CFG_DT 131 __rodata_dtdrv_start = .; 132 KEEP(*(.rodata.dtdrv)) 133 __rodata_dtdrv_end = .; 134#endif 135#ifdef CFG_EARLY_TA 136 . = ALIGN(8); 137 __rodata_early_ta_start = .; 138 KEEP(*(.rodata.early_ta)) 139 __rodata_early_ta_end = .; 140#endif 141 142 *(.rodata .rodata.*) 143 144 /* 145 * 8 to avoid unwanted padding between __start_ta_head_section 146 * and the first structure in ta_head_section, in 64-bit 147 * builds 148 */ 149 . = ALIGN(8); 150 __start_ta_head_section = . ; 151 KEEP(*(ta_head_section)) 152 __stop_ta_head_section = . ; 153 . = ALIGN(8); 154 __start_phys_mem_map_section = . ; 155 KEEP(*(phys_mem_map_section)) 156 __end_phys_mem_map_section = . ; 157 . = ALIGN(8); 158 __start_phys_sdp_mem_section = . ; 159 KEEP(*(phys_sdp_mem_section)) 160 __end_phys_sdp_mem_section = . ; 161 . = ALIGN(8); 162 __start_phys_nsec_ddr_section = . ; 163 KEEP(*(phys_nsec_ddr_section)) 164 __end_phys_nsec_ddr_section = . ; 165#endif 166 . = ALIGN(8); 167 __rodata_end = .; 168 } 169 170 .interp : { *(.interp) } 171 .hash : { *(.hash) } 172 .dynsym : { *(.dynsym) } 173 .dynstr : { *(.dynstr) } 174 .rel.text : { *(.rel.text) *(.rel.gnu.linkonce.t*) } 175 .rela.text : { *(.rela.text) *(.rela.gnu.linkonce.t*) } 176 .rel.data : { *(.rel.data) *(.rel.gnu.linkonce.d*) } 177 .rela.data : { *(.rela.data) *(.rela.gnu.linkonce.d*) } 178 .rel.rodata : { *(.rel.rodata) *(.rel.gnu.linkonce.r*) } 179 .rela.rodata : { *(.rela.rodata) *(.rela.gnu.linkonce.r*) } 180 .rel.got : { *(.rel.got) } 181 .rela.got : { *(.rela.got) } 182 .rel.ctors : { *(.rel.ctors) } 183 .rela.ctors : { *(.rela.ctors) } 184 .rel.dtors : { *(.rel.dtors) } 185 .rela.dtors : { *(.rela.dtors) } 186 .rel.init : { *(.rel.init) } 187 .rela.init : { *(.rela.init) } 188 .rel.fini : { *(.rel.fini) } 189 .rela.fini : { *(.rela.fini) } 190 .rel.bss : { *(.rel.bss) } 191 .rela.bss : { *(.rela.bss) } 192 .rel.plt : { *(.rel.plt) } 193 .rela.plt : { *(.rela.plt) } 194 .init : { *(.init) } =0x9090 195 .plt : { *(.plt) } 196 197 /* .ARM.exidx is sorted, so has to go in its own output section. */ 198 .ARM.exidx : { 199 __exidx_start = .; 200 *(.ARM.exidx* .gnu.linkonce.armexidx.*) 201 __exidx_end = .; 202 } 203 204 .ARM.extab : { 205 __extab_start = .; 206 *(.ARM.extab*) 207 __extab_end = .; 208 } 209 210 /* Start page aligned read-write memory */ 211#ifdef CFG_CORE_RWDATA_NOEXEC 212 . = ALIGN(SMALL_PAGE_SIZE); 213#endif 214 __flatmap_unpg_ro_size = . - __flatmap_unpg_ro_start; 215 __flatmap_unpg_rw_start = .; 216 217 .data : ALIGN(8) { 218 /* writable data */ 219 __data_start_rom = .; 220 /* in one segment binaries, the rom data address is on top 221 of the ram data address */ 222 __data_start = .; 223 *(.data .data.* .gnu.linkonce.d.*) 224 . = ALIGN(8); 225 } 226 227 .ctors : ALIGN(8) { 228 __ctor_list = .; 229 KEEP(*(.ctors .ctors.* .init_array .init_array.*)) 230 __ctor_end = .; 231 } 232 .dtors : ALIGN(8) { 233 __dtor_list = .; 234 KEEP(*(.dtors .dtors.* .fini_array .fini_array.*)) 235 __dtor_end = .; 236 } 237 .got : { *(.got.plt) *(.got) } 238 .dynamic : { *(.dynamic) } 239 240 /* unintialized data */ 241 .bss : { 242 __data_end = .; 243 __bss_start = .; 244 *(.bss .bss.*) 245 *(.gnu.linkonce.b.*) 246 *(COMMON) 247 . = ALIGN(8); 248 __bss_end = .; 249 } 250 251 .heap1 (NOLOAD) : { 252 /* 253 * We're keeping track of the padding added before the 254 * .nozi section so we can do something useful with 255 * this otherwise wasted memory. 256 */ 257 __heap1_start = .; 258#ifndef CFG_WITH_PAGER 259 . += CFG_CORE_HEAP_SIZE; 260#endif 261 . = ALIGN(16 * 1024); 262 __heap1_end = .; 263 } 264 265 /* 266 * Uninitialized data that shouldn't be zero initialized at 267 * runtime. 268 * 269 * L1 mmu table requires 16 KiB alignment 270 */ 271 .nozi (NOLOAD) : { 272 __nozi_start = .; 273 ASSERT(!(__nozi_start & (16 * 1024 - 1)), "align nozi to 16kB"); 274 275 KEEP(*(.nozi .nozi.*)) 276 . = ALIGN(16); 277 __nozi_end = .; 278 __nozi_stack_start = .; 279 KEEP(*(.nozi_stack)) 280 . = ALIGN(8); 281 __nozi_stack_end = .; 282 } 283 284#ifdef CFG_WITH_PAGER 285 .heap2 (NOLOAD) : { 286 __heap2_start = .; 287 /* 288 * Reserve additional memory for heap, the total should be 289 * at least CFG_CORE_HEAP_SIZE, but count what has already 290 * been reserved in .heap1 291 */ 292 . += CFG_CORE_HEAP_SIZE - (__heap1_end - __heap1_start); 293 . = ALIGN(SMALL_PAGE_SIZE); 294 __heap2_end = .; 295 } 296 297 /* Start page aligned read-only memory */ 298 __flatmap_unpg_rw_size = . - __flatmap_unpg_rw_start; 299 300 __init_start = .; 301 __flatmap_init_rx_start = .; 302 303 ASSERT(!(__flatmap_init_rx_start & (SMALL_PAGE_SIZE - 1)), 304 "read-write memory is not paged aligned") 305 306 .text_init : { 307/* 308 * Include list of sections needed for boot initialization, this list 309 * overlaps with unpaged.ld.S but since unpaged.ld.S is first all those 310 * sections will go into the unpaged area. 311 */ 312#include <text_init.ld.S> 313 KEEP(*(.text.startup.*)); 314 /* Make sure constructor functions are available during init */ 315 KEEP(*(.text._GLOBAL__sub_*)); 316 . = ALIGN(8); 317 } 318 319#ifdef CFG_CORE_RODATA_NOEXEC 320 . = ALIGN(SMALL_PAGE_SIZE); 321#endif 322 __flatmap_init_rx_size = . - __flatmap_init_rx_start; 323 __flatmap_init_ro_start = .; 324 325 .rodata_init : { 326#include <rodata_init.ld.S> 327 . = ALIGN(8); 328 __start_phys_mem_map_section = . ; 329 KEEP(*(phys_mem_map_section)) 330 __end_phys_mem_map_section = . ; 331 . = ALIGN(8); 332 __start_phys_sdp_mem_section = . ; 333 KEEP(*(phys_sdp_mem_section)) 334 __end_phys_sdp_mem_section = . ; 335 . = ALIGN(8); 336 __start_phys_nsec_ddr_section = . ; 337 KEEP(*(phys_nsec_ddr_section)) 338 __end_phys_nsec_ddr_section = . ; 339 . = ALIGN(8); 340 __rodata_init_end = .; 341 } 342 __rodata_init_end = .; 343 344 __init_end = ROUNDUP(__rodata_init_end, SMALL_PAGE_SIZE); 345 __init_size = __init_end - __init_start; 346 347 /* vcore flat map stops here. No need to page align, rodata follows. */ 348 __flatmap_init_ro_size = __init_end - __flatmap_init_ro_start; 349 350 .rodata_pageable : ALIGN(8) { 351#ifdef CFG_DT 352 __rodata_dtdrv_start = .; 353 KEEP(*(.rodata.dtdrv)) 354 __rodata_dtdrv_end = .; 355#endif 356#ifdef CFG_EARLY_TA 357 . = ALIGN(8); 358 __rodata_early_ta_start = .; 359 KEEP(*(.rodata.early_ta)) 360 __rodata_early_ta_end = .; 361#endif 362 *(.rodata*) 363 /* 364 * 8 to avoid unwanted padding between __start_ta_head_section 365 * and the first structure in ta_head_section, in 64-bit 366 * builds 367 */ 368 . = ALIGN(8); 369 __start_ta_head_section = . ; 370 KEEP(*(ta_head_section)) 371 __stop_ta_head_section = . ; 372 } 373 374#ifdef CFG_CORE_RODATA_NOEXEC 375 . = ALIGN(SMALL_PAGE_SIZE); 376#endif 377 378 .text_pageable : ALIGN(8) { 379 *(.text*) 380 . = ALIGN(SMALL_PAGE_SIZE); 381 } 382 383 __pageable_part_end = .; 384 __pageable_part_start = __init_end; 385 __pageable_start = __init_start; 386 __pageable_end = __pageable_part_end; 387 388 /* 389 * Assign a safe spot to store the hashes of the pages before 390 * heap is initialized. 391 */ 392 __tmp_hashes_start = __init_end; 393 __tmp_hashes_size = ((__pageable_end - __pageable_start) / 394 SMALL_PAGE_SIZE) * 32; 395 __tmp_hashes_end = __tmp_hashes_start + __tmp_hashes_size; 396 397 __init_mem_usage = __tmp_hashes_end - TEE_TEXT_VA_START; 398 399 ASSERT(CFG_TEE_LOAD_ADDR >= CFG_TEE_RAM_START, 400 "Load address before start of physical memory") 401 ASSERT(CFG_TEE_LOAD_ADDR < (CFG_TEE_RAM_START + CFG_TEE_RAM_PH_SIZE), 402 "Load address after end of physical memory") 403 ASSERT(__tmp_hashes_end < (TEE_RAM_VA_START + CFG_TEE_RAM_PH_SIZE), 404 "OP-TEE can't fit init part into available physical memory") 405 ASSERT((TEE_RAM_VA_START + CFG_TEE_RAM_PH_SIZE - __init_end) > 406 SMALL_PAGE_SIZE, "Too few free pages to initialize paging") 407 408 409#endif /*CFG_WITH_PAGER*/ 410 411#ifdef CFG_CORE_SANITIZE_KADDRESS 412 . = TEE_RAM_VA_START + (CFG_TEE_RAM_VA_SIZE * 8) / 9 - 8; 413 . = ALIGN(8); 414 .asan_shadow : { 415 __asan_shadow_start = .; 416 . += CFG_TEE_RAM_VA_SIZE / 9; 417 __asan_shadow_end = .; 418 __asan_shadow_size = __asan_shadow_end - __asan_shadow_start; 419 } 420#endif /*CFG_CORE_SANITIZE_KADDRESS*/ 421 422 __end = .; 423 424#ifndef CFG_WITH_PAGER 425 __init_size = __data_end - TEE_TEXT_VA_START; 426 __init_mem_usage = __end - TEE_TEXT_VA_START; 427#endif 428 /* 429 * Guard against moving the location counter backwards in the assignment 430 * below. 431 */ 432 ASSERT(. <= (TEE_RAM_VA_START + CFG_TEE_RAM_VA_SIZE), 433 "CFG_TEE_RAM_VA_SIZE is too small") 434 . = TEE_RAM_VA_START + CFG_TEE_RAM_VA_SIZE; 435 436 _end_of_ram = .; 437 438#ifndef CFG_WITH_PAGER 439 __flatmap_unpg_rw_size = _end_of_ram - __flatmap_unpg_rw_start; 440#endif 441 442 /DISCARD/ : { 443 /* Strip unnecessary stuff */ 444 *(.comment .note .eh_frame) 445 /* Strip meta variables */ 446 *(__keep_meta_vars*) 447 } 448 449} 450 451/* Unpaged read-only memories */ 452PROVIDE(__vcore_unpg_rx_start = __flatmap_unpg_rx_start); 453PROVIDE(__vcore_unpg_ro_start = __flatmap_unpg_ro_start); 454#ifdef CFG_CORE_RODATA_NOEXEC 455PROVIDE(__vcore_unpg_rx_size = __flatmap_unpg_rx_size); 456PROVIDE(__vcore_unpg_ro_size = __flatmap_unpg_ro_size); 457#else 458PROVIDE(__vcore_unpg_rx_size = __flatmap_unpg_rx_size + 459 __flatmap_unpg_ro_size); 460PROVIDE(__vcore_unpg_ro_size = 0); 461#endif 462 463/* Unpaged read-write memory */ 464PROVIDE(__vcore_unpg_rw_start = __flatmap_unpg_rw_start); 465PROVIDE(__vcore_unpg_rw_size = __flatmap_unpg_rw_size); 466 467#ifdef CFG_WITH_PAGER 468/* 469 * Core init mapping shall cover up to end of the physical RAM. 470 * This is required since the hash table is appended to the 471 * binary data after the firmware build sequence. 472 */ 473#define __FLATMAP_PAGER_TRAILING_SPACE \ 474 (CFG_TEE_RAM_START + CFG_TEE_RAM_PH_SIZE - \ 475 (__flatmap_init_ro_start + __flatmap_init_ro_size)) 476 477/* Paged/init read-only memories */ 478PROVIDE(__vcore_init_rx_start = __flatmap_init_rx_start); 479PROVIDE(__vcore_init_ro_start = __flatmap_init_ro_start); 480#ifdef CFG_CORE_RODATA_NOEXEC 481PROVIDE(__vcore_init_rx_size = __flatmap_init_rx_size); 482PROVIDE(__vcore_init_ro_size = __flatmap_init_ro_size + 483 __FLATMAP_PAGER_TRAILING_SPACE); 484#else 485PROVIDE(__vcore_init_rx_size = __flatmap_init_rx_size + 486 __flatmap_init_ro_size + 487 __FLATMAP_PAGER_TRAILING_SPACE); 488PROVIDE(__vcore_init_ro_size = 0); 489#endif /* CFG_CORE_RODATA_NOEXEC */ 490#endif /* CFG_WITH_PAGER */ 491 492PROVIDE(__asan_map_start = (__asan_shadow_start / SMALL_PAGE_SIZE) * 493 SMALL_PAGE_SIZE); 494PROVIDE(__asan_map_end = ((__asan_shadow_end - 1) / SMALL_PAGE_SIZE) * 495 SMALL_PAGE_SIZE + SMALL_PAGE_SIZE); 496PROVIDE(__asan_map_size = __asan_map_end - __asan_map_start); 497