1/* SPDX-License-Identifier: (BSD-2-Clause AND MIT) */ 2/* 3 * Copyright (c) 2014, Linaro Limited 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright notice, 10 * this list of conditions and the following disclaimer. 11 * 12 * 2. Redistributions in binary form must reproduce the above copyright notice, 13 * this list of conditions and the following disclaimer in the documentation 14 * and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 20 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29/* 30 * Copyright (c) 2008-2010 Travis Geiselbrecht 31 * 32 * Permission is hereby granted, free of charge, to any person obtaining 33 * a copy of this software and associated documentation files 34 * (the "Software"), to deal in the Software without restriction, 35 * including without limitation the rights to use, copy, modify, merge, 36 * publish, distribute, sublicense, and/or sell copies of the Software, 37 * and to permit persons to whom the Software is furnished to do so, 38 * subject to the following conditions: 39 * 40 * The above copyright notice and this permission notice shall be 41 * included in all copies or substantial portions of the Software. 42 * 43 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 44 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 45 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 46 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY 47 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 48 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 49 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 50 */ 51 52#include <mm/core_mmu.h> 53#include <platform_config.h> 54#include <util.h> 55 56/* 57 * TEE_RAM_VA_START: The start virtual address of the TEE RAM 58 * TEE_TEXT_VA_START: The start virtual address of the OP-TEE text 59 */ 60#define TEE_RAM_VA_START TEE_RAM_START 61#define TEE_TEXT_VA_START (TEE_RAM_VA_START + \ 62 (TEE_LOAD_ADDR - TEE_RAM_START)) 63 64/* 65 * Note: 66 * Clang 11 (ld.lld) generates non-relocatable reference when using ROUNDDOWN() 67 * from <util.h>, which does not work with ASLR. 68 */ 69#define LD_ROUNDDOWN(x, y) ((x) - ((x) % (y))) 70 71OUTPUT_FORMAT(CFG_KERN_LINKER_FORMAT) 72OUTPUT_ARCH(CFG_KERN_LINKER_ARCH) 73 74ENTRY(_start) 75SECTIONS 76{ 77 . = TEE_TEXT_VA_START; 78#ifdef ARM32 79 ASSERT(!(TEE_TEXT_VA_START & 31), "text start should align to 32bytes") 80#endif 81#ifdef ARM64 82 ASSERT(!(TEE_TEXT_VA_START & 127), "text start should align to 128bytes") 83#endif 84 __text_start = .; 85 86 /* 87 * Memory between TEE_TEXT_VA_START and page aligned rounded down 88 * value will be mapped with unpaged "text" section attributes: 89 * likely to be read-only/executable. 90 */ 91 __flatmap_unpg_rx_start = LD_ROUNDDOWN(__text_start, SMALL_PAGE_SIZE); 92 93 .text : { 94 KEEP(*(.text._start)) 95 __identity_map_init_start = .; 96 __text_data_start = .; 97 *(.identity_map.data) 98 __text_data_end = .; 99 *(.identity_map .identity_map.* \ 100 /* 101 * The one below is needed because it's a weak 102 * symbol that may be overridden by platform 103 * specific code. 104 */ 105 .text.get_core_pos_mpidr) 106 __identity_map_init_end = .; 107 KEEP(*(.text.init .text.plat_cpu_reset_early \ 108 .text.reset .text.reset_primary .text.unhandled_cpu \ 109 .text.__assert_flat_mapped_range)) 110 111#ifdef CFG_WITH_PAGER 112 *(.text) 113/* Include list of sections needed for paging */ 114#include <text_unpaged.ld.S> 115#else 116 *(.text .text.*) 117#endif 118 *(.sram.text.glue_7* .gnu.linkonce.t.*) 119 . = ALIGN(8); 120 } 121 __text_end = .; 122 123#ifdef CFG_CORE_RODATA_NOEXEC 124 . = ALIGN(SMALL_PAGE_SIZE); 125#endif 126 __flatmap_unpg_rx_size = . - __flatmap_unpg_rx_start; 127 __flatmap_unpg_ro_start = .; 128 129 .rodata : ALIGN(8) { 130 __rodata_start = .; 131 *(.gnu.linkonce.r.*) 132#ifdef CFG_WITH_PAGER 133 *(.rodata .rodata.__unpaged .rodata.__unpaged.*) 134#include <rodata_unpaged.ld.S> 135#else 136 *(.rodata .rodata.*) 137 . = ALIGN(8); 138 KEEP(*(SORT(.scattered_array*))); 139#endif 140 . = ALIGN(8); 141 __rodata_end = .; 142 } 143 144 .got : { *(.got.plt) *(.got) } 145 .note.gnu.property : { *(.note.gnu.property) } 146 .plt : { *(.plt) } 147 148 .ctors : ALIGN(8) { 149 __ctor_list = .; 150 KEEP(*(.ctors .ctors.* .init_array .init_array.*)) 151 __ctor_end = .; 152 } 153 .dtors : ALIGN(8) { 154 __dtor_list = .; 155 KEEP(*(.dtors .dtors.* .fini_array .fini_array.*)) 156 __dtor_end = .; 157 } 158 159 /* .ARM.exidx is sorted, so has to go in its own output section. */ 160 .ARM.exidx : { 161 __exidx_start = .; 162 *(.ARM.exidx* .gnu.linkonce.armexidx.*) 163 __exidx_end = .; 164 } 165 166 .ARM.extab : { 167 __extab_start = .; 168 *(.ARM.extab*) 169 __extab_end = .; 170 } 171 172 /* Start page aligned read-write memory */ 173#ifdef CFG_CORE_RWDATA_NOEXEC 174 . = ALIGN(SMALL_PAGE_SIZE); 175#endif 176 __flatmap_unpg_ro_size = . - __flatmap_unpg_ro_start; 177 178#ifdef CFG_VIRTUALIZATION 179 __flatmap_nex_rw_start = . ; 180 .nex_data : ALIGN(8) { 181 *(.nex_data .nex_data.*) 182 } 183 184 .nex_bss : ALIGN(8) { 185 __nex_bss_start = .; 186 *(.nex_bss .nex_bss.*) 187 __nex_bss_end = .; 188 } 189 190 /* 191 * We want to keep all nexus memory in one place, because 192 * it should be always mapped and it is easier to map one 193 * memory region than two. 194 * Next section are NOLOAD ones, but they are followed 195 * by sections with data. Thus, this NOLOAD section will 196 * be included in the resulting binary, filled with zeroes 197 */ 198 .nex_stack (NOLOAD) : { 199 __nozi_stack_start = .; 200 KEEP(*(.nozi_stack.stack_tmp .nozi_stack.stack_abt)) 201 . = ALIGN(8); 202 __nozi_stack_end = .; 203 } 204 205 .nex_heap (NOLOAD) : { 206 __nex_heap_start = .; 207 . += CFG_CORE_NEX_HEAP_SIZE; 208 . = ALIGN(16 * 1024); 209 __nex_heap_end = .; 210 } 211 .nex_nozi (NOLOAD) : { 212 ASSERT(!(ABSOLUTE(.) & (16 * 1024 - 1)), "align nozi to 16kB"); 213 KEEP(*(.nozi.mmu.base_table .nozi.mmu.l2)) 214 } 215 216 . = ALIGN(SMALL_PAGE_SIZE); 217 218 __flatmap_nex_rw_size = . - __flatmap_nex_rw_start; 219 __flatmap_nex_rw_end = .; 220#endif 221 222 __flatmap_unpg_rw_start = .; 223 224 .data : ALIGN(8) { 225 /* writable data */ 226 __data_start_rom = .; 227 /* in one segment binaries, the rom data address is on top 228 of the ram data address */ 229 __data_start = .; 230 *(.data .data.* .gnu.linkonce.d.*) 231 . = ALIGN(8); 232 } 233 234 /* unintialized data */ 235 .bss : { 236 __data_end = .; 237 __bss_start = .; 238 *(.bss .bss.*) 239 *(.gnu.linkonce.b.*) 240 *(COMMON) 241 . = ALIGN(8); 242 __bss_end = .; 243 } 244 245 .heap1 (NOLOAD) : { 246 /* 247 * We're keeping track of the padding added before the 248 * .nozi section so we can do something useful with 249 * this otherwise wasted memory. 250 */ 251 __heap1_start = .; 252#ifndef CFG_WITH_PAGER 253 . += CFG_CORE_HEAP_SIZE; 254#endif 255#ifdef CFG_WITH_LPAE 256 . = ALIGN(4 * 1024); 257#else 258 . = ALIGN(16 * 1024); 259#endif 260 __heap1_end = .; 261 } 262 /* 263 * Uninitialized data that shouldn't be zero initialized at 264 * runtime. 265 * 266 * L1 mmu table requires 16 KiB alignment 267 */ 268 .nozi (NOLOAD) : { 269 __nozi_start = .; 270 KEEP(*(.nozi .nozi.*)) 271 . = ALIGN(16); 272 __nozi_end = .; 273 /* 274 * If virtualization is enabled, abt and tmp stacks will placed 275 * at above .nex_stack section and thread stacks will go there 276 */ 277 __nozi_stack_start = .; 278 KEEP(*(.nozi_stack .nozi_stack.*)) 279 . = ALIGN(8); 280 __nozi_stack_end = .; 281 } 282 283#ifdef CFG_WITH_PAGER 284 .heap2 (NOLOAD) : { 285 __heap2_start = .; 286 /* 287 * Reserve additional memory for heap, the total should be 288 * at least CFG_CORE_HEAP_SIZE, but count what has already 289 * been reserved in .heap1 290 */ 291 . += CFG_CORE_HEAP_SIZE - (__heap1_end - __heap1_start); 292 . = ALIGN(SMALL_PAGE_SIZE); 293 __heap2_end = .; 294 } 295 296 /* Start page aligned read-only memory */ 297 __flatmap_unpg_rw_size = . - __flatmap_unpg_rw_start; 298 299 __init_start = .; 300 __flatmap_init_rx_start = .; 301 302 ASSERT(!(__flatmap_init_rx_start & (SMALL_PAGE_SIZE - 1)), 303 "read-write memory is not paged aligned") 304 305 .text_init : { 306/* 307 * Include list of sections needed for boot initialization, this list 308 * overlaps with unpaged.ld.S but since unpaged.ld.S is first all those 309 * sections will go into the unpaged area. 310 */ 311#include <text_init.ld.S> 312 KEEP(*(.text.startup.*)); 313 /* Make sure constructor functions are available during init */ 314 KEEP(*(.text._GLOBAL__sub_*)); 315 . = ALIGN(8); 316 } 317 318#ifdef CFG_CORE_RODATA_NOEXEC 319 . = ALIGN(SMALL_PAGE_SIZE); 320#endif 321 __flatmap_init_rx_size = . - __flatmap_init_rx_start; 322 __flatmap_init_ro_start = .; 323 324 .rodata_init : { 325#include <rodata_init.ld.S> 326 327 . = ALIGN(8); 328 KEEP(*(SORT(.scattered_array*))); 329 330 . = ALIGN(8); 331 __rodata_init_end = .; 332 } 333 334 __init_end = ALIGN(__rodata_init_end, SMALL_PAGE_SIZE); 335 __get_tee_init_end = __init_end; 336 __init_size = __init_end - __init_start; 337 338 /* vcore flat map stops here. No need to page align, rodata follows. */ 339 __flatmap_init_ro_size = __init_end - __flatmap_init_ro_start; 340 341 .rodata_pageable : ALIGN(8) { 342 *(.rodata*) 343 } 344 345#ifdef CFG_CORE_RODATA_NOEXEC 346 . = ALIGN(SMALL_PAGE_SIZE); 347#endif 348 349 .text_pageable : ALIGN(8) { 350 *(.text*) 351 . = ALIGN(SMALL_PAGE_SIZE); 352 } 353 354 __pageable_part_end = .; 355 __pageable_part_start = __init_end; 356 __pageable_start = __init_start; 357 __pageable_end = __pageable_part_end; 358 359 ASSERT(TEE_LOAD_ADDR >= TEE_RAM_START, 360 "Load address before start of physical memory") 361 ASSERT(TEE_LOAD_ADDR < (TEE_RAM_START + TEE_RAM_PH_SIZE), 362 "Load address after end of physical memory") 363 ASSERT((TEE_RAM_VA_START + TEE_RAM_PH_SIZE - __init_end) > 364 SMALL_PAGE_SIZE, "Too few free pages to initialize paging") 365 366 367#endif /*CFG_WITH_PAGER*/ 368 369#ifdef CFG_CORE_SANITIZE_KADDRESS 370 . = TEE_RAM_VA_START + (TEE_RAM_VA_SIZE * 8) / 9 - 8; 371 . = ALIGN(8); 372 .asan_shadow : { 373 __asan_shadow_start = .; 374 . += TEE_RAM_VA_SIZE / 9; 375 __asan_shadow_end = .; 376 __asan_shadow_size = __asan_shadow_end - __asan_shadow_start; 377 } 378#endif /*CFG_CORE_SANITIZE_KADDRESS*/ 379 380 __end = .; 381 382#ifndef CFG_WITH_PAGER 383 __init_size = __data_end - TEE_TEXT_VA_START; 384#endif 385 /* 386 * Guard against moving the location counter backwards in the assignment 387 * below. 388 */ 389 ASSERT(. <= (TEE_RAM_VA_START + TEE_RAM_VA_SIZE), 390 "TEE_RAM_VA_SIZE is too small") 391 . = TEE_RAM_VA_START + TEE_RAM_VA_SIZE; 392 393 _end_of_ram = .; 394 395#ifndef CFG_WITH_PAGER 396 __flatmap_unpg_rw_size = _end_of_ram - __flatmap_unpg_rw_start; 397 __get_tee_init_end = .; 398#endif 399 400 /* 401 * These regions will not become a normal part of the dumped 402 * binary, instead some are interpreted by the dump script and 403 * converted into suitable format for OP-TEE itself to use. 404 */ 405 .dynamic : { *(.dynamic) } 406 .hash : { *(.hash) } 407 .dynsym : { *(.dynsym) } 408 .dynstr : { *(.dynstr) } 409 410 .rel : { 411 *(.rel.*) 412 } 413 .rela : { 414 *(.rela.*) 415 } 416#ifndef CFG_CORE_ASLR 417 ASSERT(SIZEOF(.rel) == 0, "Relocation entries not expected") 418 ASSERT(SIZEOF(.rela) == 0, "Relocation entries not expected") 419#endif 420 421 /DISCARD/ : { 422 /* Strip unnecessary stuff */ 423 *(.comment .note .eh_frame .interp) 424 /* Strip meta variables */ 425 *(__keep_meta_vars*) 426 } 427 428} 429 430/* Unpaged read-only memories */ 431__vcore_unpg_rx_start = __flatmap_unpg_rx_start; 432__vcore_unpg_ro_start = __flatmap_unpg_ro_start; 433#ifdef CFG_CORE_RODATA_NOEXEC 434__vcore_unpg_rx_size = __flatmap_unpg_rx_size; 435__vcore_unpg_ro_size = __flatmap_unpg_ro_size; 436#else 437__vcore_unpg_rx_size = __flatmap_unpg_rx_size + __flatmap_unpg_ro_size; 438__vcore_unpg_ro_size = 0; 439#endif 440__vcore_unpg_rx_end = __vcore_unpg_rx_start + __vcore_unpg_rx_size; 441__vcore_unpg_ro_end = __vcore_unpg_ro_start + __vcore_unpg_ro_size; 442 443/* Unpaged read-write memory */ 444__vcore_unpg_rw_start = __flatmap_unpg_rw_start; 445__vcore_unpg_rw_size = __flatmap_unpg_rw_size; 446__vcore_unpg_rw_end = __vcore_unpg_rw_start + __vcore_unpg_rw_size; 447 448#ifdef CFG_VIRTUALIZATION 449/* Nexus read-write memory */ 450__vcore_nex_rw_start = __flatmap_nex_rw_start; 451__vcore_nex_rw_size = __flatmap_nex_rw_size; 452__vcore_nex_rw_end = __vcore_nex_rw_start + __vcore_nex_rw_size; 453#endif 454 455#ifdef CFG_WITH_PAGER 456/* 457 * Core init mapping shall cover up to end of the physical RAM. 458 * This is required since the hash table is appended to the 459 * binary data after the firmware build sequence. 460 */ 461#define __FLATMAP_PAGER_TRAILING_SPACE \ 462 (TEE_RAM_START + TEE_RAM_PH_SIZE - \ 463 (__flatmap_init_ro_start + __flatmap_init_ro_size)) 464 465/* Paged/init read-only memories */ 466__vcore_init_rx_start = __flatmap_init_rx_start; 467__vcore_init_ro_start = __flatmap_init_ro_start; 468#ifdef CFG_CORE_RODATA_NOEXEC 469__vcore_init_rx_size = __flatmap_init_rx_size; 470__vcore_init_ro_size = __flatmap_init_ro_size + __FLATMAP_PAGER_TRAILING_SPACE; 471#else 472__vcore_init_rx_size = __flatmap_init_rx_size + __flatmap_init_ro_size + 473 __FLATMAP_PAGER_TRAILING_SPACE; 474__vcore_init_ro_size = 0; 475#endif /* CFG_CORE_RODATA_NOEXEC */ 476__vcore_init_rx_end = __vcore_init_rx_start + __vcore_init_rx_size; 477__vcore_init_ro_end = __vcore_init_ro_start + __vcore_init_ro_size; 478#endif /* CFG_WITH_PAGER */ 479 480#ifdef CFG_CORE_SANITIZE_KADDRESS 481__asan_map_start = (__asan_shadow_start / SMALL_PAGE_SIZE) * 482 SMALL_PAGE_SIZE; 483__asan_map_end = ((__asan_shadow_end - 1) / SMALL_PAGE_SIZE) * 484 SMALL_PAGE_SIZE + SMALL_PAGE_SIZE; 485__asan_map_size = __asan_map_end - __asan_map_start; 486#endif /*CFG_CORE_SANITIZE_KADDRESS*/ 487