1/* SPDX-License-Identifier: (BSD-2-Clause AND MIT) */ 2/* 3 * Copyright (c) 2014, Linaro Limited 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright notice, 10 * this list of conditions and the following disclaimer. 11 * 12 * 2. Redistributions in binary form must reproduce the above copyright notice, 13 * this list of conditions and the following disclaimer in the documentation 14 * and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 20 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29/* 30 * Copyright (c) 2008-2010 Travis Geiselbrecht 31 * 32 * Permission is hereby granted, free of charge, to any person obtaining 33 * a copy of this software and associated documentation files 34 * (the "Software"), to deal in the Software without restriction, 35 * including without limitation the rights to use, copy, modify, merge, 36 * publish, distribute, sublicense, and/or sell copies of the Software, 37 * and to permit persons to whom the Software is furnished to do so, 38 * subject to the following conditions: 39 * 40 * The above copyright notice and this permission notice shall be 41 * included in all copies or substantial portions of the Software. 42 * 43 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 44 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 45 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 46 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY 47 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 48 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 49 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 50 */ 51 52#include <mm/core_mmu.h> 53#include <platform_config.h> 54#include <util.h> 55 56/* 57 * TEE_RAM_VA_START: The start virtual address of the TEE RAM 58 * TEE_TEXT_VA_START: The start virtual address of the OP-TEE text 59 */ 60#define TEE_RAM_VA_START TEE_RAM_START 61#define TEE_TEXT_VA_START (TEE_RAM_VA_START + \ 62 (TEE_LOAD_ADDR - TEE_RAM_START)) 63 64OUTPUT_FORMAT(CFG_KERN_LINKER_FORMAT) 65OUTPUT_ARCH(CFG_KERN_LINKER_ARCH) 66 67ENTRY(_start) 68SECTIONS 69{ 70 . = TEE_TEXT_VA_START; 71#ifdef ARM32 72 ASSERT(!(TEE_TEXT_VA_START & 31), "text start should align to 32bytes") 73#endif 74#ifdef ARM64 75 ASSERT(!(TEE_TEXT_VA_START & 127), "text start should align to 128bytes") 76#endif 77 __text_start = .; 78 79 /* 80 * Memory between TEE_TEXT_VA_START and page aligned rounded down 81 * value will be mapped with unpaged "text" section attributes: 82 * likely to be read-only/executable. 83 */ 84 __flatmap_unpg_rx_start = ROUNDDOWN(__text_start, SMALL_PAGE_SIZE); 85 86 .text : { 87 KEEP(*(.text._start)) 88 KEEP(*(.text.init .text.plat_cpu_reset_early \ 89 .text.reset .text.reset_primary .text.unhandled_cpu \ 90 .text.__assert_flat_mapped_range)) 91 92 . = ALIGN(8); 93 __initcall_start = .; 94 KEEP(*(.initcall1)) 95 KEEP(*(.initcall2)) 96 KEEP(*(.initcall3)) 97 KEEP(*(.initcall4)) 98 __initcall_end = .; 99 100#ifdef CFG_WITH_PAGER 101 *(.text) 102/* Include list of sections needed for paging */ 103#include <text_unpaged.ld.S> 104#else 105 *(.text .text.*) 106#endif 107 *(.sram.text.glue_7* .gnu.linkonce.t.*) 108 . = ALIGN(8); 109 } 110 __text_end = .; 111 112#ifdef CFG_CORE_RODATA_NOEXEC 113 . = ALIGN(SMALL_PAGE_SIZE); 114#endif 115 __flatmap_unpg_rx_size = . - __flatmap_unpg_rx_start; 116 __flatmap_unpg_ro_start = .; 117 118 .rodata : ALIGN(8) { 119 __rodata_start = .; 120 *(.gnu.linkonce.r.*) 121#ifdef CFG_WITH_PAGER 122 *(.rodata .rodata.__unpaged) 123#include <rodata_unpaged.ld.S> 124#else 125#ifdef CFG_DT 126 __rodata_dtdrv_start = .; 127 KEEP(*(.rodata.dtdrv)) 128 __rodata_dtdrv_end = .; 129#endif 130#ifdef CFG_EARLY_TA 131 . = ALIGN(8); 132 __rodata_early_ta_start = .; 133 KEEP(*(.rodata.early_ta)) 134 __rodata_early_ta_end = .; 135#endif 136 137 *(.rodata .rodata.*) 138 139 /* 140 * 8 to avoid unwanted padding between __start_ta_head_section 141 * and the first structure in ta_head_section, in 64-bit 142 * builds 143 */ 144 . = ALIGN(8); 145 __start_ta_head_section = . ; 146 KEEP(*(ta_head_section)) 147 __stop_ta_head_section = . ; 148 . = ALIGN(8); 149 __start_phys_mem_map_section = . ; 150 KEEP(*(phys_mem_map_section)) 151 __end_phys_mem_map_section = . ; 152 . = ALIGN(8); 153 __start_phys_sdp_mem_section = . ; 154 KEEP(*(phys_sdp_mem_section)) 155 __end_phys_sdp_mem_section = . ; 156 . = ALIGN(8); 157 __start_phys_nsec_ddr_section = . ; 158 KEEP(*(phys_nsec_ddr_section)) 159 __end_phys_nsec_ddr_section = . ; 160 . = ALIGN(8); 161 __start_phys_ddr_overall_section = . ; 162 KEEP(*(phys_ddr_overall_section)) 163 __end_phys_ddr_overall_section = . ; 164#endif 165 . = ALIGN(8); 166 __rodata_end = .; 167 } 168 169 .interp : { *(.interp) } 170 .hash : { *(.hash) } 171 .dynsym : { *(.dynsym) } 172 .dynstr : { *(.dynstr) } 173 .rel.text : { *(.rel.text) *(.rel.gnu.linkonce.t*) } 174 .rela.text : { *(.rela.text) *(.rela.gnu.linkonce.t*) } 175 .rel.data : { *(.rel.data) *(.rel.gnu.linkonce.d*) } 176 .rela.data : { *(.rela.data) *(.rela.gnu.linkonce.d*) } 177 .rel.rodata : { *(.rel.rodata) *(.rel.gnu.linkonce.r*) } 178 .rela.rodata : { *(.rela.rodata) *(.rela.gnu.linkonce.r*) } 179 .rel.got : { *(.rel.got) } 180 .rela.got : { *(.rela.got) } 181 .rel.ctors : { *(.rel.ctors) } 182 .rela.ctors : { *(.rela.ctors) } 183 .rel.dtors : { *(.rel.dtors) } 184 .rela.dtors : { *(.rela.dtors) } 185 .rel.init : { *(.rel.init) } 186 .rela.init : { *(.rela.init) } 187 .rel.fini : { *(.rel.fini) } 188 .rela.fini : { *(.rela.fini) } 189 .rel.bss : { *(.rel.bss) } 190 .rela.bss : { *(.rela.bss) } 191 .rel.plt : { *(.rel.plt) } 192 .rela.plt : { *(.rela.plt) } 193 .init : { *(.init) } =0x9090 194 .plt : { *(.plt) } 195 196 /* .ARM.exidx is sorted, so has to go in its own output section. */ 197 .ARM.exidx : { 198 __exidx_start = .; 199 *(.ARM.exidx* .gnu.linkonce.armexidx.*) 200 __exidx_end = .; 201 } 202 203 .ARM.extab : { 204 __extab_start = .; 205 *(.ARM.extab*) 206 __extab_end = .; 207 } 208 209 /* Start page aligned read-write memory */ 210#ifdef CFG_CORE_RWDATA_NOEXEC 211 . = ALIGN(SMALL_PAGE_SIZE); 212#endif 213 __flatmap_unpg_ro_size = . - __flatmap_unpg_ro_start; 214 __flatmap_unpg_rw_start = .; 215 216 .data : ALIGN(8) { 217 /* writable data */ 218 __data_start_rom = .; 219 /* in one segment binaries, the rom data address is on top 220 of the ram data address */ 221 __data_start = .; 222 *(.data .data.* .gnu.linkonce.d.*) 223 . = ALIGN(8); 224 } 225 226 .ctors : ALIGN(8) { 227 __ctor_list = .; 228 KEEP(*(.ctors .ctors.* .init_array .init_array.*)) 229 __ctor_end = .; 230 } 231 .dtors : ALIGN(8) { 232 __dtor_list = .; 233 KEEP(*(.dtors .dtors.* .fini_array .fini_array.*)) 234 __dtor_end = .; 235 } 236 .got : { *(.got.plt) *(.got) } 237 .dynamic : { *(.dynamic) } 238 239 /* unintialized data */ 240 .bss : { 241 __data_end = .; 242 __bss_start = .; 243 *(.bss .bss.*) 244 *(.gnu.linkonce.b.*) 245 *(COMMON) 246 . = ALIGN(8); 247 __bss_end = .; 248 } 249 250 .heap1 (NOLOAD) : { 251 /* 252 * We're keeping track of the padding added before the 253 * .nozi section so we can do something useful with 254 * this otherwise wasted memory. 255 */ 256 __heap1_start = .; 257#ifndef CFG_WITH_PAGER 258 . += CFG_CORE_HEAP_SIZE; 259#endif 260 . = ALIGN(16 * 1024); 261 __heap1_end = .; 262 } 263 264 /* 265 * Uninitialized data that shouldn't be zero initialized at 266 * runtime. 267 * 268 * L1 mmu table requires 16 KiB alignment 269 */ 270 .nozi (NOLOAD) : { 271 __nozi_start = .; 272 ASSERT(!(__nozi_start & (16 * 1024 - 1)), "align nozi to 16kB"); 273 274 KEEP(*(.nozi .nozi.*)) 275 . = ALIGN(16); 276 __nozi_end = .; 277 __nozi_stack_start = .; 278 KEEP(*(.nozi_stack)) 279 . = ALIGN(8); 280 __nozi_stack_end = .; 281 } 282 283#ifdef CFG_WITH_PAGER 284 .heap2 (NOLOAD) : { 285 __heap2_start = .; 286 /* 287 * Reserve additional memory for heap, the total should be 288 * at least CFG_CORE_HEAP_SIZE, but count what has already 289 * been reserved in .heap1 290 */ 291 . += CFG_CORE_HEAP_SIZE - (__heap1_end - __heap1_start); 292 . = ALIGN(SMALL_PAGE_SIZE); 293 __heap2_end = .; 294 } 295 296 /* Start page aligned read-only memory */ 297 __flatmap_unpg_rw_size = . - __flatmap_unpg_rw_start; 298 299 __init_start = .; 300 __flatmap_init_rx_start = .; 301 302 ASSERT(!(__flatmap_init_rx_start & (SMALL_PAGE_SIZE - 1)), 303 "read-write memory is not paged aligned") 304 305 .text_init : { 306/* 307 * Include list of sections needed for boot initialization, this list 308 * overlaps with unpaged.ld.S but since unpaged.ld.S is first all those 309 * sections will go into the unpaged area. 310 */ 311#include <text_init.ld.S> 312 KEEP(*(.text.startup.*)); 313 /* Make sure constructor functions are available during init */ 314 KEEP(*(.text._GLOBAL__sub_*)); 315 . = ALIGN(8); 316 } 317 318#ifdef CFG_CORE_RODATA_NOEXEC 319 . = ALIGN(SMALL_PAGE_SIZE); 320#endif 321 __flatmap_init_rx_size = . - __flatmap_init_rx_start; 322 __flatmap_init_ro_start = .; 323 324 .rodata_init : { 325#include <rodata_init.ld.S> 326 . = ALIGN(8); 327 __start_phys_mem_map_section = . ; 328 KEEP(*(phys_mem_map_section)) 329 __end_phys_mem_map_section = . ; 330 . = ALIGN(8); 331 __start_phys_sdp_mem_section = . ; 332 KEEP(*(phys_sdp_mem_section)) 333 __end_phys_sdp_mem_section = . ; 334 . = ALIGN(8); 335 __start_phys_nsec_ddr_section = . ; 336 KEEP(*(phys_nsec_ddr_section)) 337 __end_phys_nsec_ddr_section = . ; 338 . = ALIGN(8); 339 __start_phys_ddr_overall_section = . ; 340 KEEP(*(phys_ddr_overall_section)) 341 __end_phys_ddr_overall_section = . ; 342 . = ALIGN(8); 343 __rodata_init_end = .; 344 } 345 __rodata_init_end = .; 346 347 __init_end = ROUNDUP(__rodata_init_end, SMALL_PAGE_SIZE); 348 __init_size = __init_end - __init_start; 349 350 /* vcore flat map stops here. No need to page align, rodata follows. */ 351 __flatmap_init_ro_size = __init_end - __flatmap_init_ro_start; 352 353 .rodata_pageable : ALIGN(8) { 354#ifdef CFG_DT 355 __rodata_dtdrv_start = .; 356 KEEP(*(.rodata.dtdrv)) 357 __rodata_dtdrv_end = .; 358#endif 359#ifdef CFG_EARLY_TA 360 . = ALIGN(8); 361 __rodata_early_ta_start = .; 362 KEEP(*(.rodata.early_ta)) 363 __rodata_early_ta_end = .; 364#endif 365 *(.rodata*) 366 /* 367 * 8 to avoid unwanted padding between __start_ta_head_section 368 * and the first structure in ta_head_section, in 64-bit 369 * builds 370 */ 371 . = ALIGN(8); 372 __start_ta_head_section = . ; 373 KEEP(*(ta_head_section)) 374 __stop_ta_head_section = . ; 375 } 376 377#ifdef CFG_CORE_RODATA_NOEXEC 378 . = ALIGN(SMALL_PAGE_SIZE); 379#endif 380 381 .text_pageable : ALIGN(8) { 382 *(.text*) 383 . = ALIGN(SMALL_PAGE_SIZE); 384 } 385 386 __pageable_part_end = .; 387 __pageable_part_start = __init_end; 388 __pageable_start = __init_start; 389 __pageable_end = __pageable_part_end; 390 391 /* 392 * Assign a safe spot to store the hashes of the pages before 393 * heap is initialized. 394 */ 395 __tmp_hashes_start = __init_end; 396 __tmp_hashes_size = ((__pageable_end - __pageable_start) / 397 SMALL_PAGE_SIZE) * 32; 398 __tmp_hashes_end = __tmp_hashes_start + __tmp_hashes_size; 399 400 __init_mem_usage = __tmp_hashes_end - TEE_TEXT_VA_START; 401 402 ASSERT(TEE_LOAD_ADDR >= TEE_RAM_START, 403 "Load address before start of physical memory") 404 ASSERT(TEE_LOAD_ADDR < (TEE_RAM_START + TEE_RAM_PH_SIZE), 405 "Load address after end of physical memory") 406 ASSERT(__tmp_hashes_end < (TEE_RAM_VA_START + TEE_RAM_PH_SIZE), 407 "OP-TEE can't fit init part into available physical memory") 408 ASSERT((TEE_RAM_VA_START + TEE_RAM_PH_SIZE - __init_end) > 409 SMALL_PAGE_SIZE, "Too few free pages to initialize paging") 410 411 412#endif /*CFG_WITH_PAGER*/ 413 414#ifdef CFG_CORE_SANITIZE_KADDRESS 415 . = TEE_RAM_VA_START + (TEE_RAM_VA_SIZE * 8) / 9 - 8; 416 . = ALIGN(8); 417 .asan_shadow : { 418 __asan_shadow_start = .; 419 . += TEE_RAM_VA_SIZE / 9; 420 __asan_shadow_end = .; 421 __asan_shadow_size = __asan_shadow_end - __asan_shadow_start; 422 } 423#endif /*CFG_CORE_SANITIZE_KADDRESS*/ 424 425 __end = .; 426 427#ifndef CFG_WITH_PAGER 428 __init_size = __data_end - TEE_TEXT_VA_START; 429 __init_mem_usage = __end - TEE_TEXT_VA_START; 430#endif 431 /* 432 * Guard against moving the location counter backwards in the assignment 433 * below. 434 */ 435 ASSERT(. <= (TEE_RAM_VA_START + TEE_RAM_VA_SIZE), 436 "TEE_RAM_VA_SIZE is too small") 437 . = TEE_RAM_VA_START + TEE_RAM_VA_SIZE; 438 439 _end_of_ram = .; 440 441#ifndef CFG_WITH_PAGER 442 __flatmap_unpg_rw_size = _end_of_ram - __flatmap_unpg_rw_start; 443#endif 444 445 /DISCARD/ : { 446 /* Strip unnecessary stuff */ 447 *(.comment .note .eh_frame) 448 /* Strip meta variables */ 449 *(__keep_meta_vars*) 450 } 451 452} 453 454/* Unpaged read-only memories */ 455__vcore_unpg_rx_start = __flatmap_unpg_rx_start; 456__vcore_unpg_ro_start = __flatmap_unpg_ro_start; 457#ifdef CFG_CORE_RODATA_NOEXEC 458__vcore_unpg_rx_size = __flatmap_unpg_rx_size; 459__vcore_unpg_ro_size = __flatmap_unpg_ro_size; 460#else 461__vcore_unpg_rx_size = __flatmap_unpg_rx_size + __flatmap_unpg_ro_size; 462__vcore_unpg_ro_size = 0; 463#endif 464 465/* Unpaged read-write memory */ 466__vcore_unpg_rw_start = __flatmap_unpg_rw_start; 467__vcore_unpg_rw_size = __flatmap_unpg_rw_size; 468 469#ifdef CFG_WITH_PAGER 470/* 471 * Core init mapping shall cover up to end of the physical RAM. 472 * This is required since the hash table is appended to the 473 * binary data after the firmware build sequence. 474 */ 475#define __FLATMAP_PAGER_TRAILING_SPACE \ 476 (TEE_RAM_START + TEE_RAM_PH_SIZE - \ 477 (__flatmap_init_ro_start + __flatmap_init_ro_size)) 478 479/* Paged/init read-only memories */ 480__vcore_init_rx_start = __flatmap_init_rx_start; 481__vcore_init_ro_start = __flatmap_init_ro_start; 482#ifdef CFG_CORE_RODATA_NOEXEC 483__vcore_init_rx_size = __flatmap_init_rx_size; 484__vcore_init_ro_size = __flatmap_init_ro_size + __FLATMAP_PAGER_TRAILING_SPACE; 485#else 486__vcore_init_rx_size = __flatmap_init_rx_size + __flatmap_init_ro_size + 487 __FLATMAP_PAGER_TRAILING_SPACE; 488__vcore_init_ro_size = 0; 489#endif /* CFG_CORE_RODATA_NOEXEC */ 490#endif /* CFG_WITH_PAGER */ 491 492#ifdef CFG_CORE_SANITIZE_KADDRESS 493__asan_map_start = (__asan_shadow_start / SMALL_PAGE_SIZE) * 494 SMALL_PAGE_SIZE; 495__asan_map_end = ((__asan_shadow_end - 1) / SMALL_PAGE_SIZE) * 496 SMALL_PAGE_SIZE + SMALL_PAGE_SIZE; 497__asan_map_size = __asan_map_end - __asan_map_start; 498#endif /*CFG_CORE_SANITIZE_KADDRESS*/ 499