1/* SPDX-License-Identifier: (BSD-2-Clause AND MIT) */ 2/* 3 * Copyright (c) 2014, Linaro Limited 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright notice, 10 * this list of conditions and the following disclaimer. 11 * 12 * 2. Redistributions in binary form must reproduce the above copyright notice, 13 * this list of conditions and the following disclaimer in the documentation 14 * and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 20 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29/* 30 * Copyright (c) 2008-2010 Travis Geiselbrecht 31 * 32 * Permission is hereby granted, free of charge, to any person obtaining 33 * a copy of this software and associated documentation files 34 * (the "Software"), to deal in the Software without restriction, 35 * including without limitation the rights to use, copy, modify, merge, 36 * publish, distribute, sublicense, and/or sell copies of the Software, 37 * and to permit persons to whom the Software is furnished to do so, 38 * subject to the following conditions: 39 * 40 * The above copyright notice and this permission notice shall be 41 * included in all copies or substantial portions of the Software. 42 * 43 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 44 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 45 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 46 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY 47 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 48 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 49 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 50 */ 51 52#include <mm/core_mmu.h> 53#include <platform_config.h> 54#include <util.h> 55 56/* 57 * TEE_RAM_VA_START: The start virtual address of the TEE RAM 58 * TEE_TEXT_VA_START: The start virtual address of the OP-TEE text 59 */ 60#define TEE_RAM_VA_START TEE_RAM_START 61#define TEE_TEXT_VA_START (TEE_RAM_VA_START + \ 62 (TEE_LOAD_ADDR - TEE_RAM_START)) 63 64OUTPUT_FORMAT(CFG_KERN_LINKER_FORMAT) 65OUTPUT_ARCH(CFG_KERN_LINKER_ARCH) 66 67ENTRY(_start) 68SECTIONS 69{ 70 . = TEE_TEXT_VA_START; 71#ifdef ARM32 72 ASSERT(!(TEE_TEXT_VA_START & 31), "text start should align to 32bytes") 73#endif 74#ifdef ARM64 75 ASSERT(!(TEE_TEXT_VA_START & 127), "text start should align to 128bytes") 76#endif 77 __text_start = .; 78 79 /* 80 * Memory between TEE_TEXT_VA_START and page aligned rounded down 81 * value will be mapped with unpaged "text" section attributes: 82 * likely to be read-only/executable. 83 */ 84 __flatmap_unpg_rx_start = ROUNDDOWN(__text_start, SMALL_PAGE_SIZE); 85 86 .text : { 87 KEEP(*(.text._start)) 88 KEEP(*(.text.init .text.plat_cpu_reset_early \ 89 .text.reset .text.reset_primary .text.unhandled_cpu \ 90 .text.__assert_flat_mapped_range)) 91 92#ifdef CFG_WITH_PAGER 93 *(.text) 94/* Include list of sections needed for paging */ 95#include <text_unpaged.ld.S> 96#else 97 *(.text .text.*) 98#endif 99 *(.sram.text.glue_7* .gnu.linkonce.t.*) 100 . = ALIGN(8); 101 } 102 __text_end = .; 103 104#ifdef CFG_CORE_RODATA_NOEXEC 105 . = ALIGN(SMALL_PAGE_SIZE); 106#endif 107 __flatmap_unpg_rx_size = . - __flatmap_unpg_rx_start; 108 __flatmap_unpg_ro_start = .; 109 110 .rodata : ALIGN(8) { 111 __rodata_start = .; 112 *(.gnu.linkonce.r.*) 113#ifdef CFG_WITH_PAGER 114 *(.rodata .rodata.__unpaged) 115#include <rodata_unpaged.ld.S> 116#else 117#ifdef CFG_DT 118 __rodata_dtdrv_start = .; 119 KEEP(*(.rodata.dtdrv)) 120 __rodata_dtdrv_end = .; 121#endif 122#ifdef CFG_EARLY_TA 123 . = ALIGN(8); 124 __rodata_early_ta_start = .; 125 KEEP(*(.rodata.early_ta)) 126 __rodata_early_ta_end = .; 127#endif 128 129 *(.rodata .rodata.*) 130 . = ALIGN(8); 131 KEEP(*(SORT(.scattered_array*))); 132#endif 133 . = ALIGN(8); 134 __rodata_end = .; 135 } 136 137 .interp : { *(.interp) } 138 .hash : { *(.hash) } 139 .dynsym : { *(.dynsym) } 140 .dynstr : { *(.dynstr) } 141 .rel.text : { *(.rel.text) *(.rel.gnu.linkonce.t*) } 142 .rela.text : { *(.rela.text) *(.rela.gnu.linkonce.t*) } 143 .rel.data : { *(.rel.data) *(.rel.gnu.linkonce.d*) } 144 .rela.data : { *(.rela.data) *(.rela.gnu.linkonce.d*) } 145 .rel.rodata : { *(.rel.rodata) *(.rel.gnu.linkonce.r*) } 146 .rela.rodata : { *(.rela.rodata) *(.rela.gnu.linkonce.r*) } 147 .rel.got : { *(.rel.got) } 148 .rela.got : { *(.rela.got) } 149 .rel.ctors : { *(.rel.ctors) } 150 .rela.ctors : { *(.rela.ctors) } 151 .rel.dtors : { *(.rel.dtors) } 152 .rela.dtors : { *(.rela.dtors) } 153 .rel.init : { *(.rel.init) } 154 .rela.init : { *(.rela.init) } 155 .rel.fini : { *(.rel.fini) } 156 .rela.fini : { *(.rela.fini) } 157 .rel.bss : { *(.rel.bss) } 158 .rela.bss : { *(.rela.bss) } 159 .rel.plt : { *(.rel.plt) } 160 .rela.plt : { *(.rela.plt) } 161 .init : { *(.init) } =0x9090 162 .plt : { *(.plt) } 163 164 /* .ARM.exidx is sorted, so has to go in its own output section. */ 165 .ARM.exidx : { 166 __exidx_start = .; 167 *(.ARM.exidx* .gnu.linkonce.armexidx.*) 168 __exidx_end = .; 169 } 170 171 .ARM.extab : { 172 __extab_start = .; 173 *(.ARM.extab*) 174 __extab_end = .; 175 } 176 177 /* Start page aligned read-write memory */ 178#ifdef CFG_CORE_RWDATA_NOEXEC 179 . = ALIGN(SMALL_PAGE_SIZE); 180#endif 181 __flatmap_unpg_ro_size = . - __flatmap_unpg_ro_start; 182 183#ifdef CFG_VIRTUALIZATION 184 __flatmap_nex_rw_start = . ; 185 .nex_data : ALIGN(8) { 186 *(.nex_data .nex_data.*) 187 } 188 189 .nex_bss : ALIGN(8) { 190 __nex_bss_start = .; 191 *(.nex_bss .nex_bss.*) 192 __nex_bss_end = .; 193 } 194 195 /* 196 * We want to keep all nexus memory in one place, because 197 * it should be always mapped and it is easier to map one 198 * memory region than two. 199 * Next section are NOLOAD ones, but they are followed 200 * by sections with data. Thus, this NOLOAD section will 201 * be included in the resulting binary, filled with zeroes 202 */ 203 .nex_stack (NOLOAD) : { 204 __nozi_stack_start = .; 205 KEEP(*(.nozi_stack.stack_tmp .nozi_stack.stack_abt)) 206 . = ALIGN(8); 207 __nozi_stack_end = .; 208 } 209 210 .nex_heap (NOLOAD) : { 211 __nex_heap_start = .; 212 . += CFG_CORE_NEX_HEAP_SIZE; 213 . = ALIGN(16 * 1024); 214 __nex_heap_end = .; 215 } 216 .nex_nozi (NOLOAD) : { 217 ASSERT(!( . & (16 * 1024 - 1)), "align nozi to 16kB"); 218 KEEP(*(.nozi.mmu.l1 .nozi.mmu.l2)) 219 } 220 221 . = ALIGN(SMALL_PAGE_SIZE); 222 223 __flatmap_nex_rw_size = . - __flatmap_nex_rw_start; 224 __flatmap_nex_rw_end = .; 225#endif 226 227 __flatmap_unpg_rw_start = .; 228 229 .data : ALIGN(8) { 230 /* writable data */ 231 __data_start_rom = .; 232 /* in one segment binaries, the rom data address is on top 233 of the ram data address */ 234 __data_start = .; 235 *(.data .data.* .gnu.linkonce.d.*) 236 . = ALIGN(8); 237 } 238 239 .ctors : ALIGN(8) { 240 __ctor_list = .; 241 KEEP(*(.ctors .ctors.* .init_array .init_array.*)) 242 __ctor_end = .; 243 } 244 .dtors : ALIGN(8) { 245 __dtor_list = .; 246 KEEP(*(.dtors .dtors.* .fini_array .fini_array.*)) 247 __dtor_end = .; 248 } 249 .got : { *(.got.plt) *(.got) } 250 .dynamic : { *(.dynamic) } 251 252 /* unintialized data */ 253 .bss : { 254 __data_end = .; 255 __bss_start = .; 256 *(.bss .bss.*) 257 *(.gnu.linkonce.b.*) 258 *(COMMON) 259 . = ALIGN(8); 260 __bss_end = .; 261 } 262 263 .heap1 (NOLOAD) : { 264 /* 265 * We're keeping track of the padding added before the 266 * .nozi section so we can do something useful with 267 * this otherwise wasted memory. 268 */ 269 __heap1_start = .; 270#ifndef CFG_WITH_PAGER 271 . += CFG_CORE_HEAP_SIZE; 272#endif 273 . = ALIGN(16 * 1024); 274 __heap1_end = .; 275 } 276 /* 277 * Uninitialized data that shouldn't be zero initialized at 278 * runtime. 279 * 280 * L1 mmu table requires 16 KiB alignment 281 */ 282 .nozi (NOLOAD) : { 283 __nozi_start = .; 284 ASSERT(!(__nozi_start & (16 * 1024 - 1)), "align nozi to 16kB"); 285 286 KEEP(*(.nozi .nozi.*)) 287 . = ALIGN(16); 288 __nozi_end = .; 289 /* 290 * If virtualization is enabled, abt and tmp stacks will placed 291 * at above .nex_stack section and thread stacks will go there 292 */ 293 __nozi_stack_start = .; 294 KEEP(*(.nozi_stack .nozi_stack.*)) 295 . = ALIGN(8); 296 __nozi_stack_end = .; 297 } 298 299#ifdef CFG_WITH_PAGER 300 .heap2 (NOLOAD) : { 301 __heap2_start = .; 302 /* 303 * Reserve additional memory for heap, the total should be 304 * at least CFG_CORE_HEAP_SIZE, but count what has already 305 * been reserved in .heap1 306 */ 307 . += CFG_CORE_HEAP_SIZE - (__heap1_end - __heap1_start); 308 . = ALIGN(SMALL_PAGE_SIZE); 309 __heap2_end = .; 310 } 311 312 /* Start page aligned read-only memory */ 313 __flatmap_unpg_rw_size = . - __flatmap_unpg_rw_start; 314 315 __init_start = .; 316 __flatmap_init_rx_start = .; 317 318 ASSERT(!(__flatmap_init_rx_start & (SMALL_PAGE_SIZE - 1)), 319 "read-write memory is not paged aligned") 320 321 .text_init : { 322/* 323 * Include list of sections needed for boot initialization, this list 324 * overlaps with unpaged.ld.S but since unpaged.ld.S is first all those 325 * sections will go into the unpaged area. 326 */ 327#include <text_init.ld.S> 328 KEEP(*(.text.startup.*)); 329 /* Make sure constructor functions are available during init */ 330 KEEP(*(.text._GLOBAL__sub_*)); 331 . = ALIGN(8); 332 } 333 334#ifdef CFG_CORE_RODATA_NOEXEC 335 . = ALIGN(SMALL_PAGE_SIZE); 336#endif 337 __flatmap_init_rx_size = . - __flatmap_init_rx_start; 338 __flatmap_init_ro_start = .; 339 340 .rodata_init : { 341#include <rodata_init.ld.S> 342 343 . = ALIGN(8); 344 KEEP(*(SORT(.scattered_array*))); 345 346 . = ALIGN(8); 347 __rodata_init_end = .; 348 } 349 __rodata_init_end = .; 350 351 __init_end = ROUNDUP(__rodata_init_end, SMALL_PAGE_SIZE); 352 __init_size = __init_end - __init_start; 353 354 /* vcore flat map stops here. No need to page align, rodata follows. */ 355 __flatmap_init_ro_size = __init_end - __flatmap_init_ro_start; 356 357 .rodata_pageable : ALIGN(8) { 358#ifdef CFG_DT 359 __rodata_dtdrv_start = .; 360 KEEP(*(.rodata.dtdrv)) 361 __rodata_dtdrv_end = .; 362#endif 363#ifdef CFG_EARLY_TA 364 . = ALIGN(8); 365 __rodata_early_ta_start = .; 366 KEEP(*(.rodata.early_ta)) 367 __rodata_early_ta_end = .; 368#endif 369 *(.rodata*) 370 } 371 372#ifdef CFG_CORE_RODATA_NOEXEC 373 . = ALIGN(SMALL_PAGE_SIZE); 374#endif 375 376 .text_pageable : ALIGN(8) { 377 *(.text*) 378 . = ALIGN(SMALL_PAGE_SIZE); 379 } 380 381 __pageable_part_end = .; 382 __pageable_part_start = __init_end; 383 __pageable_start = __init_start; 384 __pageable_end = __pageable_part_end; 385 386 /* 387 * Assign a safe spot to store the hashes of the pages before 388 * heap is initialized. 389 */ 390 __tmp_hashes_start = __init_end; 391 __tmp_hashes_size = ((__pageable_end - __pageable_start) / 392 SMALL_PAGE_SIZE) * 32; 393 __tmp_hashes_end = __tmp_hashes_start + __tmp_hashes_size; 394 395 __init_mem_usage = __tmp_hashes_end - TEE_TEXT_VA_START; 396 397 ASSERT(TEE_LOAD_ADDR >= TEE_RAM_START, 398 "Load address before start of physical memory") 399 ASSERT(TEE_LOAD_ADDR < (TEE_RAM_START + TEE_RAM_PH_SIZE), 400 "Load address after end of physical memory") 401 ASSERT(__tmp_hashes_end < (TEE_RAM_VA_START + TEE_RAM_PH_SIZE), 402 "OP-TEE can't fit init part into available physical memory") 403 ASSERT((TEE_RAM_VA_START + TEE_RAM_PH_SIZE - __init_end) > 404 SMALL_PAGE_SIZE, "Too few free pages to initialize paging") 405 406 407#endif /*CFG_WITH_PAGER*/ 408 409#ifdef CFG_CORE_SANITIZE_KADDRESS 410 . = TEE_RAM_VA_START + (TEE_RAM_VA_SIZE * 8) / 9 - 8; 411 . = ALIGN(8); 412 .asan_shadow : { 413 __asan_shadow_start = .; 414 . += TEE_RAM_VA_SIZE / 9; 415 __asan_shadow_end = .; 416 __asan_shadow_size = __asan_shadow_end - __asan_shadow_start; 417 } 418#endif /*CFG_CORE_SANITIZE_KADDRESS*/ 419 420 __end = .; 421 422#ifndef CFG_WITH_PAGER 423 __init_size = __data_end - TEE_TEXT_VA_START; 424 __init_mem_usage = __end - TEE_TEXT_VA_START; 425#endif 426 /* 427 * Guard against moving the location counter backwards in the assignment 428 * below. 429 */ 430 ASSERT(. <= (TEE_RAM_VA_START + TEE_RAM_VA_SIZE), 431 "TEE_RAM_VA_SIZE is too small") 432 . = TEE_RAM_VA_START + TEE_RAM_VA_SIZE; 433 434 _end_of_ram = .; 435 436#ifndef CFG_WITH_PAGER 437 __flatmap_unpg_rw_size = _end_of_ram - __flatmap_unpg_rw_start; 438#endif 439 440 /DISCARD/ : { 441 /* Strip unnecessary stuff */ 442 *(.comment .note .eh_frame) 443 /* Strip meta variables */ 444 *(__keep_meta_vars*) 445 } 446 447} 448 449/* Unpaged read-only memories */ 450__vcore_unpg_rx_start = __flatmap_unpg_rx_start; 451__vcore_unpg_ro_start = __flatmap_unpg_ro_start; 452#ifdef CFG_CORE_RODATA_NOEXEC 453__vcore_unpg_rx_size = __flatmap_unpg_rx_size; 454__vcore_unpg_ro_size = __flatmap_unpg_ro_size; 455#else 456__vcore_unpg_rx_size = __flatmap_unpg_rx_size + __flatmap_unpg_ro_size; 457__vcore_unpg_ro_size = 0; 458#endif 459 460/* Unpaged read-write memory */ 461__vcore_unpg_rw_start = __flatmap_unpg_rw_start; 462__vcore_unpg_rw_size = __flatmap_unpg_rw_size; 463 464#ifdef CFG_VIRTUALIZATION 465/* Nexus read-write memory */ 466PROVIDE(__vcore_nex_rw_start = __flatmap_nex_rw_start); 467PROVIDE(__vcore_nex_rw_size = __flatmap_nex_rw_size); 468#endif 469 470#ifdef CFG_WITH_PAGER 471/* 472 * Core init mapping shall cover up to end of the physical RAM. 473 * This is required since the hash table is appended to the 474 * binary data after the firmware build sequence. 475 */ 476#define __FLATMAP_PAGER_TRAILING_SPACE \ 477 (TEE_RAM_START + TEE_RAM_PH_SIZE - \ 478 (__flatmap_init_ro_start + __flatmap_init_ro_size)) 479 480/* Paged/init read-only memories */ 481__vcore_init_rx_start = __flatmap_init_rx_start; 482__vcore_init_ro_start = __flatmap_init_ro_start; 483#ifdef CFG_CORE_RODATA_NOEXEC 484__vcore_init_rx_size = __flatmap_init_rx_size; 485__vcore_init_ro_size = __flatmap_init_ro_size + __FLATMAP_PAGER_TRAILING_SPACE; 486#else 487__vcore_init_rx_size = __flatmap_init_rx_size + __flatmap_init_ro_size + 488 __FLATMAP_PAGER_TRAILING_SPACE; 489__vcore_init_ro_size = 0; 490#endif /* CFG_CORE_RODATA_NOEXEC */ 491#endif /* CFG_WITH_PAGER */ 492 493#ifdef CFG_CORE_SANITIZE_KADDRESS 494__asan_map_start = (__asan_shadow_start / SMALL_PAGE_SIZE) * 495 SMALL_PAGE_SIZE; 496__asan_map_end = ((__asan_shadow_end - 1) / SMALL_PAGE_SIZE) * 497 SMALL_PAGE_SIZE + SMALL_PAGE_SIZE; 498__asan_map_size = __asan_map_end - __asan_map_start; 499#endif /*CFG_CORE_SANITIZE_KADDRESS*/ 500