1/* SPDX-License-Identifier: (BSD-2-Clause AND MIT) */ 2/* 3 * Copyright (c) 2014, Linaro Limited 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright notice, 10 * this list of conditions and the following disclaimer. 11 * 12 * 2. Redistributions in binary form must reproduce the above copyright notice, 13 * this list of conditions and the following disclaimer in the documentation 14 * and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 20 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29/* 30 * Copyright (c) 2008-2010 Travis Geiselbrecht 31 * 32 * Permission is hereby granted, free of charge, to any person obtaining 33 * a copy of this software and associated documentation files 34 * (the "Software"), to deal in the Software without restriction, 35 * including without limitation the rights to use, copy, modify, merge, 36 * publish, distribute, sublicense, and/or sell copies of the Software, 37 * and to permit persons to whom the Software is furnished to do so, 38 * subject to the following conditions: 39 * 40 * The above copyright notice and this permission notice shall be 41 * included in all copies or substantial portions of the Software. 42 * 43 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 44 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 45 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 46 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY 47 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 48 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 49 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 50 */ 51 52#include <mm/core_mmu.h> 53#include <platform_config.h> 54#include <util.h> 55 56/* 57 * TEE_RAM_VA_START: The start virtual address of the TEE RAM 58 * TEE_TEXT_VA_START: The start virtual address of the OP-TEE text 59 */ 60#define TEE_RAM_VA_START TEE_RAM_START 61#define TEE_TEXT_VA_START (TEE_RAM_VA_START + \ 62 (TEE_LOAD_ADDR - TEE_RAM_START)) 63 64OUTPUT_FORMAT(CFG_KERN_LINKER_FORMAT) 65OUTPUT_ARCH(CFG_KERN_LINKER_ARCH) 66 67ENTRY(_start) 68SECTIONS 69{ 70 . = TEE_TEXT_VA_START; 71#ifdef ARM32 72 ASSERT(!(TEE_TEXT_VA_START & 31), "text start should align to 32bytes") 73#endif 74#ifdef ARM64 75 ASSERT(!(TEE_TEXT_VA_START & 127), "text start should align to 128bytes") 76#endif 77 __text_start = .; 78 79 /* 80 * Memory between TEE_TEXT_VA_START and page aligned rounded down 81 * value will be mapped with unpaged "text" section attributes: 82 * likely to be read-only/executable. 83 */ 84 __flatmap_unpg_rx_start = ROUNDDOWN(__text_start, SMALL_PAGE_SIZE); 85 86 .text : { 87 KEEP(*(.text._start)) 88 KEEP(*(.text.init .text.plat_cpu_reset_early \ 89 .text.reset .text.reset_primary .text.unhandled_cpu \ 90 .text.__assert_flat_mapped_range)) 91 92#ifdef CFG_WITH_PAGER 93 *(.text) 94/* Include list of sections needed for paging */ 95#include <text_unpaged.ld.S> 96#else 97 *(.text .text.*) 98#endif 99 *(.sram.text.glue_7* .gnu.linkonce.t.*) 100 . = ALIGN(8); 101 } 102 __text_end = .; 103 104#ifdef CFG_CORE_RODATA_NOEXEC 105 . = ALIGN(SMALL_PAGE_SIZE); 106#endif 107 __flatmap_unpg_rx_size = . - __flatmap_unpg_rx_start; 108 __flatmap_unpg_ro_start = .; 109 110 .rodata : ALIGN(8) { 111 __rodata_start = .; 112 *(.gnu.linkonce.r.*) 113#ifdef CFG_WITH_PAGER 114 *(.rodata .rodata.__unpaged) 115#include <rodata_unpaged.ld.S> 116#else 117#ifdef CFG_DT 118 __rodata_dtdrv_start = .; 119 KEEP(*(.rodata.dtdrv)) 120 __rodata_dtdrv_end = .; 121#endif 122#ifdef CFG_EARLY_TA 123 . = ALIGN(8); 124 __rodata_early_ta_start = .; 125 KEEP(*(.rodata.early_ta)) 126 __rodata_early_ta_end = .; 127#endif 128 129 *(.rodata .rodata.*) 130 . = ALIGN(8); 131 KEEP(*(SORT(.scattered_array*))); 132#endif 133 . = ALIGN(8); 134 __rodata_end = .; 135 } 136 137 .hash : { *(.hash) } 138 .dynsym : { *(.dynsym) } 139 .dynstr : { *(.dynstr) } 140 .rel.text : { *(.rel.text) *(.rel.gnu.linkonce.t*) } 141 .rela.text : { *(.rela.text) *(.rela.gnu.linkonce.t*) } 142 .rel.data : { *(.rel.data) *(.rel.gnu.linkonce.d*) } 143 .rela.data : { *(.rela.data) *(.rela.gnu.linkonce.d*) } 144 .rel.rodata : { *(.rel.rodata) *(.rel.gnu.linkonce.r*) } 145 .rela.rodata : { *(.rela.rodata) *(.rela.gnu.linkonce.r*) } 146 .rel.got : { *(.rel.got) } 147 .rela.got : { *(.rela.got) } 148 .rel.ctors : { *(.rel.ctors) } 149 .rela.ctors : { *(.rela.ctors) } 150 .rel.dtors : { *(.rel.dtors) } 151 .rela.dtors : { *(.rela.dtors) } 152 .rel.init : { *(.rel.init) } 153 .rela.init : { *(.rela.init) } 154 .rel.fini : { *(.rel.fini) } 155 .rela.fini : { *(.rela.fini) } 156 .rel.bss : { *(.rel.bss) } 157 .rela.bss : { *(.rela.bss) } 158 .rel.plt : { *(.rel.plt) } 159 .rela.plt : { *(.rela.plt) } 160 .init : { *(.init) } =0x9090 161 .plt : { *(.plt) } 162 163 /* .ARM.exidx is sorted, so has to go in its own output section. */ 164 .ARM.exidx : { 165 __exidx_start = .; 166 *(.ARM.exidx* .gnu.linkonce.armexidx.*) 167 __exidx_end = .; 168 } 169 170 .ARM.extab : { 171 __extab_start = .; 172 *(.ARM.extab*) 173 __extab_end = .; 174 } 175 176 /* Start page aligned read-write memory */ 177#ifdef CFG_CORE_RWDATA_NOEXEC 178 . = ALIGN(SMALL_PAGE_SIZE); 179#endif 180 __flatmap_unpg_ro_size = . - __flatmap_unpg_ro_start; 181 182#ifdef CFG_VIRTUALIZATION 183 __flatmap_nex_rw_start = . ; 184 .nex_data : ALIGN(8) { 185 *(.nex_data .nex_data.*) 186 } 187 188 .nex_bss : ALIGN(8) { 189 __nex_bss_start = .; 190 *(.nex_bss .nex_bss.*) 191 __nex_bss_end = .; 192 } 193 194 /* 195 * We want to keep all nexus memory in one place, because 196 * it should be always mapped and it is easier to map one 197 * memory region than two. 198 * Next section are NOLOAD ones, but they are followed 199 * by sections with data. Thus, this NOLOAD section will 200 * be included in the resulting binary, filled with zeroes 201 */ 202 .nex_stack (NOLOAD) : { 203 __nozi_stack_start = .; 204 KEEP(*(.nozi_stack.stack_tmp .nozi_stack.stack_abt)) 205 . = ALIGN(8); 206 __nozi_stack_end = .; 207 } 208 209 .nex_heap (NOLOAD) : { 210 __nex_heap_start = .; 211 . += CFG_CORE_NEX_HEAP_SIZE; 212 . = ALIGN(16 * 1024); 213 __nex_heap_end = .; 214 } 215 .nex_nozi (NOLOAD) : { 216 ASSERT(!(ABSOLUTE(.) & (16 * 1024 - 1)), "align nozi to 16kB"); 217 KEEP(*(.nozi.mmu.l1 .nozi.mmu.l2)) 218 } 219 220 . = ALIGN(SMALL_PAGE_SIZE); 221 222 __flatmap_nex_rw_size = . - __flatmap_nex_rw_start; 223 __flatmap_nex_rw_end = .; 224#endif 225 226 __flatmap_unpg_rw_start = .; 227 228 .data : ALIGN(8) { 229 /* writable data */ 230 __data_start_rom = .; 231 /* in one segment binaries, the rom data address is on top 232 of the ram data address */ 233 __data_start = .; 234 *(.data .data.* .gnu.linkonce.d.*) 235 . = ALIGN(8); 236 } 237 238 .ctors : ALIGN(8) { 239 __ctor_list = .; 240 KEEP(*(.ctors .ctors.* .init_array .init_array.*)) 241 __ctor_end = .; 242 } 243 .dtors : ALIGN(8) { 244 __dtor_list = .; 245 KEEP(*(.dtors .dtors.* .fini_array .fini_array.*)) 246 __dtor_end = .; 247 } 248 .got : { *(.got.plt) *(.got) } 249 .dynamic : { *(.dynamic) } 250 251 /* unintialized data */ 252 .bss : { 253 __data_end = .; 254 __bss_start = .; 255 *(.bss .bss.*) 256 *(.gnu.linkonce.b.*) 257 *(COMMON) 258 . = ALIGN(8); 259 __bss_end = .; 260 } 261 262 .heap1 (NOLOAD) : { 263 /* 264 * We're keeping track of the padding added before the 265 * .nozi section so we can do something useful with 266 * this otherwise wasted memory. 267 */ 268 __heap1_start = .; 269#ifndef CFG_WITH_PAGER 270 . += CFG_CORE_HEAP_SIZE; 271#endif 272#ifdef CFG_WITH_LPAE 273 . = ALIGN(4 * 1024); 274#else 275 . = ALIGN(16 * 1024); 276#endif 277 __heap1_end = .; 278 } 279 /* 280 * Uninitialized data that shouldn't be zero initialized at 281 * runtime. 282 * 283 * L1 mmu table requires 16 KiB alignment 284 */ 285 .nozi (NOLOAD) : { 286 __nozi_start = .; 287 KEEP(*(.nozi .nozi.*)) 288 . = ALIGN(16); 289 __nozi_end = .; 290 /* 291 * If virtualization is enabled, abt and tmp stacks will placed 292 * at above .nex_stack section and thread stacks will go there 293 */ 294 __nozi_stack_start = .; 295 KEEP(*(.nozi_stack .nozi_stack.*)) 296 . = ALIGN(8); 297 __nozi_stack_end = .; 298 } 299 300#ifdef CFG_WITH_PAGER 301 .heap2 (NOLOAD) : { 302 __heap2_start = .; 303 /* 304 * Reserve additional memory for heap, the total should be 305 * at least CFG_CORE_HEAP_SIZE, but count what has already 306 * been reserved in .heap1 307 */ 308 . += CFG_CORE_HEAP_SIZE - (__heap1_end - __heap1_start); 309 . = ALIGN(SMALL_PAGE_SIZE); 310 __heap2_end = .; 311 } 312 313 /* Start page aligned read-only memory */ 314 __flatmap_unpg_rw_size = . - __flatmap_unpg_rw_start; 315 316 __init_start = .; 317 __flatmap_init_rx_start = .; 318 319 ASSERT(!(__flatmap_init_rx_start & (SMALL_PAGE_SIZE - 1)), 320 "read-write memory is not paged aligned") 321 322 .text_init : { 323/* 324 * Include list of sections needed for boot initialization, this list 325 * overlaps with unpaged.ld.S but since unpaged.ld.S is first all those 326 * sections will go into the unpaged area. 327 */ 328#include <text_init.ld.S> 329 KEEP(*(.text.startup.*)); 330 /* Make sure constructor functions are available during init */ 331 KEEP(*(.text._GLOBAL__sub_*)); 332 . = ALIGN(8); 333 } 334 335#ifdef CFG_CORE_RODATA_NOEXEC 336 . = ALIGN(SMALL_PAGE_SIZE); 337#endif 338 __flatmap_init_rx_size = . - __flatmap_init_rx_start; 339 __flatmap_init_ro_start = .; 340 341 .rodata_init : { 342#include <rodata_init.ld.S> 343 344 . = ALIGN(8); 345 KEEP(*(SORT(.scattered_array*))); 346 347 . = ALIGN(8); 348 __rodata_init_end = .; 349 } 350 __rodata_init_end = .; 351 352 __init_end = ROUNDUP(__rodata_init_end, SMALL_PAGE_SIZE); 353 __init_size = __init_end - __init_start; 354 355 /* vcore flat map stops here. No need to page align, rodata follows. */ 356 __flatmap_init_ro_size = __init_end - __flatmap_init_ro_start; 357 358 .rodata_pageable : ALIGN(8) { 359#ifdef CFG_DT 360 __rodata_dtdrv_start = .; 361 KEEP(*(.rodata.dtdrv)) 362 __rodata_dtdrv_end = .; 363#endif 364#ifdef CFG_EARLY_TA 365 . = ALIGN(8); 366 __rodata_early_ta_start = .; 367 KEEP(*(.rodata.early_ta)) 368 __rodata_early_ta_end = .; 369#endif 370 *(.rodata*) 371 } 372 373#ifdef CFG_CORE_RODATA_NOEXEC 374 . = ALIGN(SMALL_PAGE_SIZE); 375#endif 376 377 .text_pageable : ALIGN(8) { 378 *(.text*) 379 . = ALIGN(SMALL_PAGE_SIZE); 380 } 381 382 __pageable_part_end = .; 383 __pageable_part_start = __init_end; 384 __pageable_start = __init_start; 385 __pageable_end = __pageable_part_end; 386 387 /* 388 * Assign a safe spot to store the hashes of the pages before 389 * heap is initialized. 390 */ 391 __tmp_hashes_start = __init_end; 392 __tmp_hashes_size = ((__pageable_end - __pageable_start) / 393 SMALL_PAGE_SIZE) * 32; 394 __tmp_hashes_end = __tmp_hashes_start + __tmp_hashes_size; 395 396 __init_mem_usage = __tmp_hashes_end - TEE_TEXT_VA_START; 397 398 ASSERT(TEE_LOAD_ADDR >= TEE_RAM_START, 399 "Load address before start of physical memory") 400 ASSERT(TEE_LOAD_ADDR < (TEE_RAM_START + TEE_RAM_PH_SIZE), 401 "Load address after end of physical memory") 402 ASSERT(__tmp_hashes_end < (TEE_RAM_VA_START + TEE_RAM_PH_SIZE), 403 "OP-TEE can't fit init part into available physical memory") 404 ASSERT((TEE_RAM_VA_START + TEE_RAM_PH_SIZE - __init_end) > 405 SMALL_PAGE_SIZE, "Too few free pages to initialize paging") 406 407 408#endif /*CFG_WITH_PAGER*/ 409 410#ifdef CFG_CORE_SANITIZE_KADDRESS 411 . = TEE_RAM_VA_START + (TEE_RAM_VA_SIZE * 8) / 9 - 8; 412 . = ALIGN(8); 413 .asan_shadow : { 414 __asan_shadow_start = .; 415 . += TEE_RAM_VA_SIZE / 9; 416 __asan_shadow_end = .; 417 __asan_shadow_size = __asan_shadow_end - __asan_shadow_start; 418 } 419#endif /*CFG_CORE_SANITIZE_KADDRESS*/ 420 421 __end = .; 422 423#ifndef CFG_WITH_PAGER 424 __init_size = __data_end - TEE_TEXT_VA_START; 425 __init_mem_usage = __end - TEE_TEXT_VA_START; 426#endif 427 /* 428 * Guard against moving the location counter backwards in the assignment 429 * below. 430 */ 431 ASSERT(. <= (TEE_RAM_VA_START + TEE_RAM_VA_SIZE), 432 "TEE_RAM_VA_SIZE is too small") 433 . = TEE_RAM_VA_START + TEE_RAM_VA_SIZE; 434 435 _end_of_ram = .; 436 437#ifndef CFG_WITH_PAGER 438 __flatmap_unpg_rw_size = _end_of_ram - __flatmap_unpg_rw_start; 439#endif 440 441 /DISCARD/ : { 442 /* Strip unnecessary stuff */ 443 *(.comment .note .eh_frame .interp) 444 /* Strip meta variables */ 445 *(__keep_meta_vars*) 446 } 447 448} 449 450/* Unpaged read-only memories */ 451__vcore_unpg_rx_start = __flatmap_unpg_rx_start; 452__vcore_unpg_ro_start = __flatmap_unpg_ro_start; 453#ifdef CFG_CORE_RODATA_NOEXEC 454__vcore_unpg_rx_size = __flatmap_unpg_rx_size; 455__vcore_unpg_ro_size = __flatmap_unpg_ro_size; 456#else 457__vcore_unpg_rx_size = __flatmap_unpg_rx_size + __flatmap_unpg_ro_size; 458__vcore_unpg_ro_size = 0; 459#endif 460 461/* Unpaged read-write memory */ 462__vcore_unpg_rw_start = __flatmap_unpg_rw_start; 463__vcore_unpg_rw_size = __flatmap_unpg_rw_size; 464 465#ifdef CFG_VIRTUALIZATION 466/* Nexus read-write memory */ 467PROVIDE(__vcore_nex_rw_start = __flatmap_nex_rw_start); 468PROVIDE(__vcore_nex_rw_size = __flatmap_nex_rw_size); 469#endif 470 471#ifdef CFG_WITH_PAGER 472/* 473 * Core init mapping shall cover up to end of the physical RAM. 474 * This is required since the hash table is appended to the 475 * binary data after the firmware build sequence. 476 */ 477#define __FLATMAP_PAGER_TRAILING_SPACE \ 478 (TEE_RAM_START + TEE_RAM_PH_SIZE - \ 479 (__flatmap_init_ro_start + __flatmap_init_ro_size)) 480 481/* Paged/init read-only memories */ 482__vcore_init_rx_start = __flatmap_init_rx_start; 483__vcore_init_ro_start = __flatmap_init_ro_start; 484#ifdef CFG_CORE_RODATA_NOEXEC 485__vcore_init_rx_size = __flatmap_init_rx_size; 486__vcore_init_ro_size = __flatmap_init_ro_size + __FLATMAP_PAGER_TRAILING_SPACE; 487#else 488__vcore_init_rx_size = __flatmap_init_rx_size + __flatmap_init_ro_size + 489 __FLATMAP_PAGER_TRAILING_SPACE; 490__vcore_init_ro_size = 0; 491#endif /* CFG_CORE_RODATA_NOEXEC */ 492#endif /* CFG_WITH_PAGER */ 493 494#ifdef CFG_CORE_SANITIZE_KADDRESS 495__asan_map_start = (__asan_shadow_start / SMALL_PAGE_SIZE) * 496 SMALL_PAGE_SIZE; 497__asan_map_end = ((__asan_shadow_end - 1) / SMALL_PAGE_SIZE) * 498 SMALL_PAGE_SIZE + SMALL_PAGE_SIZE; 499__asan_map_size = __asan_map_end - __asan_map_start; 500#endif /*CFG_CORE_SANITIZE_KADDRESS*/ 501