1/* SPDX-License-Identifier: (BSD-2-Clause AND MIT) */ 2/* 3 * Copyright (c) 2014, Linaro Limited 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright notice, 10 * this list of conditions and the following disclaimer. 11 * 12 * 2. Redistributions in binary form must reproduce the above copyright notice, 13 * this list of conditions and the following disclaimer in the documentation 14 * and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 20 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29/* 30 * Copyright (c) 2008-2010 Travis Geiselbrecht 31 * 32 * Permission is hereby granted, free of charge, to any person obtaining 33 * a copy of this software and associated documentation files 34 * (the "Software"), to deal in the Software without restriction, 35 * including without limitation the rights to use, copy, modify, merge, 36 * publish, distribute, sublicense, and/or sell copies of the Software, 37 * and to permit persons to whom the Software is furnished to do so, 38 * subject to the following conditions: 39 * 40 * The above copyright notice and this permission notice shall be 41 * included in all copies or substantial portions of the Software. 42 * 43 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 44 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 45 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 46 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY 47 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 48 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 49 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 50 */ 51 52#include <mm/core_mmu.h> 53#include <platform_config.h> 54#include <util.h> 55 56/* 57 * TEE_RAM_VA_START: The start virtual address of the TEE RAM 58 * TEE_TEXT_VA_START: The start virtual address of the OP-TEE text 59 */ 60#define TEE_RAM_VA_START TEE_RAM_START 61#define TEE_TEXT_VA_START (TEE_RAM_VA_START + \ 62 (TEE_LOAD_ADDR - TEE_RAM_START)) 63 64/* 65 * Note: 66 * Clang 11 (ld.lld) generates non-relocatable reference when using ROUNDDOWN() 67 * from <util.h>, which does not work with ASLR. 68 */ 69#define LD_ROUNDDOWN(x, y) ((x) - ((x) % (y))) 70 71OUTPUT_FORMAT(CFG_KERN_LINKER_FORMAT) 72OUTPUT_ARCH(CFG_KERN_LINKER_ARCH) 73 74ENTRY(_start) 75SECTIONS 76{ 77 . = TEE_TEXT_VA_START; 78#ifdef ARM32 79 ASSERT(!(TEE_TEXT_VA_START & 31), "text start should align to 32bytes") 80#endif 81#ifdef ARM64 82 ASSERT(!(TEE_TEXT_VA_START & 127), "text start should align to 128bytes") 83#endif 84 __text_start = .; 85 86 /* 87 * Memory between TEE_TEXT_VA_START and page aligned rounded down 88 * value will be mapped with unpaged "text" section attributes: 89 * likely to be read-only/executable. 90 */ 91 __flatmap_unpg_rx_start = LD_ROUNDDOWN(__text_start, SMALL_PAGE_SIZE); 92 93 .text : { 94 KEEP(*(.text._start)) 95 __identity_map_init_start = .; 96 *(.identity_map .identity_map.* \ 97 /* 98 * The one below is needed because it's a weak 99 * symbol that may be overridden by platform 100 * specific code. 101 */ 102 .text.get_core_pos_mpidr) 103 __identity_map_init_end = .; 104 KEEP(*(.text.init .text.plat_cpu_reset_early \ 105 .text.reset .text.reset_primary .text.unhandled_cpu \ 106 .text.__assert_flat_mapped_range)) 107 108#ifdef CFG_WITH_PAGER 109 *(.text) 110/* Include list of sections needed for paging */ 111#include <text_unpaged.ld.S> 112#else 113 *(.text .text.*) 114#endif 115 *(.sram.text.glue_7* .gnu.linkonce.t.*) 116 . = ALIGN(8); 117 } 118 __text_end = .; 119 120#ifdef CFG_CORE_RODATA_NOEXEC 121 . = ALIGN(SMALL_PAGE_SIZE); 122#endif 123 __flatmap_unpg_rx_size = . - __flatmap_unpg_rx_start; 124 __flatmap_unpg_ro_start = .; 125 126 .rodata : ALIGN(8) { 127 __rodata_start = .; 128 *(.gnu.linkonce.r.*) 129#ifdef CFG_WITH_PAGER 130 *(.rodata .rodata.__unpaged .rodata.__unpaged.*) 131#include <rodata_unpaged.ld.S> 132#else 133#ifdef CFG_DT 134 __rodata_dtdrv_start = .; 135 KEEP(*(.rodata.dtdrv)) 136 __rodata_dtdrv_end = .; 137#endif 138 *(.rodata .rodata.*) 139 . = ALIGN(8); 140 KEEP(*(SORT(.scattered_array*))); 141#endif 142 . = ALIGN(8); 143 __rodata_end = .; 144 } 145 146 .got : { *(.got.plt) *(.got) } 147 .note.gnu.property : { *(.note.gnu.property) } 148 .plt : { *(.plt) } 149 150 .ctors : ALIGN(8) { 151 __ctor_list = .; 152 KEEP(*(.ctors .ctors.* .init_array .init_array.*)) 153 __ctor_end = .; 154 } 155 .dtors : ALIGN(8) { 156 __dtor_list = .; 157 KEEP(*(.dtors .dtors.* .fini_array .fini_array.*)) 158 __dtor_end = .; 159 } 160 161 /* .ARM.exidx is sorted, so has to go in its own output section. */ 162 .ARM.exidx : { 163 __exidx_start = .; 164 *(.ARM.exidx* .gnu.linkonce.armexidx.*) 165 __exidx_end = .; 166 } 167 168 .ARM.extab : { 169 __extab_start = .; 170 *(.ARM.extab*) 171 __extab_end = .; 172 } 173 174 /* Start page aligned read-write memory */ 175#ifdef CFG_CORE_RWDATA_NOEXEC 176 . = ALIGN(SMALL_PAGE_SIZE); 177#endif 178 __flatmap_unpg_ro_size = . - __flatmap_unpg_ro_start; 179 180#ifdef CFG_VIRTUALIZATION 181 __flatmap_nex_rw_start = . ; 182 .nex_data : ALIGN(8) { 183 *(.nex_data .nex_data.*) 184 } 185 186 .nex_bss : ALIGN(8) { 187 __nex_bss_start = .; 188 *(.nex_bss .nex_bss.*) 189 __nex_bss_end = .; 190 } 191 192 /* 193 * We want to keep all nexus memory in one place, because 194 * it should be always mapped and it is easier to map one 195 * memory region than two. 196 * Next section are NOLOAD ones, but they are followed 197 * by sections with data. Thus, this NOLOAD section will 198 * be included in the resulting binary, filled with zeroes 199 */ 200 .nex_stack (NOLOAD) : { 201 __nozi_stack_start = .; 202 KEEP(*(.nozi_stack.stack_tmp .nozi_stack.stack_abt)) 203 . = ALIGN(8); 204 __nozi_stack_end = .; 205 } 206 207 .nex_heap (NOLOAD) : { 208 __nex_heap_start = .; 209 . += CFG_CORE_NEX_HEAP_SIZE; 210 . = ALIGN(16 * 1024); 211 __nex_heap_end = .; 212 } 213 .nex_nozi (NOLOAD) : { 214 ASSERT(!(ABSOLUTE(.) & (16 * 1024 - 1)), "align nozi to 16kB"); 215 KEEP(*(.nozi.mmu.base_table .nozi.mmu.l2)) 216 } 217 218 . = ALIGN(SMALL_PAGE_SIZE); 219 220 __flatmap_nex_rw_size = . - __flatmap_nex_rw_start; 221 __flatmap_nex_rw_end = .; 222#endif 223 224 __flatmap_unpg_rw_start = .; 225 226 .data : ALIGN(8) { 227 /* writable data */ 228 __data_start_rom = .; 229 /* in one segment binaries, the rom data address is on top 230 of the ram data address */ 231 __data_start = .; 232 *(.data .data.* .gnu.linkonce.d.*) 233 . = ALIGN(8); 234 } 235 236 /* unintialized data */ 237 .bss : { 238 __data_end = .; 239 __bss_start = .; 240 *(.bss .bss.*) 241 *(.gnu.linkonce.b.*) 242 *(COMMON) 243 . = ALIGN(8); 244 __bss_end = .; 245 } 246 247 .heap1 (NOLOAD) : { 248 /* 249 * We're keeping track of the padding added before the 250 * .nozi section so we can do something useful with 251 * this otherwise wasted memory. 252 */ 253 __heap1_start = .; 254#ifndef CFG_WITH_PAGER 255 . += CFG_CORE_HEAP_SIZE; 256#endif 257#ifdef CFG_WITH_LPAE 258 . = ALIGN(4 * 1024); 259#else 260 . = ALIGN(16 * 1024); 261#endif 262 __heap1_end = .; 263 } 264 /* 265 * Uninitialized data that shouldn't be zero initialized at 266 * runtime. 267 * 268 * L1 mmu table requires 16 KiB alignment 269 */ 270 .nozi (NOLOAD) : { 271 __nozi_start = .; 272 KEEP(*(.nozi .nozi.*)) 273 . = ALIGN(16); 274 __nozi_end = .; 275 /* 276 * If virtualization is enabled, abt and tmp stacks will placed 277 * at above .nex_stack section and thread stacks will go there 278 */ 279 __nozi_stack_start = .; 280 KEEP(*(.nozi_stack .nozi_stack.*)) 281 . = ALIGN(8); 282 __nozi_stack_end = .; 283 } 284 285#ifdef CFG_WITH_PAGER 286 .heap2 (NOLOAD) : { 287 __heap2_start = .; 288 /* 289 * Reserve additional memory for heap, the total should be 290 * at least CFG_CORE_HEAP_SIZE, but count what has already 291 * been reserved in .heap1 292 */ 293 . += CFG_CORE_HEAP_SIZE - (__heap1_end - __heap1_start); 294 . = ALIGN(SMALL_PAGE_SIZE); 295 __heap2_end = .; 296 } 297 298 /* Start page aligned read-only memory */ 299 __flatmap_unpg_rw_size = . - __flatmap_unpg_rw_start; 300 301 __init_start = .; 302 __flatmap_init_rx_start = .; 303 304 ASSERT(!(__flatmap_init_rx_start & (SMALL_PAGE_SIZE - 1)), 305 "read-write memory is not paged aligned") 306 307 .text_init : { 308/* 309 * Include list of sections needed for boot initialization, this list 310 * overlaps with unpaged.ld.S but since unpaged.ld.S is first all those 311 * sections will go into the unpaged area. 312 */ 313#include <text_init.ld.S> 314 KEEP(*(.text.startup.*)); 315 /* Make sure constructor functions are available during init */ 316 KEEP(*(.text._GLOBAL__sub_*)); 317 . = ALIGN(8); 318 } 319 320#ifdef CFG_CORE_RODATA_NOEXEC 321 . = ALIGN(SMALL_PAGE_SIZE); 322#endif 323 __flatmap_init_rx_size = . - __flatmap_init_rx_start; 324 __flatmap_init_ro_start = .; 325 326 .rodata_init : { 327#include <rodata_init.ld.S> 328 329 . = ALIGN(8); 330 KEEP(*(SORT(.scattered_array*))); 331 332 . = ALIGN(8); 333 __rodata_init_end = .; 334 } 335 336 __init_end = ALIGN(__rodata_init_end, SMALL_PAGE_SIZE); 337 __get_tee_init_end = __init_end; 338 __init_size = __init_end - __init_start; 339 340 /* vcore flat map stops here. No need to page align, rodata follows. */ 341 __flatmap_init_ro_size = __init_end - __flatmap_init_ro_start; 342 343 .rodata_pageable : ALIGN(8) { 344#ifdef CFG_DT 345 __rodata_dtdrv_start = .; 346 KEEP(*(.rodata.dtdrv)) 347 __rodata_dtdrv_end = .; 348#endif 349 *(.rodata*) 350 } 351 352#ifdef CFG_CORE_RODATA_NOEXEC 353 . = ALIGN(SMALL_PAGE_SIZE); 354#endif 355 356 .text_pageable : ALIGN(8) { 357 *(.text*) 358 . = ALIGN(SMALL_PAGE_SIZE); 359 } 360 361 __pageable_part_end = .; 362 __pageable_part_start = __init_end; 363 __pageable_start = __init_start; 364 __pageable_end = __pageable_part_end; 365 366 ASSERT(TEE_LOAD_ADDR >= TEE_RAM_START, 367 "Load address before start of physical memory") 368 ASSERT(TEE_LOAD_ADDR < (TEE_RAM_START + TEE_RAM_PH_SIZE), 369 "Load address after end of physical memory") 370 ASSERT((TEE_RAM_VA_START + TEE_RAM_PH_SIZE - __init_end) > 371 SMALL_PAGE_SIZE, "Too few free pages to initialize paging") 372 373 374#endif /*CFG_WITH_PAGER*/ 375 376#ifdef CFG_CORE_SANITIZE_KADDRESS 377 . = TEE_RAM_VA_START + (TEE_RAM_VA_SIZE * 8) / 9 - 8; 378 . = ALIGN(8); 379 .asan_shadow : { 380 __asan_shadow_start = .; 381 . += TEE_RAM_VA_SIZE / 9; 382 __asan_shadow_end = .; 383 __asan_shadow_size = __asan_shadow_end - __asan_shadow_start; 384 } 385#endif /*CFG_CORE_SANITIZE_KADDRESS*/ 386 387 __end = .; 388 389#ifndef CFG_WITH_PAGER 390 __init_size = __data_end - TEE_TEXT_VA_START; 391#endif 392 /* 393 * Guard against moving the location counter backwards in the assignment 394 * below. 395 */ 396 ASSERT(. <= (TEE_RAM_VA_START + TEE_RAM_VA_SIZE), 397 "TEE_RAM_VA_SIZE is too small") 398 . = TEE_RAM_VA_START + TEE_RAM_VA_SIZE; 399 400 _end_of_ram = .; 401 402#ifndef CFG_WITH_PAGER 403 __flatmap_unpg_rw_size = _end_of_ram - __flatmap_unpg_rw_start; 404 __get_tee_init_end = .; 405#endif 406 407 /* 408 * These regions will not become a normal part of the dumped 409 * binary, instead some are interpreted by the dump script and 410 * converted into suitable format for OP-TEE itself to use. 411 */ 412 .dynamic : { *(.dynamic) } 413 .hash : { *(.hash) } 414 .dynsym : { *(.dynsym) } 415 .dynstr : { *(.dynstr) } 416 417 .rel : { 418 *(.rel.*) 419 } 420 .rela : { 421 *(.rela.*) 422 } 423#ifndef CFG_CORE_ASLR 424 ASSERT(SIZEOF(.rel) == 0, "Relocation entries not expected") 425 ASSERT(SIZEOF(.rela) == 0, "Relocation entries not expected") 426#endif 427 428 /DISCARD/ : { 429 /* Strip unnecessary stuff */ 430 *(.comment .note .eh_frame .interp) 431 /* Strip meta variables */ 432 *(__keep_meta_vars*) 433 } 434 435} 436 437/* Unpaged read-only memories */ 438__vcore_unpg_rx_start = __flatmap_unpg_rx_start; 439__vcore_unpg_ro_start = __flatmap_unpg_ro_start; 440#ifdef CFG_CORE_RODATA_NOEXEC 441__vcore_unpg_rx_size = __flatmap_unpg_rx_size; 442__vcore_unpg_ro_size = __flatmap_unpg_ro_size; 443#else 444__vcore_unpg_rx_size = __flatmap_unpg_rx_size + __flatmap_unpg_ro_size; 445__vcore_unpg_ro_size = 0; 446#endif 447__vcore_unpg_rx_end = __vcore_unpg_rx_start + __vcore_unpg_rx_size; 448__vcore_unpg_ro_end = __vcore_unpg_ro_start + __vcore_unpg_ro_size; 449 450/* Unpaged read-write memory */ 451__vcore_unpg_rw_start = __flatmap_unpg_rw_start; 452__vcore_unpg_rw_size = __flatmap_unpg_rw_size; 453__vcore_unpg_rw_end = __vcore_unpg_rw_start + __vcore_unpg_rw_size; 454 455#ifdef CFG_VIRTUALIZATION 456/* Nexus read-write memory */ 457__vcore_nex_rw_start = __flatmap_nex_rw_start; 458__vcore_nex_rw_size = __flatmap_nex_rw_size; 459__vcore_nex_rw_end = __vcore_nex_rw_start + __vcore_nex_rw_size; 460#endif 461 462#ifdef CFG_WITH_PAGER 463/* 464 * Core init mapping shall cover up to end of the physical RAM. 465 * This is required since the hash table is appended to the 466 * binary data after the firmware build sequence. 467 */ 468#define __FLATMAP_PAGER_TRAILING_SPACE \ 469 (TEE_RAM_START + TEE_RAM_PH_SIZE - \ 470 (__flatmap_init_ro_start + __flatmap_init_ro_size)) 471 472/* Paged/init read-only memories */ 473__vcore_init_rx_start = __flatmap_init_rx_start; 474__vcore_init_ro_start = __flatmap_init_ro_start; 475#ifdef CFG_CORE_RODATA_NOEXEC 476__vcore_init_rx_size = __flatmap_init_rx_size; 477__vcore_init_ro_size = __flatmap_init_ro_size + __FLATMAP_PAGER_TRAILING_SPACE; 478#else 479__vcore_init_rx_size = __flatmap_init_rx_size + __flatmap_init_ro_size + 480 __FLATMAP_PAGER_TRAILING_SPACE; 481__vcore_init_ro_size = 0; 482#endif /* CFG_CORE_RODATA_NOEXEC */ 483__vcore_init_rx_end = __vcore_init_rx_start + __vcore_init_rx_size; 484__vcore_init_ro_end = __vcore_init_ro_start + __vcore_init_ro_size; 485#endif /* CFG_WITH_PAGER */ 486 487#ifdef CFG_CORE_SANITIZE_KADDRESS 488__asan_map_start = (__asan_shadow_start / SMALL_PAGE_SIZE) * 489 SMALL_PAGE_SIZE; 490__asan_map_end = ((__asan_shadow_end - 1) / SMALL_PAGE_SIZE) * 491 SMALL_PAGE_SIZE + SMALL_PAGE_SIZE; 492__asan_map_size = __asan_map_end - __asan_map_start; 493#endif /*CFG_CORE_SANITIZE_KADDRESS*/ 494