1/* SPDX-License-Identifier: (BSD-2-Clause AND MIT) */ 2/* 3 * Copyright (c) 2014, Linaro Limited 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright notice, 10 * this list of conditions and the following disclaimer. 11 * 12 * 2. Redistributions in binary form must reproduce the above copyright notice, 13 * this list of conditions and the following disclaimer in the documentation 14 * and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 20 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29/* 30 * Copyright (c) 2008-2010 Travis Geiselbrecht 31 * 32 * Permission is hereby granted, free of charge, to any person obtaining 33 * a copy of this software and associated documentation files 34 * (the "Software"), to deal in the Software without restriction, 35 * including without limitation the rights to use, copy, modify, merge, 36 * publish, distribute, sublicense, and/or sell copies of the Software, 37 * and to permit persons to whom the Software is furnished to do so, 38 * subject to the following conditions: 39 * 40 * The above copyright notice and this permission notice shall be 41 * included in all copies or substantial portions of the Software. 42 * 43 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 44 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 45 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 46 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY 47 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 48 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 49 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 50 */ 51 52#include <mm/core_mmu.h> 53#include <platform_config.h> 54#include <util.h> 55 56/* 57 * TEE_RAM_VA_START: The start virtual address of the TEE RAM 58 * TEE_TEXT_VA_START: The start virtual address of the OP-TEE text 59 */ 60#define TEE_RAM_VA_START TEE_RAM_START 61#define TEE_TEXT_VA_START (TEE_RAM_VA_START + \ 62 (TEE_LOAD_ADDR - TEE_RAM_START)) 63 64OUTPUT_FORMAT(CFG_KERN_LINKER_FORMAT) 65OUTPUT_ARCH(CFG_KERN_LINKER_ARCH) 66 67ENTRY(_start) 68SECTIONS 69{ 70 . = TEE_TEXT_VA_START; 71#ifdef ARM32 72 ASSERT(!(TEE_TEXT_VA_START & 31), "text start should align to 32bytes") 73#endif 74#ifdef ARM64 75 ASSERT(!(TEE_TEXT_VA_START & 127), "text start should align to 128bytes") 76#endif 77 __text_start = .; 78 79 /* 80 * Memory between TEE_TEXT_VA_START and page aligned rounded down 81 * value will be mapped with unpaged "text" section attributes: 82 * likely to be read-only/executable. 83 */ 84 __flatmap_unpg_rx_start = ROUNDDOWN(__text_start, SMALL_PAGE_SIZE); 85 86 .text : { 87 KEEP(*(.text._start)) 88 __identity_map_init_start = .; 89 *(.identity_map .identity_map.* \ 90 /* 91 * The one below is needed because it's a weak 92 * symbol that may be overridden by platform 93 * specific code. 94 */ 95 .text.get_core_pos_mpidr) 96 __identity_map_init_end = .; 97 KEEP(*(.text.init .text.plat_cpu_reset_early \ 98 .text.reset .text.reset_primary .text.unhandled_cpu \ 99 .text.__assert_flat_mapped_range)) 100 101#ifdef CFG_WITH_PAGER 102 *(.text) 103/* Include list of sections needed for paging */ 104#include <text_unpaged.ld.S> 105#else 106 *(.text .text.*) 107#endif 108 *(.sram.text.glue_7* .gnu.linkonce.t.*) 109 . = ALIGN(8); 110 } 111 __text_end = .; 112 113#ifdef CFG_CORE_RODATA_NOEXEC 114 . = ALIGN(SMALL_PAGE_SIZE); 115#endif 116 __flatmap_unpg_rx_size = . - __flatmap_unpg_rx_start; 117 __flatmap_unpg_ro_start = .; 118 119 .rodata : ALIGN(8) { 120 __rodata_start = .; 121 *(.gnu.linkonce.r.*) 122#ifdef CFG_WITH_PAGER 123 *(.rodata .rodata.__unpaged) 124#include <rodata_unpaged.ld.S> 125#else 126#ifdef CFG_DT 127 __rodata_dtdrv_start = .; 128 KEEP(*(.rodata.dtdrv)) 129 __rodata_dtdrv_end = .; 130#endif 131#ifdef CFG_EARLY_TA 132 . = ALIGN(8); 133 __rodata_early_ta_start = .; 134 KEEP(*(.rodata.early_ta)) 135 __rodata_early_ta_end = .; 136#endif 137 138 *(.rodata .rodata.*) 139 . = ALIGN(8); 140 KEEP(*(SORT(.scattered_array*))); 141#endif 142 . = ALIGN(8); 143 __rodata_end = .; 144 } 145 146 .got : { *(.got.plt) *(.got) } 147 .plt : { *(.plt) } 148 149 .ctors : ALIGN(8) { 150 __ctor_list = .; 151 KEEP(*(.ctors .ctors.* .init_array .init_array.*)) 152 __ctor_end = .; 153 } 154 .dtors : ALIGN(8) { 155 __dtor_list = .; 156 KEEP(*(.dtors .dtors.* .fini_array .fini_array.*)) 157 __dtor_end = .; 158 } 159 160 /* .ARM.exidx is sorted, so has to go in its own output section. */ 161 .ARM.exidx : { 162 __exidx_start = .; 163 *(.ARM.exidx* .gnu.linkonce.armexidx.*) 164 __exidx_end = .; 165 } 166 167 .ARM.extab : { 168 __extab_start = .; 169 *(.ARM.extab*) 170 __extab_end = .; 171 } 172 173 /* Start page aligned read-write memory */ 174#ifdef CFG_CORE_RWDATA_NOEXEC 175 . = ALIGN(SMALL_PAGE_SIZE); 176#endif 177 __flatmap_unpg_ro_size = . - __flatmap_unpg_ro_start; 178 179#ifdef CFG_VIRTUALIZATION 180 __flatmap_nex_rw_start = . ; 181 .nex_data : ALIGN(8) { 182 *(.nex_data .nex_data.*) 183 } 184 185 .nex_bss : ALIGN(8) { 186 __nex_bss_start = .; 187 *(.nex_bss .nex_bss.*) 188 __nex_bss_end = .; 189 } 190 191 /* 192 * We want to keep all nexus memory in one place, because 193 * it should be always mapped and it is easier to map one 194 * memory region than two. 195 * Next section are NOLOAD ones, but they are followed 196 * by sections with data. Thus, this NOLOAD section will 197 * be included in the resulting binary, filled with zeroes 198 */ 199 .nex_stack (NOLOAD) : { 200 __nozi_stack_start = .; 201 KEEP(*(.nozi_stack.stack_tmp .nozi_stack.stack_abt)) 202 . = ALIGN(8); 203 __nozi_stack_end = .; 204 } 205 206 .nex_heap (NOLOAD) : { 207 __nex_heap_start = .; 208 . += CFG_CORE_NEX_HEAP_SIZE; 209 . = ALIGN(16 * 1024); 210 __nex_heap_end = .; 211 } 212 .nex_nozi (NOLOAD) : { 213 ASSERT(!(ABSOLUTE(.) & (16 * 1024 - 1)), "align nozi to 16kB"); 214 KEEP(*(.nozi.mmu.l1 .nozi.mmu.l2)) 215 } 216 217 . = ALIGN(SMALL_PAGE_SIZE); 218 219 __flatmap_nex_rw_size = . - __flatmap_nex_rw_start; 220 __flatmap_nex_rw_end = .; 221#endif 222 223 __flatmap_unpg_rw_start = .; 224 225 .data : ALIGN(8) { 226 /* writable data */ 227 __data_start_rom = .; 228 /* in one segment binaries, the rom data address is on top 229 of the ram data address */ 230 __data_start = .; 231 *(.data .data.* .gnu.linkonce.d.*) 232 . = ALIGN(8); 233 } 234 235 /* unintialized data */ 236 .bss : { 237 __data_end = .; 238 __bss_start = .; 239 *(.bss .bss.*) 240 *(.gnu.linkonce.b.*) 241 *(COMMON) 242 . = ALIGN(8); 243 __bss_end = .; 244 } 245 246 .heap1 (NOLOAD) : { 247 /* 248 * We're keeping track of the padding added before the 249 * .nozi section so we can do something useful with 250 * this otherwise wasted memory. 251 */ 252 __heap1_start = .; 253#ifndef CFG_WITH_PAGER 254 . += CFG_CORE_HEAP_SIZE; 255#endif 256#ifdef CFG_WITH_LPAE 257 . = ALIGN(4 * 1024); 258#else 259 . = ALIGN(16 * 1024); 260#endif 261 __heap1_end = .; 262 } 263 /* 264 * Uninitialized data that shouldn't be zero initialized at 265 * runtime. 266 * 267 * L1 mmu table requires 16 KiB alignment 268 */ 269 .nozi (NOLOAD) : { 270 __nozi_start = .; 271 KEEP(*(.nozi .nozi.*)) 272 . = ALIGN(16); 273 __nozi_end = .; 274 /* 275 * If virtualization is enabled, abt and tmp stacks will placed 276 * at above .nex_stack section and thread stacks will go there 277 */ 278 __nozi_stack_start = .; 279 KEEP(*(.nozi_stack .nozi_stack.*)) 280 . = ALIGN(8); 281 __nozi_stack_end = .; 282 } 283 284#ifdef CFG_WITH_PAGER 285 .heap2 (NOLOAD) : { 286 __heap2_start = .; 287 /* 288 * Reserve additional memory for heap, the total should be 289 * at least CFG_CORE_HEAP_SIZE, but count what has already 290 * been reserved in .heap1 291 */ 292 . += CFG_CORE_HEAP_SIZE - (__heap1_end - __heap1_start); 293 . = ALIGN(SMALL_PAGE_SIZE); 294 __heap2_end = .; 295 } 296 297 /* Start page aligned read-only memory */ 298 __flatmap_unpg_rw_size = . - __flatmap_unpg_rw_start; 299 300 __init_start = .; 301 __flatmap_init_rx_start = .; 302 303 ASSERT(!(__flatmap_init_rx_start & (SMALL_PAGE_SIZE - 1)), 304 "read-write memory is not paged aligned") 305 306 .text_init : { 307/* 308 * Include list of sections needed for boot initialization, this list 309 * overlaps with unpaged.ld.S but since unpaged.ld.S is first all those 310 * sections will go into the unpaged area. 311 */ 312#include <text_init.ld.S> 313 KEEP(*(.text.startup.*)); 314 /* Make sure constructor functions are available during init */ 315 KEEP(*(.text._GLOBAL__sub_*)); 316 . = ALIGN(8); 317 } 318 319#ifdef CFG_CORE_RODATA_NOEXEC 320 . = ALIGN(SMALL_PAGE_SIZE); 321#endif 322 __flatmap_init_rx_size = . - __flatmap_init_rx_start; 323 __flatmap_init_ro_start = .; 324 325 .rodata_init : { 326#include <rodata_init.ld.S> 327 328 . = ALIGN(8); 329 KEEP(*(SORT(.scattered_array*))); 330 331 . = ALIGN(8); 332 __rodata_init_end = .; 333 } 334 __rodata_init_end = .; 335 336 __init_end = ROUNDUP(__rodata_init_end, SMALL_PAGE_SIZE); 337 __get_tee_init_end = __init_end; 338 __init_size = __init_end - __init_start; 339 340 /* vcore flat map stops here. No need to page align, rodata follows. */ 341 __flatmap_init_ro_size = __init_end - __flatmap_init_ro_start; 342 343 .rodata_pageable : ALIGN(8) { 344#ifdef CFG_DT 345 __rodata_dtdrv_start = .; 346 KEEP(*(.rodata.dtdrv)) 347 __rodata_dtdrv_end = .; 348#endif 349#ifdef CFG_EARLY_TA 350 . = ALIGN(8); 351 __rodata_early_ta_start = .; 352 KEEP(*(.rodata.early_ta)) 353 __rodata_early_ta_end = .; 354#endif 355 *(.rodata*) 356 } 357 358#ifdef CFG_CORE_RODATA_NOEXEC 359 . = ALIGN(SMALL_PAGE_SIZE); 360#endif 361 362 .text_pageable : ALIGN(8) { 363 *(.text*) 364 . = ALIGN(SMALL_PAGE_SIZE); 365 } 366 367 __pageable_part_end = .; 368 __pageable_part_start = __init_end; 369 __pageable_start = __init_start; 370 __pageable_end = __pageable_part_end; 371 372 ASSERT(TEE_LOAD_ADDR >= TEE_RAM_START, 373 "Load address before start of physical memory") 374 ASSERT(TEE_LOAD_ADDR < (TEE_RAM_START + TEE_RAM_PH_SIZE), 375 "Load address after end of physical memory") 376 ASSERT((TEE_RAM_VA_START + TEE_RAM_PH_SIZE - __init_end) > 377 SMALL_PAGE_SIZE, "Too few free pages to initialize paging") 378 379 380#endif /*CFG_WITH_PAGER*/ 381 382#ifdef CFG_CORE_SANITIZE_KADDRESS 383 . = TEE_RAM_VA_START + (TEE_RAM_VA_SIZE * 8) / 9 - 8; 384 . = ALIGN(8); 385 .asan_shadow : { 386 __asan_shadow_start = .; 387 . += TEE_RAM_VA_SIZE / 9; 388 __asan_shadow_end = .; 389 __asan_shadow_size = __asan_shadow_end - __asan_shadow_start; 390 } 391#endif /*CFG_CORE_SANITIZE_KADDRESS*/ 392 393 __end = .; 394 395#ifndef CFG_WITH_PAGER 396 __init_size = __data_end - TEE_TEXT_VA_START; 397#endif 398 /* 399 * Guard against moving the location counter backwards in the assignment 400 * below. 401 */ 402 ASSERT(. <= (TEE_RAM_VA_START + TEE_RAM_VA_SIZE), 403 "TEE_RAM_VA_SIZE is too small") 404 . = TEE_RAM_VA_START + TEE_RAM_VA_SIZE; 405 406 _end_of_ram = .; 407 408#ifndef CFG_WITH_PAGER 409 __flatmap_unpg_rw_size = _end_of_ram - __flatmap_unpg_rw_start; 410 __get_tee_init_end = .; 411#endif 412 413 /* 414 * These regions will not become a normal part of the dumped 415 * binary, instead some are interpreted by the dump script and 416 * converted into suitable format for OP-TEE itself to use. 417 */ 418 .dynamic : { *(.dynamic) } 419 .hash : { *(.hash) } 420 .dynsym : { *(.dynsym) } 421 .dynstr : { *(.dynstr) } 422 423 .rel : { 424 *(.rel.*) 425 } 426 .rela : { 427 *(.rela.*) 428 } 429#ifndef CFG_CORE_ASLR 430 ASSERT(SIZEOF(.rel) == 0, "Relocation entries not expected") 431 ASSERT(SIZEOF(.rela) == 0, "Relocation entries not expected") 432#endif 433 434 /DISCARD/ : { 435 /* Strip unnecessary stuff */ 436 *(.comment .note .eh_frame .interp) 437 /* Strip meta variables */ 438 *(__keep_meta_vars*) 439 } 440 441} 442 443/* Unpaged read-only memories */ 444__vcore_unpg_rx_start = __flatmap_unpg_rx_start; 445__vcore_unpg_ro_start = __flatmap_unpg_ro_start; 446#ifdef CFG_CORE_RODATA_NOEXEC 447__vcore_unpg_rx_size = __flatmap_unpg_rx_size; 448__vcore_unpg_ro_size = __flatmap_unpg_ro_size; 449#else 450__vcore_unpg_rx_size = __flatmap_unpg_rx_size + __flatmap_unpg_ro_size; 451__vcore_unpg_ro_size = 0; 452#endif 453 454/* Unpaged read-write memory */ 455__vcore_unpg_rw_start = __flatmap_unpg_rw_start; 456__vcore_unpg_rw_size = __flatmap_unpg_rw_size; 457 458#ifdef CFG_VIRTUALIZATION 459/* Nexus read-write memory */ 460__vcore_nex_rw_start = __flatmap_nex_rw_start; 461__vcore_nex_rw_size = __flatmap_nex_rw_size; 462#endif 463 464#ifdef CFG_WITH_PAGER 465/* 466 * Core init mapping shall cover up to end of the physical RAM. 467 * This is required since the hash table is appended to the 468 * binary data after the firmware build sequence. 469 */ 470#define __FLATMAP_PAGER_TRAILING_SPACE \ 471 (TEE_RAM_START + TEE_RAM_PH_SIZE - \ 472 (__flatmap_init_ro_start + __flatmap_init_ro_size)) 473 474/* Paged/init read-only memories */ 475__vcore_init_rx_start = __flatmap_init_rx_start; 476__vcore_init_ro_start = __flatmap_init_ro_start; 477#ifdef CFG_CORE_RODATA_NOEXEC 478__vcore_init_rx_size = __flatmap_init_rx_size; 479__vcore_init_ro_size = __flatmap_init_ro_size + __FLATMAP_PAGER_TRAILING_SPACE; 480#else 481__vcore_init_rx_size = __flatmap_init_rx_size + __flatmap_init_ro_size + 482 __FLATMAP_PAGER_TRAILING_SPACE; 483__vcore_init_ro_size = 0; 484#endif /* CFG_CORE_RODATA_NOEXEC */ 485#endif /* CFG_WITH_PAGER */ 486 487#ifdef CFG_CORE_SANITIZE_KADDRESS 488__asan_map_start = (__asan_shadow_start / SMALL_PAGE_SIZE) * 489 SMALL_PAGE_SIZE; 490__asan_map_end = ((__asan_shadow_end - 1) / SMALL_PAGE_SIZE) * 491 SMALL_PAGE_SIZE + SMALL_PAGE_SIZE; 492__asan_map_size = __asan_map_end - __asan_map_start; 493#endif /*CFG_CORE_SANITIZE_KADDRESS*/ 494