1/* 2 * Copyright (c) 2014, Linaro Limited 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, 9 * this list of conditions and the following disclaimer. 10 * 11 * 2. Redistributions in binary form must reproduce the above copyright notice, 12 * this list of conditions and the following disclaimer in the documentation 13 * and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28/* 29 * Copyright (c) 2008-2010 Travis Geiselbrecht 30 * 31 * Permission is hereby granted, free of charge, to any person obtaining 32 * a copy of this software and associated documentation files 33 * (the "Software"), to deal in the Software without restriction, 34 * including without limitation the rights to use, copy, modify, merge, 35 * publish, distribute, sublicense, and/or sell copies of the Software, 36 * and to permit persons to whom the Software is furnished to do so, 37 * subject to the following conditions: 38 * 39 * The above copyright notice and this permission notice shall be 40 * included in all copies or substantial portions of the Software. 41 * 42 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 43 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 44 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 45 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY 46 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 47 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 48 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 49 */ 50 51#include <platform_config.h> 52 53#ifndef SMALL_PAGE_SIZE 54#define SMALL_PAGE_SIZE 4096 55#endif 56#ifndef ROUNDUP 57#define ROUNDUP(x, y) ((((x) + (y) - 1) / (y)) * (y)) 58#endif 59 60OUTPUT_FORMAT(CFG_KERN_LINKER_FORMAT) 61OUTPUT_ARCH(CFG_KERN_LINKER_ARCH) 62 63ENTRY(_start) 64SECTIONS 65{ 66 . = CFG_TEE_LOAD_ADDR; 67 68 __text_start = .; 69 __flatmap_unpg_rx_start = __text_start; 70 71 .text : { 72 KEEP(*(.text.boot.vectab1)) 73 KEEP(*(.text.boot.vectab2)) 74 KEEP(*(.text.boot)) 75 76 . = ALIGN(8); 77 __initcall_start = .; 78 KEEP(*(.initcall1)) 79 KEEP(*(.initcall2)) 80 KEEP(*(.initcall3)) 81 KEEP(*(.initcall4)) 82 __initcall_end = .; 83 84#ifdef CFG_WITH_PAGER 85 *(.text) 86/* Include list of sections needed for paging */ 87#include <text_unpaged.ld.S> 88#else 89 *(.text .text.*) 90#endif 91 *(.sram.text.glue_7* .gnu.linkonce.t.*) 92 . = ALIGN(8); 93 } 94 __text_end = .; 95 96#ifdef CFG_CORE_RODATA_NOEXEC 97 . = ALIGN(SMALL_PAGE_SIZE); 98#endif 99 __flatmap_unpg_rx_size = . - __flatmap_unpg_rx_start; 100 __flatmap_unpg_ro_start = .; 101 102 .rodata : ALIGN(8) { 103 __rodata_start = .; 104 *(.gnu.linkonce.r.*) 105#ifdef CFG_WITH_PAGER 106 *(.rodata .rodata.__unpaged) 107#include <rodata_unpaged.ld.S> 108#else 109#ifdef CFG_DT 110 __rodata_dtdrv_start = .; 111 KEEP(*(.rodata.dtdrv)) 112 __rodata_dtdrv_end = .; 113#endif 114 *(.rodata .rodata.*) 115 116 /* 117 * 8 to avoid unwanted padding between __start_ta_head_section 118 * and the first structure in ta_head_section, in 64-bit 119 * builds 120 */ 121 . = ALIGN(8); 122 __start_ta_head_section = . ; 123 KEEP(*(ta_head_section)) 124 __stop_ta_head_section = . ; 125 . = ALIGN(8); 126 __start_phys_mem_map_section = . ; 127 KEEP(*(phys_mem_map_section)) 128 __end_phys_mem_map_section = . ; 129 . = ALIGN(8); 130 __start_phys_sdp_mem_section = . ; 131 KEEP(*(phys_sdp_mem_section)) 132 __end_phys_sdp_mem_section = . ; 133#endif 134 . = ALIGN(8); 135 __rodata_end = .; 136 } 137 138 .interp : { *(.interp) } 139 .hash : { *(.hash) } 140 .dynsym : { *(.dynsym) } 141 .dynstr : { *(.dynstr) } 142 .rel.text : { *(.rel.text) *(.rel.gnu.linkonce.t*) } 143 .rela.text : { *(.rela.text) *(.rela.gnu.linkonce.t*) } 144 .rel.data : { *(.rel.data) *(.rel.gnu.linkonce.d*) } 145 .rela.data : { *(.rela.data) *(.rela.gnu.linkonce.d*) } 146 .rel.rodata : { *(.rel.rodata) *(.rel.gnu.linkonce.r*) } 147 .rela.rodata : { *(.rela.rodata) *(.rela.gnu.linkonce.r*) } 148 .rel.got : { *(.rel.got) } 149 .rela.got : { *(.rela.got) } 150 .rel.ctors : { *(.rel.ctors) } 151 .rela.ctors : { *(.rela.ctors) } 152 .rel.dtors : { *(.rel.dtors) } 153 .rela.dtors : { *(.rela.dtors) } 154 .rel.init : { *(.rel.init) } 155 .rela.init : { *(.rela.init) } 156 .rel.fini : { *(.rel.fini) } 157 .rela.fini : { *(.rela.fini) } 158 .rel.bss : { *(.rel.bss) } 159 .rela.bss : { *(.rela.bss) } 160 .rel.plt : { *(.rel.plt) } 161 .rela.plt : { *(.rela.plt) } 162 .init : { *(.init) } =0x9090 163 .plt : { *(.plt) } 164 165 /* .ARM.exidx is sorted, so has to go in its own output section. */ 166 .ARM.exidx : { 167 __exidx_start = .; 168 *(.ARM.exidx* .gnu.linkonce.armexidx.*) 169 __exidx_end = .; 170 } 171 172 .ARM.extab : { 173 __extab_start = .; 174 *(.ARM.extab*) 175 __extab_end = .; 176 } 177 178 /* Start page aligned read-write memory */ 179#ifdef CFG_CORE_RWDATA_NOEXEC 180 . = ALIGN(SMALL_PAGE_SIZE); 181#endif 182 __flatmap_unpg_ro_size = . - __flatmap_unpg_ro_start; 183 __flatmap_unpg_rw_start = .; 184 185 .data : ALIGN(8) { 186 /* writable data */ 187 __data_start_rom = .; 188 /* in one segment binaries, the rom data address is on top 189 of the ram data address */ 190 __early_bss_start = .; 191 *(.early_bss .early_bss.*) 192 . = ALIGN(8); 193 __early_bss_end = .; 194 __data_start = .; 195 *(.data .data.* .gnu.linkonce.d.*) 196 . = ALIGN(8); 197 } 198 199 .ctors : ALIGN(8) { 200 __ctor_list = .; 201 KEEP(*(.ctors .ctors.* .init_array .init_array.*)) 202 __ctor_end = .; 203 } 204 .dtors : ALIGN(8) { 205 __dtor_list = .; 206 KEEP(*(.dtors .dtors.* .fini_array .fini_array.*)) 207 __dtor_end = .; 208 } 209 .got : { *(.got.plt) *(.got) } 210 .dynamic : { *(.dynamic) } 211 212 __data_end = .; 213 /* unintialized data */ 214 .bss : ALIGN(8) { 215 __bss_start = .; 216 *(.bss .bss.*) 217 *(.gnu.linkonce.b.*) 218 *(COMMON) 219 . = ALIGN(8); 220 __bss_end = .; 221 } 222 223 .heap1 (NOLOAD) : { 224 /* 225 * We're keeping track of the padding added before the 226 * .nozi section so we can do something useful with 227 * this otherwise wasted memory. 228 */ 229 __heap1_start = .; 230#ifndef CFG_WITH_PAGER 231 . += CFG_CORE_HEAP_SIZE; 232#endif 233 . = ALIGN(16 * 1024); 234 __heap1_end = .; 235 } 236 237 /* 238 * Uninitialized data that shouldn't be zero initialized at 239 * runtime. 240 * 241 * L1 mmu table requires 16 KiB alignment 242 */ 243 .nozi (NOLOAD) : { 244 __nozi_start = .; 245 ASSERT(!(__nozi_start & (16 * 1024 - 1)), "align nozi to 16kB"); 246 247 KEEP(*(.nozi .nozi.*)) 248 . = ALIGN(16); 249 __nozi_end = .; 250 __nozi_stack_start = .; 251 KEEP(*(.nozi_stack)) 252 . = ALIGN(8); 253 __nozi_stack_end = .; 254 } 255 256#ifdef CFG_WITH_PAGER 257 .heap2 (NOLOAD) : { 258 __heap2_start = .; 259 /* 260 * Reserve additional memory for heap, the total should be 261 * at least CFG_CORE_HEAP_SIZE, but count what has already 262 * been reserved in .heap1 263 */ 264 . += CFG_CORE_HEAP_SIZE - (__heap1_end - __heap1_start); 265 . = ALIGN(SMALL_PAGE_SIZE); 266 __heap2_end = .; 267 } 268 269 /* Start page aligned read-only memory */ 270 __flatmap_unpg_rw_size = . - __flatmap_unpg_rw_start; 271 272 __init_start = .; 273 __flatmap_init_rx_start = .; 274 275 ASSERT(!(__flatmap_init_rx_start & (SMALL_PAGE_SIZE - 1)), 276 "read-write memory is not paged aligned") 277 278 .text_init : { 279/* 280 * Include list of sections needed for boot initialization, this list 281 * overlaps with unpaged.ld.S but since unpaged.ld.S is first all those 282 * sections will go into the unpaged area. 283 */ 284#include <text_init.ld.S> 285 . = ALIGN(8); 286 } 287 288#ifdef CFG_CORE_RODATA_NOEXEC 289 . = ALIGN(SMALL_PAGE_SIZE); 290#endif 291 __flatmap_init_rx_size = . - __flatmap_init_rx_start; 292 __flatmap_init_ro_start = .; 293 294 .rodata_init : { 295#include <rodata_init.ld.S> 296 . = ALIGN(8); 297 __start_phys_mem_map_section = . ; 298 KEEP(*(phys_mem_map_section)) 299 __end_phys_mem_map_section = . ; 300 . = ALIGN(8); 301 __start_phys_sdp_mem_section = . ; 302 KEEP(*(phys_sdp_mem_section)) 303 __end_phys_sdp_mem_section = . ; 304 . = ALIGN(8); 305 } 306 __rodata_init_end = .; 307 308 __init_end = ROUNDUP(__rodata_init_end, SMALL_PAGE_SIZE); 309 __init_size = __init_end - __init_start; 310 311 /* vcore flat map stops here. No need to page align, rodata follows. */ 312 __flatmap_init_ro_size = __init_end - __flatmap_init_ro_start; 313 314 .rodata_pageable : ALIGN(8) { 315#ifdef CFG_DT 316 __rodata_dtdrv_start = .; 317 KEEP(*(.rodata.dtdrv)) 318 __rodata_dtdrv_end = .; 319#endif 320 *(.rodata*) 321 /* 322 * 8 to avoid unwanted padding between __start_ta_head_section 323 * and the first structure in ta_head_section, in 64-bit 324 * builds 325 */ 326 . = ALIGN(8); 327 __start_ta_head_section = . ; 328 KEEP(*(ta_head_section)) 329 __stop_ta_head_section = . ; 330 } 331 332#ifdef CFG_CORE_RODATA_NOEXEC 333 . = ALIGN(SMALL_PAGE_SIZE); 334#endif 335 336 .text_pageable : ALIGN(8) { 337 *(.text*) 338 . = ALIGN(SMALL_PAGE_SIZE); 339 } 340 341 __pageable_part_end = .; 342 __pageable_part_start = __init_end; 343 __pageable_start = __init_start; 344 __pageable_end = __pageable_part_end; 345 346 /* 347 * Assign a safe spot to store the hashes of the pages before 348 * heap is initialized. 349 */ 350 __tmp_hashes_start = __init_end; 351 __tmp_hashes_size = ((__pageable_end - __pageable_start) / 352 SMALL_PAGE_SIZE) * 32; 353 __tmp_hashes_end = __tmp_hashes_start + __tmp_hashes_size; 354 355 __init_mem_usage = __tmp_hashes_end - CFG_TEE_LOAD_ADDR; 356 357 ASSERT(CFG_TEE_LOAD_ADDR >= CFG_TEE_RAM_START, 358 "Load address before start of physical memory") 359 ASSERT(CFG_TEE_LOAD_ADDR < (CFG_TEE_RAM_START + CFG_TEE_RAM_PH_SIZE), 360 "Load address after end of physical memory") 361 ASSERT(__tmp_hashes_end < (CFG_TEE_RAM_START + CFG_TEE_RAM_PH_SIZE), 362 "OP-TEE can't fit init part into available physical memory") 363 ASSERT((CFG_TEE_RAM_START + CFG_TEE_RAM_PH_SIZE - __init_end) > 364 SMALL_PAGE_SIZE, "Too few free pages to initialize paging") 365 366 367#endif /*CFG_WITH_PAGER*/ 368 369#ifdef CFG_CORE_SANITIZE_KADDRESS 370 . = CFG_TEE_RAM_START + (CFG_TEE_RAM_VA_SIZE * 8) / 9 - 8; 371 . = ALIGN(8); 372 .asan_shadow : { 373 __asan_shadow_start = .; 374 . += CFG_TEE_RAM_VA_SIZE / 9; 375 __asan_shadow_end = .; 376 } 377#endif /*CFG_CORE_SANITIZE_KADDRESS*/ 378 379 __end = .; 380 381#ifndef CFG_WITH_PAGER 382 __init_size = __data_end - CFG_TEE_LOAD_ADDR; 383 __init_mem_usage = __end - CFG_TEE_LOAD_ADDR; 384#endif 385 . = CFG_TEE_RAM_START + CFG_TEE_RAM_VA_SIZE; 386 387 _end_of_ram = .; 388 389#ifndef CFG_WITH_PAGER 390 __flatmap_unpg_rw_size = _end_of_ram - __flatmap_unpg_rw_start; 391#endif 392 393 /DISCARD/ : { 394 /* Strip unnecessary stuff */ 395 *(.comment .note .eh_frame) 396 /* Strip meta variables */ 397 *(__keep_meta_vars*) 398 } 399 400} 401 402/* Unpaged read-only memories */ 403PROVIDE(__vcore_unpg_rx_start = __flatmap_unpg_rx_start); 404PROVIDE(__vcore_unpg_ro_start = __flatmap_unpg_ro_start); 405#ifdef CFG_CORE_RODATA_NOEXEC 406PROVIDE(__vcore_unpg_rx_size = __flatmap_unpg_rx_size); 407PROVIDE(__vcore_unpg_ro_size = __flatmap_unpg_ro_size); 408#else 409PROVIDE(__vcore_unpg_rx_size = __flatmap_unpg_rx_size + 410 __flatmap_unpg_ro_size); 411PROVIDE(__vcore_unpg_ro_size = 0); 412#endif 413 414/* Unpaged read-write memory */ 415PROVIDE(__vcore_unpg_rw_start = __flatmap_unpg_rw_start); 416PROVIDE(__vcore_unpg_rw_size = __flatmap_unpg_rw_size); 417 418#ifdef CFG_WITH_PAGER 419/* 420 * Core init mapping shall cover up to end of the physical RAM. 421 * This is required since the hash table is appended to the 422 * binary data after the firmware build sequence. 423 */ 424#define __FLATMAP_PAGER_TRAILING_SPACE \ 425 (CFG_TEE_RAM_START + CFG_TEE_RAM_PH_SIZE - \ 426 (__flatmap_init_ro_start + __flatmap_init_ro_size)) 427 428/* Paged/init read-only memories */ 429PROVIDE(__vcore_init_rx_start = __flatmap_init_rx_start); 430PROVIDE(__vcore_init_ro_start = __flatmap_init_ro_start); 431#ifdef CFG_CORE_RODATA_NOEXEC 432PROVIDE(__vcore_init_rx_size = __flatmap_init_rx_size); 433PROVIDE(__vcore_init_ro_size = __flatmap_init_ro_size + 434 __FLATMAP_PAGER_TRAILING_SPACE); 435#else 436PROVIDE(__vcore_init_rx_size = __flatmap_init_rx_size + 437 __flatmap_init_ro_size + 438 __FLATMAP_PAGER_TRAILING_SPACE); 439PROVIDE(__vcore_init_ro_size = 0); 440#endif /* CFG_CORE_RODATA_NOEXEC */ 441#endif /* CFG_WITH_PAGER */ 442