1/* SPDX-License-Identifier: (BSD-2-Clause AND MIT) */ 2/* 3 * Copyright (c) 2014, Linaro Limited 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright notice, 10 * this list of conditions and the following disclaimer. 11 * 12 * 2. Redistributions in binary form must reproduce the above copyright notice, 13 * this list of conditions and the following disclaimer in the documentation 14 * and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 20 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29/* 30 * Copyright (c) 2008-2010 Travis Geiselbrecht 31 * 32 * Permission is hereby granted, free of charge, to any person obtaining 33 * a copy of this software and associated documentation files 34 * (the "Software"), to deal in the Software without restriction, 35 * including without limitation the rights to use, copy, modify, merge, 36 * publish, distribute, sublicense, and/or sell copies of the Software, 37 * and to permit persons to whom the Software is furnished to do so, 38 * subject to the following conditions: 39 * 40 * The above copyright notice and this permission notice shall be 41 * included in all copies or substantial portions of the Software. 42 * 43 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 44 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 45 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 46 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY 47 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 48 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 49 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 50 */ 51 52#include <mm/core_mmu.h> 53#include <platform_config.h> 54#include <util.h> 55 56/* 57 * TEE_RAM_VA_START: The start virtual address of the TEE RAM 58 * TEE_TEXT_VA_START: The start virtual address of the OP-TEE text 59 */ 60#define TEE_RAM_VA_START TEE_RAM_START 61#define TEE_TEXT_VA_START (TEE_RAM_VA_START + \ 62 (TEE_LOAD_ADDR - TEE_RAM_START)) 63 64OUTPUT_FORMAT(CFG_KERN_LINKER_FORMAT) 65OUTPUT_ARCH(CFG_KERN_LINKER_ARCH) 66 67ENTRY(_start) 68SECTIONS 69{ 70 . = TEE_TEXT_VA_START; 71#ifdef ARM32 72 ASSERT(!(TEE_TEXT_VA_START & 31), "text start should align to 32bytes") 73#endif 74#ifdef ARM64 75 ASSERT(!(TEE_TEXT_VA_START & 127), "text start should align to 128bytes") 76#endif 77 __text_start = .; 78 79 /* 80 * Memory between TEE_TEXT_VA_START and page aligned rounded down 81 * value will be mapped with unpaged "text" section attributes: 82 * likely to be read-only/executable. 83 */ 84 __flatmap_unpg_rx_start = ROUNDDOWN(__text_start, SMALL_PAGE_SIZE); 85 86 .text : { 87 KEEP(*(.text._start)) 88 KEEP(*(.text.init .text.plat_cpu_reset_early \ 89 .text.reset .text.reset_primary .text.unhandled_cpu \ 90 .text.__assert_flat_mapped_range)) 91 92#ifdef CFG_WITH_PAGER 93 *(.text) 94/* Include list of sections needed for paging */ 95#include <text_unpaged.ld.S> 96#else 97 *(.text .text.*) 98#endif 99 *(.sram.text.glue_7* .gnu.linkonce.t.*) 100 . = ALIGN(8); 101 } 102 __text_end = .; 103 104#ifdef CFG_CORE_RODATA_NOEXEC 105 . = ALIGN(SMALL_PAGE_SIZE); 106#endif 107 __flatmap_unpg_rx_size = . - __flatmap_unpg_rx_start; 108 __flatmap_unpg_ro_start = .; 109 110 .rodata : ALIGN(8) { 111 __rodata_start = .; 112 *(.gnu.linkonce.r.*) 113#ifdef CFG_WITH_PAGER 114 *(.rodata .rodata.__unpaged) 115#include <rodata_unpaged.ld.S> 116#else 117#ifdef CFG_DT 118 __rodata_dtdrv_start = .; 119 KEEP(*(.rodata.dtdrv)) 120 __rodata_dtdrv_end = .; 121#endif 122#ifdef CFG_EARLY_TA 123 . = ALIGN(8); 124 __rodata_early_ta_start = .; 125 KEEP(*(.rodata.early_ta)) 126 __rodata_early_ta_end = .; 127#endif 128 129 *(.rodata .rodata.*) 130 131 . = ALIGN(8); 132 __start_phys_mem_map_section = . ; 133 KEEP(*(phys_mem_map_section)) 134 __end_phys_mem_map_section = . ; 135 . = ALIGN(8); 136 __start_phys_sdp_mem_section = . ; 137 KEEP(*(phys_sdp_mem_section)) 138 __end_phys_sdp_mem_section = . ; 139 . = ALIGN(8); 140 __start_phys_nsec_ddr_section = . ; 141 KEEP(*(phys_nsec_ddr_section)) 142 __end_phys_nsec_ddr_section = . ; 143 . = ALIGN(8); 144 __start_phys_ddr_overall_section = . ; 145 KEEP(*(phys_ddr_overall_section)) 146 __end_phys_ddr_overall_section = . ; 147 148 . = ALIGN(8); 149 KEEP(*(SORT(.scattered_array*))); 150#endif 151 . = ALIGN(8); 152 __rodata_end = .; 153 } 154 155 .interp : { *(.interp) } 156 .hash : { *(.hash) } 157 .dynsym : { *(.dynsym) } 158 .dynstr : { *(.dynstr) } 159 .rel.text : { *(.rel.text) *(.rel.gnu.linkonce.t*) } 160 .rela.text : { *(.rela.text) *(.rela.gnu.linkonce.t*) } 161 .rel.data : { *(.rel.data) *(.rel.gnu.linkonce.d*) } 162 .rela.data : { *(.rela.data) *(.rela.gnu.linkonce.d*) } 163 .rel.rodata : { *(.rel.rodata) *(.rel.gnu.linkonce.r*) } 164 .rela.rodata : { *(.rela.rodata) *(.rela.gnu.linkonce.r*) } 165 .rel.got : { *(.rel.got) } 166 .rela.got : { *(.rela.got) } 167 .rel.ctors : { *(.rel.ctors) } 168 .rela.ctors : { *(.rela.ctors) } 169 .rel.dtors : { *(.rel.dtors) } 170 .rela.dtors : { *(.rela.dtors) } 171 .rel.init : { *(.rel.init) } 172 .rela.init : { *(.rela.init) } 173 .rel.fini : { *(.rel.fini) } 174 .rela.fini : { *(.rela.fini) } 175 .rel.bss : { *(.rel.bss) } 176 .rela.bss : { *(.rela.bss) } 177 .rel.plt : { *(.rel.plt) } 178 .rela.plt : { *(.rela.plt) } 179 .init : { *(.init) } =0x9090 180 .plt : { *(.plt) } 181 182 /* .ARM.exidx is sorted, so has to go in its own output section. */ 183 .ARM.exidx : { 184 __exidx_start = .; 185 *(.ARM.exidx* .gnu.linkonce.armexidx.*) 186 __exidx_end = .; 187 } 188 189 .ARM.extab : { 190 __extab_start = .; 191 *(.ARM.extab*) 192 __extab_end = .; 193 } 194 195 /* Start page aligned read-write memory */ 196#ifdef CFG_CORE_RWDATA_NOEXEC 197 . = ALIGN(SMALL_PAGE_SIZE); 198#endif 199 __flatmap_unpg_ro_size = . - __flatmap_unpg_ro_start; 200 __flatmap_unpg_rw_start = .; 201 202 .data : ALIGN(8) { 203 /* writable data */ 204 __data_start_rom = .; 205 /* in one segment binaries, the rom data address is on top 206 of the ram data address */ 207 __data_start = .; 208 *(.data .data.* .gnu.linkonce.d.*) 209 . = ALIGN(8); 210 } 211 212 .ctors : ALIGN(8) { 213 __ctor_list = .; 214 KEEP(*(.ctors .ctors.* .init_array .init_array.*)) 215 __ctor_end = .; 216 } 217 .dtors : ALIGN(8) { 218 __dtor_list = .; 219 KEEP(*(.dtors .dtors.* .fini_array .fini_array.*)) 220 __dtor_end = .; 221 } 222 .got : { *(.got.plt) *(.got) } 223 .dynamic : { *(.dynamic) } 224 225 /* unintialized data */ 226 .bss : { 227 __data_end = .; 228 __bss_start = .; 229 *(.bss .bss.*) 230 *(.gnu.linkonce.b.*) 231 *(COMMON) 232 . = ALIGN(8); 233 __bss_end = .; 234 } 235 236 .heap1 (NOLOAD) : { 237 /* 238 * We're keeping track of the padding added before the 239 * .nozi section so we can do something useful with 240 * this otherwise wasted memory. 241 */ 242 __heap1_start = .; 243#ifndef CFG_WITH_PAGER 244 . += CFG_CORE_HEAP_SIZE; 245#endif 246 . = ALIGN(16 * 1024); 247 __heap1_end = .; 248 } 249 250 /* 251 * Uninitialized data that shouldn't be zero initialized at 252 * runtime. 253 * 254 * L1 mmu table requires 16 KiB alignment 255 */ 256 .nozi (NOLOAD) : { 257 __nozi_start = .; 258 ASSERT(!(__nozi_start & (16 * 1024 - 1)), "align nozi to 16kB"); 259 260 KEEP(*(.nozi .nozi.*)) 261 . = ALIGN(16); 262 __nozi_end = .; 263 __nozi_stack_start = .; 264 KEEP(*(.nozi_stack .nozi_stack.*)) 265 . = ALIGN(8); 266 __nozi_stack_end = .; 267 } 268 269#ifdef CFG_WITH_PAGER 270 .heap2 (NOLOAD) : { 271 __heap2_start = .; 272 /* 273 * Reserve additional memory for heap, the total should be 274 * at least CFG_CORE_HEAP_SIZE, but count what has already 275 * been reserved in .heap1 276 */ 277 . += CFG_CORE_HEAP_SIZE - (__heap1_end - __heap1_start); 278 . = ALIGN(SMALL_PAGE_SIZE); 279 __heap2_end = .; 280 } 281 282 /* Start page aligned read-only memory */ 283 __flatmap_unpg_rw_size = . - __flatmap_unpg_rw_start; 284 285 __init_start = .; 286 __flatmap_init_rx_start = .; 287 288 ASSERT(!(__flatmap_init_rx_start & (SMALL_PAGE_SIZE - 1)), 289 "read-write memory is not paged aligned") 290 291 .text_init : { 292/* 293 * Include list of sections needed for boot initialization, this list 294 * overlaps with unpaged.ld.S but since unpaged.ld.S is first all those 295 * sections will go into the unpaged area. 296 */ 297#include <text_init.ld.S> 298 KEEP(*(.text.startup.*)); 299 /* Make sure constructor functions are available during init */ 300 KEEP(*(.text._GLOBAL__sub_*)); 301 . = ALIGN(8); 302 } 303 304#ifdef CFG_CORE_RODATA_NOEXEC 305 . = ALIGN(SMALL_PAGE_SIZE); 306#endif 307 __flatmap_init_rx_size = . - __flatmap_init_rx_start; 308 __flatmap_init_ro_start = .; 309 310 .rodata_init : { 311#include <rodata_init.ld.S> 312 . = ALIGN(8); 313 __start_phys_mem_map_section = . ; 314 KEEP(*(phys_mem_map_section)) 315 __end_phys_mem_map_section = . ; 316 . = ALIGN(8); 317 __start_phys_sdp_mem_section = . ; 318 KEEP(*(phys_sdp_mem_section)) 319 __end_phys_sdp_mem_section = . ; 320 . = ALIGN(8); 321 __start_phys_nsec_ddr_section = . ; 322 KEEP(*(phys_nsec_ddr_section)) 323 __end_phys_nsec_ddr_section = . ; 324 . = ALIGN(8); 325 __start_phys_ddr_overall_section = . ; 326 KEEP(*(phys_ddr_overall_section)) 327 __end_phys_ddr_overall_section = . ; 328 329 . = ALIGN(8); 330 KEEP(*(SORT(.scattered_array*))); 331 332 . = ALIGN(8); 333 __rodata_init_end = .; 334 } 335 __rodata_init_end = .; 336 337 __init_end = ROUNDUP(__rodata_init_end, SMALL_PAGE_SIZE); 338 __init_size = __init_end - __init_start; 339 340 /* vcore flat map stops here. No need to page align, rodata follows. */ 341 __flatmap_init_ro_size = __init_end - __flatmap_init_ro_start; 342 343 .rodata_pageable : ALIGN(8) { 344#ifdef CFG_DT 345 __rodata_dtdrv_start = .; 346 KEEP(*(.rodata.dtdrv)) 347 __rodata_dtdrv_end = .; 348#endif 349#ifdef CFG_EARLY_TA 350 . = ALIGN(8); 351 __rodata_early_ta_start = .; 352 KEEP(*(.rodata.early_ta)) 353 __rodata_early_ta_end = .; 354#endif 355 *(.rodata*) 356 } 357 358#ifdef CFG_CORE_RODATA_NOEXEC 359 . = ALIGN(SMALL_PAGE_SIZE); 360#endif 361 362 .text_pageable : ALIGN(8) { 363 *(.text*) 364 . = ALIGN(SMALL_PAGE_SIZE); 365 } 366 367 __pageable_part_end = .; 368 __pageable_part_start = __init_end; 369 __pageable_start = __init_start; 370 __pageable_end = __pageable_part_end; 371 372 /* 373 * Assign a safe spot to store the hashes of the pages before 374 * heap is initialized. 375 */ 376 __tmp_hashes_start = __init_end; 377 __tmp_hashes_size = ((__pageable_end - __pageable_start) / 378 SMALL_PAGE_SIZE) * 32; 379 __tmp_hashes_end = __tmp_hashes_start + __tmp_hashes_size; 380 381 __init_mem_usage = __tmp_hashes_end - TEE_TEXT_VA_START; 382 383 ASSERT(TEE_LOAD_ADDR >= TEE_RAM_START, 384 "Load address before start of physical memory") 385 ASSERT(TEE_LOAD_ADDR < (TEE_RAM_START + TEE_RAM_PH_SIZE), 386 "Load address after end of physical memory") 387 ASSERT(__tmp_hashes_end < (TEE_RAM_VA_START + TEE_RAM_PH_SIZE), 388 "OP-TEE can't fit init part into available physical memory") 389 ASSERT((TEE_RAM_VA_START + TEE_RAM_PH_SIZE - __init_end) > 390 SMALL_PAGE_SIZE, "Too few free pages to initialize paging") 391 392 393#endif /*CFG_WITH_PAGER*/ 394 395#ifdef CFG_CORE_SANITIZE_KADDRESS 396 . = TEE_RAM_VA_START + (TEE_RAM_VA_SIZE * 8) / 9 - 8; 397 . = ALIGN(8); 398 .asan_shadow : { 399 __asan_shadow_start = .; 400 . += TEE_RAM_VA_SIZE / 9; 401 __asan_shadow_end = .; 402 __asan_shadow_size = __asan_shadow_end - __asan_shadow_start; 403 } 404#endif /*CFG_CORE_SANITIZE_KADDRESS*/ 405 406 __end = .; 407 408#ifndef CFG_WITH_PAGER 409 __init_size = __data_end - TEE_TEXT_VA_START; 410 __init_mem_usage = __end - TEE_TEXT_VA_START; 411#endif 412 /* 413 * Guard against moving the location counter backwards in the assignment 414 * below. 415 */ 416 ASSERT(. <= (TEE_RAM_VA_START + TEE_RAM_VA_SIZE), 417 "TEE_RAM_VA_SIZE is too small") 418 . = TEE_RAM_VA_START + TEE_RAM_VA_SIZE; 419 420 _end_of_ram = .; 421 422#ifndef CFG_WITH_PAGER 423 __flatmap_unpg_rw_size = _end_of_ram - __flatmap_unpg_rw_start; 424#endif 425 426 /DISCARD/ : { 427 /* Strip unnecessary stuff */ 428 *(.comment .note .eh_frame) 429 /* Strip meta variables */ 430 *(__keep_meta_vars*) 431 } 432 433} 434 435/* Unpaged read-only memories */ 436__vcore_unpg_rx_start = __flatmap_unpg_rx_start; 437__vcore_unpg_ro_start = __flatmap_unpg_ro_start; 438#ifdef CFG_CORE_RODATA_NOEXEC 439__vcore_unpg_rx_size = __flatmap_unpg_rx_size; 440__vcore_unpg_ro_size = __flatmap_unpg_ro_size; 441#else 442__vcore_unpg_rx_size = __flatmap_unpg_rx_size + __flatmap_unpg_ro_size; 443__vcore_unpg_ro_size = 0; 444#endif 445 446/* Unpaged read-write memory */ 447__vcore_unpg_rw_start = __flatmap_unpg_rw_start; 448__vcore_unpg_rw_size = __flatmap_unpg_rw_size; 449 450#ifdef CFG_WITH_PAGER 451/* 452 * Core init mapping shall cover up to end of the physical RAM. 453 * This is required since the hash table is appended to the 454 * binary data after the firmware build sequence. 455 */ 456#define __FLATMAP_PAGER_TRAILING_SPACE \ 457 (TEE_RAM_START + TEE_RAM_PH_SIZE - \ 458 (__flatmap_init_ro_start + __flatmap_init_ro_size)) 459 460/* Paged/init read-only memories */ 461__vcore_init_rx_start = __flatmap_init_rx_start; 462__vcore_init_ro_start = __flatmap_init_ro_start; 463#ifdef CFG_CORE_RODATA_NOEXEC 464__vcore_init_rx_size = __flatmap_init_rx_size; 465__vcore_init_ro_size = __flatmap_init_ro_size + __FLATMAP_PAGER_TRAILING_SPACE; 466#else 467__vcore_init_rx_size = __flatmap_init_rx_size + __flatmap_init_ro_size + 468 __FLATMAP_PAGER_TRAILING_SPACE; 469__vcore_init_ro_size = 0; 470#endif /* CFG_CORE_RODATA_NOEXEC */ 471#endif /* CFG_WITH_PAGER */ 472 473#ifdef CFG_CORE_SANITIZE_KADDRESS 474__asan_map_start = (__asan_shadow_start / SMALL_PAGE_SIZE) * 475 SMALL_PAGE_SIZE; 476__asan_map_end = ((__asan_shadow_end - 1) / SMALL_PAGE_SIZE) * 477 SMALL_PAGE_SIZE + SMALL_PAGE_SIZE; 478__asan_map_size = __asan_map_end - __asan_map_start; 479#endif /*CFG_CORE_SANITIZE_KADDRESS*/ 480