1/* SPDX-License-Identifier: (BSD-2-Clause AND MIT) */ 2/* 3 * Copyright (c) 2014, Linaro Limited 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright notice, 10 * this list of conditions and the following disclaimer. 11 * 12 * 2. Redistributions in binary form must reproduce the above copyright notice, 13 * this list of conditions and the following disclaimer in the documentation 14 * and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 20 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29/* 30 * Copyright (c) 2008-2010 Travis Geiselbrecht 31 * 32 * Permission is hereby granted, free of charge, to any person obtaining 33 * a copy of this software and associated documentation files 34 * (the "Software"), to deal in the Software without restriction, 35 * including without limitation the rights to use, copy, modify, merge, 36 * publish, distribute, sublicense, and/or sell copies of the Software, 37 * and to permit persons to whom the Software is furnished to do so, 38 * subject to the following conditions: 39 * 40 * The above copyright notice and this permission notice shall be 41 * included in all copies or substantial portions of the Software. 42 * 43 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 44 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 45 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 46 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY 47 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 48 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 49 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 50 */ 51 52#include <platform_config.h> 53 54#ifndef SMALL_PAGE_SIZE 55#define SMALL_PAGE_SIZE 4096 56#endif 57#ifndef ROUNDUP 58#define ROUNDUP(x, y) ((((x) + (y) - 1) / (y)) * (y)) 59#define ROUNDDOWN(x, y) (((x) / (y)) * (y)) 60#endif 61 62/* 63 * TEE_RAM_VA_START: The start virtual address of the TEE RAM 64 * TEE_TEXT_VA_START: The start virtual address of the OP-TEE text 65 */ 66#define TEE_RAM_VA_START CFG_TEE_RAM_START 67#define TEE_TEXT_VA_START (TEE_RAM_VA_START + \ 68 (CFG_TEE_LOAD_ADDR - CFG_TEE_RAM_START)) 69 70OUTPUT_FORMAT(CFG_KERN_LINKER_FORMAT) 71OUTPUT_ARCH(CFG_KERN_LINKER_ARCH) 72 73ENTRY(_start) 74SECTIONS 75{ 76 . = TEE_TEXT_VA_START; 77#ifdef ARM32 78 ASSERT(!(TEE_TEXT_VA_START & 31), "text start should align to 32bytes") 79#endif 80#ifdef ARM64 81 ASSERT(!(TEE_TEXT_VA_START & 127), "text start should align to 128bytes") 82#endif 83 __text_start = .; 84 85 /* 86 * Memory between TEE_TEXT_VA_START and page aligned rounded down 87 * value will be mapped with unpaged "text" section attributes: 88 * likely to be read-only/executable. 89 */ 90 __flatmap_unpg_rx_start = ROUNDDOWN(__text_start, SMALL_PAGE_SIZE); 91 92 .text : { 93 KEEP(*(.text._start)) 94 KEEP(*(.text.init .text.plat_cpu_reset_early \ 95 .text.reset .text.reset_primary .text.unhandled_cpu \ 96 .text.__assert_flat_mapped_range)) 97 98 . = ALIGN(8); 99 __initcall_start = .; 100 KEEP(*(.initcall1)) 101 KEEP(*(.initcall2)) 102 KEEP(*(.initcall3)) 103 KEEP(*(.initcall4)) 104 __initcall_end = .; 105 106#ifdef CFG_WITH_PAGER 107 *(.text) 108/* Include list of sections needed for paging */ 109#include <text_unpaged.ld.S> 110#else 111 *(.text .text.*) 112#endif 113 *(.sram.text.glue_7* .gnu.linkonce.t.*) 114 . = ALIGN(8); 115 } 116 __text_end = .; 117 118#ifdef CFG_CORE_RODATA_NOEXEC 119 . = ALIGN(SMALL_PAGE_SIZE); 120#endif 121 __flatmap_unpg_rx_size = . - __flatmap_unpg_rx_start; 122 __flatmap_unpg_ro_start = .; 123 124 .rodata : ALIGN(8) { 125 __rodata_start = .; 126 *(.gnu.linkonce.r.*) 127#ifdef CFG_WITH_PAGER 128 *(.rodata .rodata.__unpaged) 129#include <rodata_unpaged.ld.S> 130#else 131#ifdef CFG_DT 132 __rodata_dtdrv_start = .; 133 KEEP(*(.rodata.dtdrv)) 134 __rodata_dtdrv_end = .; 135#endif 136#ifdef CFG_EARLY_TA 137 . = ALIGN(8); 138 __rodata_early_ta_start = .; 139 KEEP(*(.rodata.early_ta)) 140 __rodata_early_ta_end = .; 141#endif 142 143 *(.rodata .rodata.*) 144 145 /* 146 * 8 to avoid unwanted padding between __start_ta_head_section 147 * and the first structure in ta_head_section, in 64-bit 148 * builds 149 */ 150 . = ALIGN(8); 151 __start_ta_head_section = . ; 152 KEEP(*(ta_head_section)) 153 __stop_ta_head_section = . ; 154 . = ALIGN(8); 155 __start_phys_mem_map_section = . ; 156 KEEP(*(phys_mem_map_section)) 157 __end_phys_mem_map_section = . ; 158 . = ALIGN(8); 159 __start_phys_sdp_mem_section = . ; 160 KEEP(*(phys_sdp_mem_section)) 161 __end_phys_sdp_mem_section = . ; 162 . = ALIGN(8); 163 __start_phys_nsec_ddr_section = . ; 164 KEEP(*(phys_nsec_ddr_section)) 165 __end_phys_nsec_ddr_section = . ; 166#endif 167 . = ALIGN(8); 168 __rodata_end = .; 169 } 170 171 .interp : { *(.interp) } 172 .hash : { *(.hash) } 173 .dynsym : { *(.dynsym) } 174 .dynstr : { *(.dynstr) } 175 .rel.text : { *(.rel.text) *(.rel.gnu.linkonce.t*) } 176 .rela.text : { *(.rela.text) *(.rela.gnu.linkonce.t*) } 177 .rel.data : { *(.rel.data) *(.rel.gnu.linkonce.d*) } 178 .rela.data : { *(.rela.data) *(.rela.gnu.linkonce.d*) } 179 .rel.rodata : { *(.rel.rodata) *(.rel.gnu.linkonce.r*) } 180 .rela.rodata : { *(.rela.rodata) *(.rela.gnu.linkonce.r*) } 181 .rel.got : { *(.rel.got) } 182 .rela.got : { *(.rela.got) } 183 .rel.ctors : { *(.rel.ctors) } 184 .rela.ctors : { *(.rela.ctors) } 185 .rel.dtors : { *(.rel.dtors) } 186 .rela.dtors : { *(.rela.dtors) } 187 .rel.init : { *(.rel.init) } 188 .rela.init : { *(.rela.init) } 189 .rel.fini : { *(.rel.fini) } 190 .rela.fini : { *(.rela.fini) } 191 .rel.bss : { *(.rel.bss) } 192 .rela.bss : { *(.rela.bss) } 193 .rel.plt : { *(.rel.plt) } 194 .rela.plt : { *(.rela.plt) } 195 .init : { *(.init) } =0x9090 196 .plt : { *(.plt) } 197 198 /* .ARM.exidx is sorted, so has to go in its own output section. */ 199 .ARM.exidx : { 200 __exidx_start = .; 201 *(.ARM.exidx* .gnu.linkonce.armexidx.*) 202 __exidx_end = .; 203 } 204 205 .ARM.extab : { 206 __extab_start = .; 207 *(.ARM.extab*) 208 __extab_end = .; 209 } 210 211 /* Start page aligned read-write memory */ 212#ifdef CFG_CORE_RWDATA_NOEXEC 213 . = ALIGN(SMALL_PAGE_SIZE); 214#endif 215 __flatmap_unpg_ro_size = . - __flatmap_unpg_ro_start; 216 __flatmap_unpg_rw_start = .; 217 218 .data : ALIGN(8) { 219 /* writable data */ 220 __data_start_rom = .; 221 /* in one segment binaries, the rom data address is on top 222 of the ram data address */ 223 __data_start = .; 224 *(.data .data.* .gnu.linkonce.d.*) 225 . = ALIGN(8); 226 } 227 228 .ctors : ALIGN(8) { 229 __ctor_list = .; 230 KEEP(*(.ctors .ctors.* .init_array .init_array.*)) 231 __ctor_end = .; 232 } 233 .dtors : ALIGN(8) { 234 __dtor_list = .; 235 KEEP(*(.dtors .dtors.* .fini_array .fini_array.*)) 236 __dtor_end = .; 237 } 238 .got : { *(.got.plt) *(.got) } 239 .dynamic : { *(.dynamic) } 240 241 /* unintialized data */ 242 .bss : { 243 __data_end = .; 244 __bss_start = .; 245 *(.bss .bss.*) 246 *(.gnu.linkonce.b.*) 247 *(COMMON) 248 . = ALIGN(8); 249 __bss_end = .; 250 } 251 252 .heap1 (NOLOAD) : { 253 /* 254 * We're keeping track of the padding added before the 255 * .nozi section so we can do something useful with 256 * this otherwise wasted memory. 257 */ 258 __heap1_start = .; 259#ifndef CFG_WITH_PAGER 260 . += CFG_CORE_HEAP_SIZE; 261#endif 262 . = ALIGN(16 * 1024); 263 __heap1_end = .; 264 } 265 266 /* 267 * Uninitialized data that shouldn't be zero initialized at 268 * runtime. 269 * 270 * L1 mmu table requires 16 KiB alignment 271 */ 272 .nozi (NOLOAD) : { 273 __nozi_start = .; 274 ASSERT(!(__nozi_start & (16 * 1024 - 1)), "align nozi to 16kB"); 275 276 KEEP(*(.nozi .nozi.*)) 277 . = ALIGN(16); 278 __nozi_end = .; 279 __nozi_stack_start = .; 280 KEEP(*(.nozi_stack)) 281 . = ALIGN(8); 282 __nozi_stack_end = .; 283 } 284 285#ifdef CFG_WITH_PAGER 286 .heap2 (NOLOAD) : { 287 __heap2_start = .; 288 /* 289 * Reserve additional memory for heap, the total should be 290 * at least CFG_CORE_HEAP_SIZE, but count what has already 291 * been reserved in .heap1 292 */ 293 . += CFG_CORE_HEAP_SIZE - (__heap1_end - __heap1_start); 294 . = ALIGN(SMALL_PAGE_SIZE); 295 __heap2_end = .; 296 } 297 298 /* Start page aligned read-only memory */ 299 __flatmap_unpg_rw_size = . - __flatmap_unpg_rw_start; 300 301 __init_start = .; 302 __flatmap_init_rx_start = .; 303 304 ASSERT(!(__flatmap_init_rx_start & (SMALL_PAGE_SIZE - 1)), 305 "read-write memory is not paged aligned") 306 307 .text_init : { 308/* 309 * Include list of sections needed for boot initialization, this list 310 * overlaps with unpaged.ld.S but since unpaged.ld.S is first all those 311 * sections will go into the unpaged area. 312 */ 313#include <text_init.ld.S> 314 KEEP(*(.text.startup.*)); 315 /* Make sure constructor functions are available during init */ 316 KEEP(*(.text._GLOBAL__sub_*)); 317 . = ALIGN(8); 318 } 319 320#ifdef CFG_CORE_RODATA_NOEXEC 321 . = ALIGN(SMALL_PAGE_SIZE); 322#endif 323 __flatmap_init_rx_size = . - __flatmap_init_rx_start; 324 __flatmap_init_ro_start = .; 325 326 .rodata_init : { 327#include <rodata_init.ld.S> 328 . = ALIGN(8); 329 __start_phys_mem_map_section = . ; 330 KEEP(*(phys_mem_map_section)) 331 __end_phys_mem_map_section = . ; 332 . = ALIGN(8); 333 __start_phys_sdp_mem_section = . ; 334 KEEP(*(phys_sdp_mem_section)) 335 __end_phys_sdp_mem_section = . ; 336 . = ALIGN(8); 337 __start_phys_nsec_ddr_section = . ; 338 KEEP(*(phys_nsec_ddr_section)) 339 __end_phys_nsec_ddr_section = . ; 340 . = ALIGN(8); 341 __rodata_init_end = .; 342 } 343 __rodata_init_end = .; 344 345 __init_end = ROUNDUP(__rodata_init_end, SMALL_PAGE_SIZE); 346 __init_size = __init_end - __init_start; 347 348 /* vcore flat map stops here. No need to page align, rodata follows. */ 349 __flatmap_init_ro_size = __init_end - __flatmap_init_ro_start; 350 351 .rodata_pageable : ALIGN(8) { 352#ifdef CFG_DT 353 __rodata_dtdrv_start = .; 354 KEEP(*(.rodata.dtdrv)) 355 __rodata_dtdrv_end = .; 356#endif 357#ifdef CFG_EARLY_TA 358 . = ALIGN(8); 359 __rodata_early_ta_start = .; 360 KEEP(*(.rodata.early_ta)) 361 __rodata_early_ta_end = .; 362#endif 363 *(.rodata*) 364 /* 365 * 8 to avoid unwanted padding between __start_ta_head_section 366 * and the first structure in ta_head_section, in 64-bit 367 * builds 368 */ 369 . = ALIGN(8); 370 __start_ta_head_section = . ; 371 KEEP(*(ta_head_section)) 372 __stop_ta_head_section = . ; 373 } 374 375#ifdef CFG_CORE_RODATA_NOEXEC 376 . = ALIGN(SMALL_PAGE_SIZE); 377#endif 378 379 .text_pageable : ALIGN(8) { 380 *(.text*) 381 . = ALIGN(SMALL_PAGE_SIZE); 382 } 383 384 __pageable_part_end = .; 385 __pageable_part_start = __init_end; 386 __pageable_start = __init_start; 387 __pageable_end = __pageable_part_end; 388 389 /* 390 * Assign a safe spot to store the hashes of the pages before 391 * heap is initialized. 392 */ 393 __tmp_hashes_start = __init_end; 394 __tmp_hashes_size = ((__pageable_end - __pageable_start) / 395 SMALL_PAGE_SIZE) * 32; 396 __tmp_hashes_end = __tmp_hashes_start + __tmp_hashes_size; 397 398 __init_mem_usage = __tmp_hashes_end - TEE_TEXT_VA_START; 399 400 ASSERT(CFG_TEE_LOAD_ADDR >= CFG_TEE_RAM_START, 401 "Load address before start of physical memory") 402 ASSERT(CFG_TEE_LOAD_ADDR < (CFG_TEE_RAM_START + CFG_TEE_RAM_PH_SIZE), 403 "Load address after end of physical memory") 404 ASSERT(__tmp_hashes_end < (TEE_RAM_VA_START + CFG_TEE_RAM_PH_SIZE), 405 "OP-TEE can't fit init part into available physical memory") 406 ASSERT((TEE_RAM_VA_START + CFG_TEE_RAM_PH_SIZE - __init_end) > 407 SMALL_PAGE_SIZE, "Too few free pages to initialize paging") 408 409 410#endif /*CFG_WITH_PAGER*/ 411 412#ifdef CFG_CORE_SANITIZE_KADDRESS 413 . = TEE_RAM_VA_START + (CFG_TEE_RAM_VA_SIZE * 8) / 9 - 8; 414 . = ALIGN(8); 415 .asan_shadow : { 416 __asan_shadow_start = .; 417 . += CFG_TEE_RAM_VA_SIZE / 9; 418 __asan_shadow_end = .; 419 __asan_shadow_size = __asan_shadow_end - __asan_shadow_start; 420 } 421#endif /*CFG_CORE_SANITIZE_KADDRESS*/ 422 423 __end = .; 424 425#ifndef CFG_WITH_PAGER 426 __init_size = __data_end - TEE_TEXT_VA_START; 427 __init_mem_usage = __end - TEE_TEXT_VA_START; 428#endif 429 /* 430 * Guard against moving the location counter backwards in the assignment 431 * below. 432 */ 433 ASSERT(. <= (TEE_RAM_VA_START + CFG_TEE_RAM_VA_SIZE), 434 "CFG_TEE_RAM_VA_SIZE is too small") 435 . = TEE_RAM_VA_START + CFG_TEE_RAM_VA_SIZE; 436 437 _end_of_ram = .; 438 439#ifndef CFG_WITH_PAGER 440 __flatmap_unpg_rw_size = _end_of_ram - __flatmap_unpg_rw_start; 441#endif 442 443 /DISCARD/ : { 444 /* Strip unnecessary stuff */ 445 *(.comment .note .eh_frame) 446 /* Strip meta variables */ 447 *(__keep_meta_vars*) 448 } 449 450} 451 452/* Unpaged read-only memories */ 453PROVIDE(__vcore_unpg_rx_start = __flatmap_unpg_rx_start); 454PROVIDE(__vcore_unpg_ro_start = __flatmap_unpg_ro_start); 455#ifdef CFG_CORE_RODATA_NOEXEC 456PROVIDE(__vcore_unpg_rx_size = __flatmap_unpg_rx_size); 457PROVIDE(__vcore_unpg_ro_size = __flatmap_unpg_ro_size); 458#else 459PROVIDE(__vcore_unpg_rx_size = __flatmap_unpg_rx_size + 460 __flatmap_unpg_ro_size); 461PROVIDE(__vcore_unpg_ro_size = 0); 462#endif 463 464/* Unpaged read-write memory */ 465PROVIDE(__vcore_unpg_rw_start = __flatmap_unpg_rw_start); 466PROVIDE(__vcore_unpg_rw_size = __flatmap_unpg_rw_size); 467 468#ifdef CFG_WITH_PAGER 469/* 470 * Core init mapping shall cover up to end of the physical RAM. 471 * This is required since the hash table is appended to the 472 * binary data after the firmware build sequence. 473 */ 474#define __FLATMAP_PAGER_TRAILING_SPACE \ 475 (CFG_TEE_RAM_START + CFG_TEE_RAM_PH_SIZE - \ 476 (__flatmap_init_ro_start + __flatmap_init_ro_size)) 477 478/* Paged/init read-only memories */ 479PROVIDE(__vcore_init_rx_start = __flatmap_init_rx_start); 480PROVIDE(__vcore_init_ro_start = __flatmap_init_ro_start); 481#ifdef CFG_CORE_RODATA_NOEXEC 482PROVIDE(__vcore_init_rx_size = __flatmap_init_rx_size); 483PROVIDE(__vcore_init_ro_size = __flatmap_init_ro_size + 484 __FLATMAP_PAGER_TRAILING_SPACE); 485#else 486PROVIDE(__vcore_init_rx_size = __flatmap_init_rx_size + 487 __flatmap_init_ro_size + 488 __FLATMAP_PAGER_TRAILING_SPACE); 489PROVIDE(__vcore_init_ro_size = 0); 490#endif /* CFG_CORE_RODATA_NOEXEC */ 491#endif /* CFG_WITH_PAGER */ 492 493#ifdef CFG_CORE_SANITIZE_KADDRESS 494PROVIDE(__asan_map_start = (__asan_shadow_start / SMALL_PAGE_SIZE) * 495 SMALL_PAGE_SIZE); 496PROVIDE(__asan_map_end = ((__asan_shadow_end - 1) / SMALL_PAGE_SIZE) * 497 SMALL_PAGE_SIZE + SMALL_PAGE_SIZE); 498PROVIDE(__asan_map_size = __asan_map_end - __asan_map_start); 499#endif /*CFG_CORE_SANITIZE_KADDRESS*/ 500