1/* SPDX-License-Identifier: (BSD-2-Clause AND MIT) */ 2/* 3 * Copyright (c) 2014, Linaro Limited 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright notice, 10 * this list of conditions and the following disclaimer. 11 * 12 * 2. Redistributions in binary form must reproduce the above copyright notice, 13 * this list of conditions and the following disclaimer in the documentation 14 * and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 20 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29/* 30 * Copyright (c) 2008-2010 Travis Geiselbrecht 31 * 32 * Permission is hereby granted, free of charge, to any person obtaining 33 * a copy of this software and associated documentation files 34 * (the "Software"), to deal in the Software without restriction, 35 * including without limitation the rights to use, copy, modify, merge, 36 * publish, distribute, sublicense, and/or sell copies of the Software, 37 * and to permit persons to whom the Software is furnished to do so, 38 * subject to the following conditions: 39 * 40 * The above copyright notice and this permission notice shall be 41 * included in all copies or substantial portions of the Software. 42 * 43 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 44 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 45 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 46 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY 47 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 48 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 49 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 50 */ 51 52#include <mm/core_mmu.h> 53#include <platform_config.h> 54#include <util.h> 55 56/* 57 * TEE_RAM_VA_START: The start virtual address of the TEE RAM 58 * TEE_TEXT_VA_START: The start virtual address of the OP-TEE text 59 */ 60#define TEE_RAM_VA_START TEE_RAM_START 61#define TEE_TEXT_VA_START (TEE_RAM_VA_START + \ 62 (TEE_LOAD_ADDR - TEE_RAM_START)) 63 64OUTPUT_FORMAT(CFG_KERN_LINKER_FORMAT) 65OUTPUT_ARCH(CFG_KERN_LINKER_ARCH) 66 67ENTRY(_start) 68SECTIONS 69{ 70 . = TEE_TEXT_VA_START; 71#ifdef ARM32 72 ASSERT(!(TEE_TEXT_VA_START & 31), "text start should align to 32bytes") 73#endif 74#ifdef ARM64 75 ASSERT(!(TEE_TEXT_VA_START & 127), "text start should align to 128bytes") 76#endif 77 __text_start = .; 78 79 /* 80 * Memory between TEE_TEXT_VA_START and page aligned rounded down 81 * value will be mapped with unpaged "text" section attributes: 82 * likely to be read-only/executable. 83 */ 84 __flatmap_unpg_rx_start = ROUNDDOWN(__text_start, SMALL_PAGE_SIZE); 85 86 .text : { 87 KEEP(*(.text._start)) 88 __identity_map_init_start = .; 89 *(.identity_map .identity_map.* \ 90 /* 91 * The one below is needed because it's a weak 92 * symbol that may be overridden by platform 93 * specific code. 94 */ 95 .text.get_core_pos_mpidr) 96 __identity_map_init_end = .; 97 KEEP(*(.text.init .text.plat_cpu_reset_early \ 98 .text.reset .text.reset_primary .text.unhandled_cpu \ 99 .text.__assert_flat_mapped_range)) 100 101#ifdef CFG_WITH_PAGER 102 *(.text) 103/* Include list of sections needed for paging */ 104#include <text_unpaged.ld.S> 105#else 106 *(.text .text.*) 107#endif 108 *(.sram.text.glue_7* .gnu.linkonce.t.*) 109 . = ALIGN(8); 110 } 111 __text_end = .; 112 113#ifdef CFG_CORE_RODATA_NOEXEC 114 . = ALIGN(SMALL_PAGE_SIZE); 115#endif 116 __flatmap_unpg_rx_size = . - __flatmap_unpg_rx_start; 117 __flatmap_unpg_ro_start = .; 118 119 .rodata : ALIGN(8) { 120 __rodata_start = .; 121 *(.gnu.linkonce.r.*) 122#ifdef CFG_WITH_PAGER 123 *(.rodata .rodata.__unpaged) 124#include <rodata_unpaged.ld.S> 125#else 126#ifdef CFG_DT 127 __rodata_dtdrv_start = .; 128 KEEP(*(.rodata.dtdrv)) 129 __rodata_dtdrv_end = .; 130#endif 131#ifdef CFG_EARLY_TA 132 . = ALIGN(8); 133 __rodata_early_ta_start = .; 134 KEEP(*(.rodata.early_ta)) 135 __rodata_early_ta_end = .; 136#endif 137 138 *(.rodata .rodata.*) 139 . = ALIGN(8); 140 KEEP(*(SORT(.scattered_array*))); 141#endif 142 . = ALIGN(8); 143 __rodata_end = .; 144 } 145 146 .hash : { *(.hash) } 147 .dynsym : { *(.dynsym) } 148 .dynstr : { *(.dynstr) } 149 .rel.text : { *(.rel.text) *(.rel.gnu.linkonce.t*) } 150 .rela.text : { *(.rela.text) *(.rela.gnu.linkonce.t*) } 151 .rel.data : { *(.rel.data) *(.rel.gnu.linkonce.d*) } 152 .rela.data : { *(.rela.data) *(.rela.gnu.linkonce.d*) } 153 .rel.rodata : { *(.rel.rodata) *(.rel.gnu.linkonce.r*) } 154 .rela.rodata : { *(.rela.rodata) *(.rela.gnu.linkonce.r*) } 155 .rel.got : { *(.rel.got) } 156 .rela.got : { *(.rela.got) } 157 .rel.ctors : { *(.rel.ctors) } 158 .rela.ctors : { *(.rela.ctors) } 159 .rel.dtors : { *(.rel.dtors) } 160 .rela.dtors : { *(.rela.dtors) } 161 .rel.init : { *(.rel.init) } 162 .rela.init : { *(.rela.init) } 163 .rel.fini : { *(.rel.fini) } 164 .rela.fini : { *(.rela.fini) } 165 .rel.bss : { *(.rel.bss) } 166 .rela.bss : { *(.rela.bss) } 167 .rel.plt : { *(.rel.plt) } 168 .rela.plt : { *(.rela.plt) } 169 .plt : { *(.plt) } 170 171 /* .ARM.exidx is sorted, so has to go in its own output section. */ 172 .ARM.exidx : { 173 __exidx_start = .; 174 *(.ARM.exidx* .gnu.linkonce.armexidx.*) 175 __exidx_end = .; 176 } 177 178 .ARM.extab : { 179 __extab_start = .; 180 *(.ARM.extab*) 181 __extab_end = .; 182 } 183 184 /* Start page aligned read-write memory */ 185#ifdef CFG_CORE_RWDATA_NOEXEC 186 . = ALIGN(SMALL_PAGE_SIZE); 187#endif 188 __flatmap_unpg_ro_size = . - __flatmap_unpg_ro_start; 189 190#ifdef CFG_VIRTUALIZATION 191 __flatmap_nex_rw_start = . ; 192 .nex_data : ALIGN(8) { 193 *(.nex_data .nex_data.*) 194 } 195 196 .nex_bss : ALIGN(8) { 197 __nex_bss_start = .; 198 *(.nex_bss .nex_bss.*) 199 __nex_bss_end = .; 200 } 201 202 /* 203 * We want to keep all nexus memory in one place, because 204 * it should be always mapped and it is easier to map one 205 * memory region than two. 206 * Next section are NOLOAD ones, but they are followed 207 * by sections with data. Thus, this NOLOAD section will 208 * be included in the resulting binary, filled with zeroes 209 */ 210 .nex_stack (NOLOAD) : { 211 __nozi_stack_start = .; 212 KEEP(*(.nozi_stack.stack_tmp .nozi_stack.stack_abt)) 213 . = ALIGN(8); 214 __nozi_stack_end = .; 215 } 216 217 .nex_heap (NOLOAD) : { 218 __nex_heap_start = .; 219 . += CFG_CORE_NEX_HEAP_SIZE; 220 . = ALIGN(16 * 1024); 221 __nex_heap_end = .; 222 } 223 .nex_nozi (NOLOAD) : { 224 ASSERT(!(ABSOLUTE(.) & (16 * 1024 - 1)), "align nozi to 16kB"); 225 KEEP(*(.nozi.mmu.l1 .nozi.mmu.l2)) 226 } 227 228 . = ALIGN(SMALL_PAGE_SIZE); 229 230 __flatmap_nex_rw_size = . - __flatmap_nex_rw_start; 231 __flatmap_nex_rw_end = .; 232#endif 233 234 __flatmap_unpg_rw_start = .; 235 236 .data : ALIGN(8) { 237 /* writable data */ 238 __data_start_rom = .; 239 /* in one segment binaries, the rom data address is on top 240 of the ram data address */ 241 __data_start = .; 242 *(.data .data.* .gnu.linkonce.d.*) 243 . = ALIGN(8); 244 } 245 246 .ctors : ALIGN(8) { 247 __ctor_list = .; 248 KEEP(*(.ctors .ctors.* .init_array .init_array.*)) 249 __ctor_end = .; 250 } 251 .dtors : ALIGN(8) { 252 __dtor_list = .; 253 KEEP(*(.dtors .dtors.* .fini_array .fini_array.*)) 254 __dtor_end = .; 255 } 256 .got : { *(.got.plt) *(.got) } 257 .dynamic : { *(.dynamic) } 258 259 /* unintialized data */ 260 .bss : { 261 __data_end = .; 262 __bss_start = .; 263 *(.bss .bss.*) 264 *(.gnu.linkonce.b.*) 265 *(COMMON) 266 . = ALIGN(8); 267 __bss_end = .; 268 } 269 270 .heap1 (NOLOAD) : { 271 /* 272 * We're keeping track of the padding added before the 273 * .nozi section so we can do something useful with 274 * this otherwise wasted memory. 275 */ 276 __heap1_start = .; 277#ifndef CFG_WITH_PAGER 278 . += CFG_CORE_HEAP_SIZE; 279#endif 280#ifdef CFG_WITH_LPAE 281 . = ALIGN(4 * 1024); 282#else 283 . = ALIGN(16 * 1024); 284#endif 285 __heap1_end = .; 286 } 287 /* 288 * Uninitialized data that shouldn't be zero initialized at 289 * runtime. 290 * 291 * L1 mmu table requires 16 KiB alignment 292 */ 293 .nozi (NOLOAD) : { 294 __nozi_start = .; 295 KEEP(*(.nozi .nozi.*)) 296 . = ALIGN(16); 297 __nozi_end = .; 298 /* 299 * If virtualization is enabled, abt and tmp stacks will placed 300 * at above .nex_stack section and thread stacks will go there 301 */ 302 __nozi_stack_start = .; 303 KEEP(*(.nozi_stack .nozi_stack.*)) 304 . = ALIGN(8); 305 __nozi_stack_end = .; 306 } 307 308#ifdef CFG_WITH_PAGER 309 .heap2 (NOLOAD) : { 310 __heap2_start = .; 311 /* 312 * Reserve additional memory for heap, the total should be 313 * at least CFG_CORE_HEAP_SIZE, but count what has already 314 * been reserved in .heap1 315 */ 316 . += CFG_CORE_HEAP_SIZE - (__heap1_end - __heap1_start); 317 . = ALIGN(SMALL_PAGE_SIZE); 318 __heap2_end = .; 319 } 320 321 /* Start page aligned read-only memory */ 322 __flatmap_unpg_rw_size = . - __flatmap_unpg_rw_start; 323 324 __init_start = .; 325 __flatmap_init_rx_start = .; 326 327 ASSERT(!(__flatmap_init_rx_start & (SMALL_PAGE_SIZE - 1)), 328 "read-write memory is not paged aligned") 329 330 .text_init : { 331/* 332 * Include list of sections needed for boot initialization, this list 333 * overlaps with unpaged.ld.S but since unpaged.ld.S is first all those 334 * sections will go into the unpaged area. 335 */ 336#include <text_init.ld.S> 337 KEEP(*(.text.startup.*)); 338 /* Make sure constructor functions are available during init */ 339 KEEP(*(.text._GLOBAL__sub_*)); 340 . = ALIGN(8); 341 } 342 343#ifdef CFG_CORE_RODATA_NOEXEC 344 . = ALIGN(SMALL_PAGE_SIZE); 345#endif 346 __flatmap_init_rx_size = . - __flatmap_init_rx_start; 347 __flatmap_init_ro_start = .; 348 349 .rodata_init : { 350#include <rodata_init.ld.S> 351 352 . = ALIGN(8); 353 KEEP(*(SORT(.scattered_array*))); 354 355 . = ALIGN(8); 356 __rodata_init_end = .; 357 } 358 __rodata_init_end = .; 359 360 __init_end = ROUNDUP(__rodata_init_end, SMALL_PAGE_SIZE); 361 __init_size = __init_end - __init_start; 362 363 /* vcore flat map stops here. No need to page align, rodata follows. */ 364 __flatmap_init_ro_size = __init_end - __flatmap_init_ro_start; 365 366 .rodata_pageable : ALIGN(8) { 367#ifdef CFG_DT 368 __rodata_dtdrv_start = .; 369 KEEP(*(.rodata.dtdrv)) 370 __rodata_dtdrv_end = .; 371#endif 372#ifdef CFG_EARLY_TA 373 . = ALIGN(8); 374 __rodata_early_ta_start = .; 375 KEEP(*(.rodata.early_ta)) 376 __rodata_early_ta_end = .; 377#endif 378 *(.rodata*) 379 } 380 381#ifdef CFG_CORE_RODATA_NOEXEC 382 . = ALIGN(SMALL_PAGE_SIZE); 383#endif 384 385 .text_pageable : ALIGN(8) { 386 *(.text*) 387 . = ALIGN(SMALL_PAGE_SIZE); 388 } 389 390 __pageable_part_end = .; 391 __pageable_part_start = __init_end; 392 __pageable_start = __init_start; 393 __pageable_end = __pageable_part_end; 394 395 /* 396 * Assign a safe spot to store the hashes of the pages before 397 * heap is initialized. 398 */ 399 __tmp_hashes_start = __init_end; 400 __tmp_hashes_size = ((__pageable_end - __pageable_start) / 401 SMALL_PAGE_SIZE) * 32; 402 __tmp_hashes_end = __tmp_hashes_start + __tmp_hashes_size; 403 404 __init_mem_usage = __tmp_hashes_end - TEE_TEXT_VA_START; 405 406 ASSERT(TEE_LOAD_ADDR >= TEE_RAM_START, 407 "Load address before start of physical memory") 408 ASSERT(TEE_LOAD_ADDR < (TEE_RAM_START + TEE_RAM_PH_SIZE), 409 "Load address after end of physical memory") 410 ASSERT(__tmp_hashes_end < (TEE_RAM_VA_START + TEE_RAM_PH_SIZE), 411 "OP-TEE can't fit init part into available physical memory") 412 ASSERT((TEE_RAM_VA_START + TEE_RAM_PH_SIZE - __init_end) > 413 SMALL_PAGE_SIZE, "Too few free pages to initialize paging") 414 415 416#endif /*CFG_WITH_PAGER*/ 417 418#ifdef CFG_CORE_SANITIZE_KADDRESS 419 . = TEE_RAM_VA_START + (TEE_RAM_VA_SIZE * 8) / 9 - 8; 420 . = ALIGN(8); 421 .asan_shadow : { 422 __asan_shadow_start = .; 423 . += TEE_RAM_VA_SIZE / 9; 424 __asan_shadow_end = .; 425 __asan_shadow_size = __asan_shadow_end - __asan_shadow_start; 426 } 427#endif /*CFG_CORE_SANITIZE_KADDRESS*/ 428 429 __end = .; 430 431#ifndef CFG_WITH_PAGER 432 __init_size = __data_end - TEE_TEXT_VA_START; 433 __init_mem_usage = __end - TEE_TEXT_VA_START; 434#endif 435 /* 436 * Guard against moving the location counter backwards in the assignment 437 * below. 438 */ 439 ASSERT(. <= (TEE_RAM_VA_START + TEE_RAM_VA_SIZE), 440 "TEE_RAM_VA_SIZE is too small") 441 . = TEE_RAM_VA_START + TEE_RAM_VA_SIZE; 442 443 _end_of_ram = .; 444 445#ifndef CFG_WITH_PAGER 446 __flatmap_unpg_rw_size = _end_of_ram - __flatmap_unpg_rw_start; 447#endif 448 449 /DISCARD/ : { 450 /* Strip unnecessary stuff */ 451 *(.comment .note .eh_frame .interp) 452 /* Strip meta variables */ 453 *(__keep_meta_vars*) 454 } 455 456} 457 458/* Unpaged read-only memories */ 459__vcore_unpg_rx_start = __flatmap_unpg_rx_start; 460__vcore_unpg_ro_start = __flatmap_unpg_ro_start; 461#ifdef CFG_CORE_RODATA_NOEXEC 462__vcore_unpg_rx_size = __flatmap_unpg_rx_size; 463__vcore_unpg_ro_size = __flatmap_unpg_ro_size; 464#else 465__vcore_unpg_rx_size = __flatmap_unpg_rx_size + __flatmap_unpg_ro_size; 466__vcore_unpg_ro_size = 0; 467#endif 468 469/* Unpaged read-write memory */ 470__vcore_unpg_rw_start = __flatmap_unpg_rw_start; 471__vcore_unpg_rw_size = __flatmap_unpg_rw_size; 472 473#ifdef CFG_VIRTUALIZATION 474/* Nexus read-write memory */ 475__vcore_nex_rw_start = __flatmap_nex_rw_start; 476__vcore_nex_rw_size = __flatmap_nex_rw_size; 477#endif 478 479#ifdef CFG_WITH_PAGER 480/* 481 * Core init mapping shall cover up to end of the physical RAM. 482 * This is required since the hash table is appended to the 483 * binary data after the firmware build sequence. 484 */ 485#define __FLATMAP_PAGER_TRAILING_SPACE \ 486 (TEE_RAM_START + TEE_RAM_PH_SIZE - \ 487 (__flatmap_init_ro_start + __flatmap_init_ro_size)) 488 489/* Paged/init read-only memories */ 490__vcore_init_rx_start = __flatmap_init_rx_start; 491__vcore_init_ro_start = __flatmap_init_ro_start; 492#ifdef CFG_CORE_RODATA_NOEXEC 493__vcore_init_rx_size = __flatmap_init_rx_size; 494__vcore_init_ro_size = __flatmap_init_ro_size + __FLATMAP_PAGER_TRAILING_SPACE; 495#else 496__vcore_init_rx_size = __flatmap_init_rx_size + __flatmap_init_ro_size + 497 __FLATMAP_PAGER_TRAILING_SPACE; 498__vcore_init_ro_size = 0; 499#endif /* CFG_CORE_RODATA_NOEXEC */ 500#endif /* CFG_WITH_PAGER */ 501 502#ifdef CFG_CORE_SANITIZE_KADDRESS 503__asan_map_start = (__asan_shadow_start / SMALL_PAGE_SIZE) * 504 SMALL_PAGE_SIZE; 505__asan_map_end = ((__asan_shadow_end - 1) / SMALL_PAGE_SIZE) * 506 SMALL_PAGE_SIZE + SMALL_PAGE_SIZE; 507__asan_map_size = __asan_map_end - __asan_map_start; 508#endif /*CFG_CORE_SANITIZE_KADDRESS*/ 509