1/* SPDX-License-Identifier: (BSD-2-Clause AND MIT) */ 2/* 3 * Copyright (c) 2014, Linaro Limited 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright notice, 10 * this list of conditions and the following disclaimer. 11 * 12 * 2. Redistributions in binary form must reproduce the above copyright notice, 13 * this list of conditions and the following disclaimer in the documentation 14 * and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 20 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29/* 30 * Copyright (c) 2008-2010 Travis Geiselbrecht 31 * 32 * Permission is hereby granted, free of charge, to any person obtaining 33 * a copy of this software and associated documentation files 34 * (the "Software"), to deal in the Software without restriction, 35 * including without limitation the rights to use, copy, modify, merge, 36 * publish, distribute, sublicense, and/or sell copies of the Software, 37 * and to permit persons to whom the Software is furnished to do so, 38 * subject to the following conditions: 39 * 40 * The above copyright notice and this permission notice shall be 41 * included in all copies or substantial portions of the Software. 42 * 43 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 44 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 45 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 46 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY 47 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 48 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 49 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 50 */ 51 52#include <mm/core_mmu.h> 53#include <platform_config.h> 54#include <util.h> 55 56/* 57 * TEE_RAM_VA_START: The start virtual address of the TEE RAM 58 * TEE_TEXT_VA_START: The start virtual address of the OP-TEE text 59 */ 60#define TEE_RAM_VA_START TEE_RAM_START 61#define TEE_TEXT_VA_START (TEE_RAM_VA_START + \ 62 (TEE_LOAD_ADDR - TEE_RAM_START)) 63 64OUTPUT_FORMAT(CFG_KERN_LINKER_FORMAT) 65OUTPUT_ARCH(CFG_KERN_LINKER_ARCH) 66 67ENTRY(_start) 68SECTIONS 69{ 70 . = TEE_TEXT_VA_START; 71#ifdef ARM32 72 ASSERT(!(TEE_TEXT_VA_START & 31), "text start should align to 32bytes") 73#endif 74#ifdef ARM64 75 ASSERT(!(TEE_TEXT_VA_START & 127), "text start should align to 128bytes") 76#endif 77 __text_start = .; 78 79 /* 80 * Memory between TEE_TEXT_VA_START and page aligned rounded down 81 * value will be mapped with unpaged "text" section attributes: 82 * likely to be read-only/executable. 83 */ 84 __flatmap_unpg_rx_start = ROUNDDOWN(__text_start, SMALL_PAGE_SIZE); 85 86 .text : { 87 KEEP(*(.text._start)) 88 __identity_map_init_start = .; 89 *(.identity_map .identity_map.* \ 90 /* 91 * The one below is needed because it's a weak 92 * symbol that may be overridden by platform 93 * specific code. 94 */ 95 .text.get_core_pos_mpidr) 96 __identity_map_init_end = .; 97 KEEP(*(.text.init .text.plat_cpu_reset_early \ 98 .text.reset .text.reset_primary .text.unhandled_cpu \ 99 .text.__assert_flat_mapped_range)) 100 101#ifdef CFG_WITH_PAGER 102 *(.text) 103/* Include list of sections needed for paging */ 104#include <text_unpaged.ld.S> 105#else 106 *(.text .text.*) 107#endif 108 *(.sram.text.glue_7* .gnu.linkonce.t.*) 109 . = ALIGN(8); 110 } 111 __text_end = .; 112 113#ifdef CFG_CORE_RODATA_NOEXEC 114 . = ALIGN(SMALL_PAGE_SIZE); 115#endif 116 __flatmap_unpg_rx_size = . - __flatmap_unpg_rx_start; 117 __flatmap_unpg_ro_start = .; 118 119 .rodata : ALIGN(8) { 120 __rodata_start = .; 121 *(.gnu.linkonce.r.*) 122#ifdef CFG_WITH_PAGER 123 *(.rodata .rodata.__unpaged) 124#include <rodata_unpaged.ld.S> 125#else 126#ifdef CFG_DT 127 __rodata_dtdrv_start = .; 128 KEEP(*(.rodata.dtdrv)) 129 __rodata_dtdrv_end = .; 130#endif 131#ifdef CFG_EARLY_TA 132 . = ALIGN(8); 133 __rodata_early_ta_start = .; 134 KEEP(*(.rodata.early_ta)) 135 __rodata_early_ta_end = .; 136#endif 137 138 *(.rodata .rodata.*) 139 . = ALIGN(8); 140 KEEP(*(SORT(.scattered_array*))); 141#endif 142 . = ALIGN(8); 143 __rodata_end = .; 144 } 145 146 .hash : { *(.hash) } 147 .dynsym : { *(.dynsym) } 148 .dynstr : { *(.dynstr) } 149 150 .rel : { 151 __rel_start = .; 152 *(.rel.*) 153 __rel_end = .; 154 } 155 .rela : { 156 __rela_start = .; 157 *(.rela.*) 158 __rela_end = .; 159 } 160#ifndef CFG_CORE_ASLR 161 ASSERT(__rel_end == __rel_start, "Relocation entries not expected") 162 ASSERT(__rela_end == __rela_start, "Relocation entries not expected") 163#endif 164 165 .got : { *(.got.plt) *(.got) } 166 .dynamic : { *(.dynamic) } 167 .plt : { *(.plt) } 168 169 .ctors : ALIGN(8) { 170 __ctor_list = .; 171 KEEP(*(.ctors .ctors.* .init_array .init_array.*)) 172 __ctor_end = .; 173 } 174 .dtors : ALIGN(8) { 175 __dtor_list = .; 176 KEEP(*(.dtors .dtors.* .fini_array .fini_array.*)) 177 __dtor_end = .; 178 } 179 180 /* .ARM.exidx is sorted, so has to go in its own output section. */ 181 .ARM.exidx : { 182 __exidx_start = .; 183 *(.ARM.exidx* .gnu.linkonce.armexidx.*) 184 __exidx_end = .; 185 } 186 187 .ARM.extab : { 188 __extab_start = .; 189 *(.ARM.extab*) 190 __extab_end = .; 191 } 192 193 /* Start page aligned read-write memory */ 194#ifdef CFG_CORE_RWDATA_NOEXEC 195 . = ALIGN(SMALL_PAGE_SIZE); 196#endif 197 __flatmap_unpg_ro_size = . - __flatmap_unpg_ro_start; 198 199#ifdef CFG_VIRTUALIZATION 200 __flatmap_nex_rw_start = . ; 201 .nex_data : ALIGN(8) { 202 *(.nex_data .nex_data.*) 203 } 204 205 .nex_bss : ALIGN(8) { 206 __nex_bss_start = .; 207 *(.nex_bss .nex_bss.*) 208 __nex_bss_end = .; 209 } 210 211 /* 212 * We want to keep all nexus memory in one place, because 213 * it should be always mapped and it is easier to map one 214 * memory region than two. 215 * Next section are NOLOAD ones, but they are followed 216 * by sections with data. Thus, this NOLOAD section will 217 * be included in the resulting binary, filled with zeroes 218 */ 219 .nex_stack (NOLOAD) : { 220 __nozi_stack_start = .; 221 KEEP(*(.nozi_stack.stack_tmp .nozi_stack.stack_abt)) 222 . = ALIGN(8); 223 __nozi_stack_end = .; 224 } 225 226 .nex_heap (NOLOAD) : { 227 __nex_heap_start = .; 228 . += CFG_CORE_NEX_HEAP_SIZE; 229 . = ALIGN(16 * 1024); 230 __nex_heap_end = .; 231 } 232 .nex_nozi (NOLOAD) : { 233 ASSERT(!(ABSOLUTE(.) & (16 * 1024 - 1)), "align nozi to 16kB"); 234 KEEP(*(.nozi.mmu.l1 .nozi.mmu.l2)) 235 } 236 237 . = ALIGN(SMALL_PAGE_SIZE); 238 239 __flatmap_nex_rw_size = . - __flatmap_nex_rw_start; 240 __flatmap_nex_rw_end = .; 241#endif 242 243 __flatmap_unpg_rw_start = .; 244 245 .data : ALIGN(8) { 246 /* writable data */ 247 __data_start_rom = .; 248 /* in one segment binaries, the rom data address is on top 249 of the ram data address */ 250 __data_start = .; 251 *(.data .data.* .gnu.linkonce.d.*) 252 . = ALIGN(8); 253 } 254 255 /* unintialized data */ 256 .bss : { 257 __data_end = .; 258 __bss_start = .; 259 *(.bss .bss.*) 260 *(.gnu.linkonce.b.*) 261 *(COMMON) 262 . = ALIGN(8); 263 __bss_end = .; 264 } 265 266 .heap1 (NOLOAD) : { 267 /* 268 * We're keeping track of the padding added before the 269 * .nozi section so we can do something useful with 270 * this otherwise wasted memory. 271 */ 272 __heap1_start = .; 273#ifndef CFG_WITH_PAGER 274 . += CFG_CORE_HEAP_SIZE; 275#endif 276#ifdef CFG_WITH_LPAE 277 . = ALIGN(4 * 1024); 278#else 279 . = ALIGN(16 * 1024); 280#endif 281 __heap1_end = .; 282 } 283 /* 284 * Uninitialized data that shouldn't be zero initialized at 285 * runtime. 286 * 287 * L1 mmu table requires 16 KiB alignment 288 */ 289 .nozi (NOLOAD) : { 290 __nozi_start = .; 291 KEEP(*(.nozi .nozi.*)) 292 . = ALIGN(16); 293 __nozi_end = .; 294 /* 295 * If virtualization is enabled, abt and tmp stacks will placed 296 * at above .nex_stack section and thread stacks will go there 297 */ 298 __nozi_stack_start = .; 299 KEEP(*(.nozi_stack .nozi_stack.*)) 300 . = ALIGN(8); 301 __nozi_stack_end = .; 302 } 303 304#ifdef CFG_WITH_PAGER 305 .heap2 (NOLOAD) : { 306 __heap2_start = .; 307 /* 308 * Reserve additional memory for heap, the total should be 309 * at least CFG_CORE_HEAP_SIZE, but count what has already 310 * been reserved in .heap1 311 */ 312 . += CFG_CORE_HEAP_SIZE - (__heap1_end - __heap1_start); 313 . = ALIGN(SMALL_PAGE_SIZE); 314 __heap2_end = .; 315 } 316 317 /* Start page aligned read-only memory */ 318 __flatmap_unpg_rw_size = . - __flatmap_unpg_rw_start; 319 320 __init_start = .; 321 __flatmap_init_rx_start = .; 322 323 ASSERT(!(__flatmap_init_rx_start & (SMALL_PAGE_SIZE - 1)), 324 "read-write memory is not paged aligned") 325 326 .text_init : { 327/* 328 * Include list of sections needed for boot initialization, this list 329 * overlaps with unpaged.ld.S but since unpaged.ld.S is first all those 330 * sections will go into the unpaged area. 331 */ 332#include <text_init.ld.S> 333 KEEP(*(.text.startup.*)); 334 /* Make sure constructor functions are available during init */ 335 KEEP(*(.text._GLOBAL__sub_*)); 336 . = ALIGN(8); 337 } 338 339#ifdef CFG_CORE_RODATA_NOEXEC 340 . = ALIGN(SMALL_PAGE_SIZE); 341#endif 342 __flatmap_init_rx_size = . - __flatmap_init_rx_start; 343 __flatmap_init_ro_start = .; 344 345 .rodata_init : { 346#include <rodata_init.ld.S> 347 348 . = ALIGN(8); 349 KEEP(*(SORT(.scattered_array*))); 350 351 . = ALIGN(8); 352 __rodata_init_end = .; 353 } 354 __rodata_init_end = .; 355 356 __init_end = ROUNDUP(__rodata_init_end, SMALL_PAGE_SIZE); 357 __init_size = __init_end - __init_start; 358 359 /* vcore flat map stops here. No need to page align, rodata follows. */ 360 __flatmap_init_ro_size = __init_end - __flatmap_init_ro_start; 361 362 .rodata_pageable : ALIGN(8) { 363#ifdef CFG_DT 364 __rodata_dtdrv_start = .; 365 KEEP(*(.rodata.dtdrv)) 366 __rodata_dtdrv_end = .; 367#endif 368#ifdef CFG_EARLY_TA 369 . = ALIGN(8); 370 __rodata_early_ta_start = .; 371 KEEP(*(.rodata.early_ta)) 372 __rodata_early_ta_end = .; 373#endif 374 *(.rodata*) 375 } 376 377#ifdef CFG_CORE_RODATA_NOEXEC 378 . = ALIGN(SMALL_PAGE_SIZE); 379#endif 380 381 .text_pageable : ALIGN(8) { 382 *(.text*) 383 . = ALIGN(SMALL_PAGE_SIZE); 384 } 385 386 __pageable_part_end = .; 387 __pageable_part_start = __init_end; 388 __pageable_start = __init_start; 389 __pageable_end = __pageable_part_end; 390 391 /* 392 * Assign a safe spot to store the hashes of the pages before 393 * heap is initialized. 394 */ 395 __tmp_hashes_start = __init_end; 396 __tmp_hashes_size = ((__pageable_end - __pageable_start) / 397 SMALL_PAGE_SIZE) * 32; 398 __tmp_hashes_end = __tmp_hashes_start + __tmp_hashes_size; 399 400 __init_mem_usage = __tmp_hashes_end - TEE_TEXT_VA_START; 401 402 ASSERT(TEE_LOAD_ADDR >= TEE_RAM_START, 403 "Load address before start of physical memory") 404 ASSERT(TEE_LOAD_ADDR < (TEE_RAM_START + TEE_RAM_PH_SIZE), 405 "Load address after end of physical memory") 406 ASSERT(__tmp_hashes_end < (TEE_RAM_VA_START + TEE_RAM_PH_SIZE), 407 "OP-TEE can't fit init part into available physical memory") 408 ASSERT((TEE_RAM_VA_START + TEE_RAM_PH_SIZE - __init_end) > 409 SMALL_PAGE_SIZE, "Too few free pages to initialize paging") 410 411 412#endif /*CFG_WITH_PAGER*/ 413 414#ifdef CFG_CORE_SANITIZE_KADDRESS 415 . = TEE_RAM_VA_START + (TEE_RAM_VA_SIZE * 8) / 9 - 8; 416 . = ALIGN(8); 417 .asan_shadow : { 418 __asan_shadow_start = .; 419 . += TEE_RAM_VA_SIZE / 9; 420 __asan_shadow_end = .; 421 __asan_shadow_size = __asan_shadow_end - __asan_shadow_start; 422 } 423#endif /*CFG_CORE_SANITIZE_KADDRESS*/ 424 425 __end = .; 426 427#ifndef CFG_WITH_PAGER 428 __init_size = __data_end - TEE_TEXT_VA_START; 429 __init_mem_usage = __end - TEE_TEXT_VA_START; 430#endif 431 /* 432 * Guard against moving the location counter backwards in the assignment 433 * below. 434 */ 435 ASSERT(. <= (TEE_RAM_VA_START + TEE_RAM_VA_SIZE), 436 "TEE_RAM_VA_SIZE is too small") 437 . = TEE_RAM_VA_START + TEE_RAM_VA_SIZE; 438 439 _end_of_ram = .; 440 441#ifndef CFG_WITH_PAGER 442 __flatmap_unpg_rw_size = _end_of_ram - __flatmap_unpg_rw_start; 443#endif 444 445 /DISCARD/ : { 446 /* Strip unnecessary stuff */ 447 *(.comment .note .eh_frame .interp) 448 /* Strip meta variables */ 449 *(__keep_meta_vars*) 450 } 451 452} 453 454/* Unpaged read-only memories */ 455__vcore_unpg_rx_start = __flatmap_unpg_rx_start; 456__vcore_unpg_ro_start = __flatmap_unpg_ro_start; 457#ifdef CFG_CORE_RODATA_NOEXEC 458__vcore_unpg_rx_size = __flatmap_unpg_rx_size; 459__vcore_unpg_ro_size = __flatmap_unpg_ro_size; 460#else 461__vcore_unpg_rx_size = __flatmap_unpg_rx_size + __flatmap_unpg_ro_size; 462__vcore_unpg_ro_size = 0; 463#endif 464 465/* Unpaged read-write memory */ 466__vcore_unpg_rw_start = __flatmap_unpg_rw_start; 467__vcore_unpg_rw_size = __flatmap_unpg_rw_size; 468 469#ifdef CFG_VIRTUALIZATION 470/* Nexus read-write memory */ 471__vcore_nex_rw_start = __flatmap_nex_rw_start; 472__vcore_nex_rw_size = __flatmap_nex_rw_size; 473#endif 474 475#ifdef CFG_WITH_PAGER 476/* 477 * Core init mapping shall cover up to end of the physical RAM. 478 * This is required since the hash table is appended to the 479 * binary data after the firmware build sequence. 480 */ 481#define __FLATMAP_PAGER_TRAILING_SPACE \ 482 (TEE_RAM_START + TEE_RAM_PH_SIZE - \ 483 (__flatmap_init_ro_start + __flatmap_init_ro_size)) 484 485/* Paged/init read-only memories */ 486__vcore_init_rx_start = __flatmap_init_rx_start; 487__vcore_init_ro_start = __flatmap_init_ro_start; 488#ifdef CFG_CORE_RODATA_NOEXEC 489__vcore_init_rx_size = __flatmap_init_rx_size; 490__vcore_init_ro_size = __flatmap_init_ro_size + __FLATMAP_PAGER_TRAILING_SPACE; 491#else 492__vcore_init_rx_size = __flatmap_init_rx_size + __flatmap_init_ro_size + 493 __FLATMAP_PAGER_TRAILING_SPACE; 494__vcore_init_ro_size = 0; 495#endif /* CFG_CORE_RODATA_NOEXEC */ 496#endif /* CFG_WITH_PAGER */ 497 498#ifdef CFG_CORE_SANITIZE_KADDRESS 499__asan_map_start = (__asan_shadow_start / SMALL_PAGE_SIZE) * 500 SMALL_PAGE_SIZE; 501__asan_map_end = ((__asan_shadow_end - 1) / SMALL_PAGE_SIZE) * 502 SMALL_PAGE_SIZE + SMALL_PAGE_SIZE; 503__asan_map_size = __asan_map_end - __asan_map_start; 504#endif /*CFG_CORE_SANITIZE_KADDRESS*/ 505