xref: /optee_os/core/arch/arm/kernel/abort.c (revision 41e5aa8f18c4d48083341ff3df9e75f0c77cf703)
1 // SPDX-License-Identifier: BSD-2-Clause
2 /*
3  * Copyright (c) 2015, Linaro Limited
4  */
5 
6 #include <arm.h>
7 #include <kernel/abort.h>
8 #include <kernel/linker.h>
9 #include <kernel/misc.h>
10 #include <kernel/panic.h>
11 #include <kernel/tee_ta_manager.h>
12 #include <kernel/unwind.h>
13 #include <kernel/user_ta.h>
14 #include <mm/core_mmu.h>
15 #include <mm/mobj.h>
16 #include <mm/tee_pager.h>
17 #include <tee/tee_svc.h>
18 #include <trace.h>
19 
20 #include "thread_private.h"
21 
22 enum fault_type {
23 	FAULT_TYPE_USER_TA_PANIC,
24 	FAULT_TYPE_USER_TA_VFP,
25 	FAULT_TYPE_PAGEABLE,
26 	FAULT_TYPE_IGNORE,
27 };
28 
29 #ifdef CFG_UNWIND
30 
31 static void get_current_ta_exidx_stack(vaddr_t *exidx, size_t *exidx_sz,
32 				       vaddr_t *stack, size_t *stack_size)
33 {
34 	struct tee_ta_session *s;
35 	struct user_ta_ctx *utc;
36 
37 	if (tee_ta_get_current_session(&s) != TEE_SUCCESS)
38 		panic();
39 
40 	utc = to_user_ta_ctx(s->ctx);
41 
42 	/* Only 32-bit TAs use .ARM.exidx/.ARM.extab exception handling */
43 	assert(utc->is_32bit);
44 
45 	*exidx = utc->exidx_start; /* NULL if TA has no unwind tables */
46 	if (*exidx)
47 		*exidx += utc->load_addr;
48 	*exidx_sz = utc->exidx_size;
49 
50 	*stack = utc->stack_addr;
51 	*stack_size = utc->mobj_stack->size;
52 }
53 
54 #ifdef ARM32
55 
56 /*
57  * Kernel or user mode unwind (32-bit execution state).
58  */
59 static void __print_stack_unwind_arm32(struct abort_info *ai)
60 {
61 	struct unwind_state_arm32 state;
62 	vaddr_t exidx;
63 	size_t exidx_sz;
64 	uint32_t mode = ai->regs->spsr & CPSR_MODE_MASK;
65 	uint32_t sp;
66 	uint32_t lr;
67 	vaddr_t stack;
68 	size_t stack_size;
69 	bool kernel_stack;
70 
71 	if (abort_is_user_exception(ai)) {
72 		get_current_ta_exidx_stack(&exidx, &exidx_sz, &stack,
73 					   &stack_size);
74 		if (!exidx) {
75 			EMSG_RAW("Call stack not available");
76 			return;
77 		}
78 		kernel_stack = false;
79 	} else {
80 		exidx = (vaddr_t)__exidx_start;
81 		exidx_sz = (vaddr_t)__exidx_end - (vaddr_t)__exidx_start;
82 		/* Kernel stack */
83 		stack = thread_stack_start();
84 		stack_size = thread_stack_size();
85 		kernel_stack = true;
86 	}
87 
88 	if (mode == CPSR_MODE_USR || mode == CPSR_MODE_SYS) {
89 		sp = ai->regs->usr_sp;
90 		lr = ai->regs->usr_lr;
91 	} else {
92 		sp = read_mode_sp(mode);
93 		lr = read_mode_lr(mode);
94 	}
95 
96 	memset(&state, 0, sizeof(state));
97 	state.registers[0] = ai->regs->r0;
98 	state.registers[1] = ai->regs->r1;
99 	state.registers[2] = ai->regs->r2;
100 	state.registers[3] = ai->regs->r3;
101 	state.registers[4] = ai->regs->r4;
102 	state.registers[5] = ai->regs->r5;
103 	state.registers[6] = ai->regs->r6;
104 	state.registers[7] = ai->regs->r7;
105 	state.registers[8] = ai->regs->r8;
106 	state.registers[9] = ai->regs->r9;
107 	state.registers[10] = ai->regs->r10;
108 	state.registers[11] = ai->regs->r11;
109 	state.registers[13] = sp;
110 	state.registers[14] = lr;
111 	state.registers[15] = ai->pc;
112 
113 	print_stack_arm32(TRACE_ERROR, &state, exidx, exidx_sz, kernel_stack,
114 			  stack, stack_size);
115 }
116 #else /* ARM32 */
117 
118 static void __print_stack_unwind_arm32(struct abort_info *ai __unused)
119 {
120 	struct unwind_state_arm32 state;
121 	vaddr_t exidx;
122 	size_t exidx_sz;
123 	vaddr_t stack;
124 	size_t stack_size;
125 
126 	/* 64-bit kernel, hence 32-bit unwind must be for user mode */
127 	assert(abort_is_user_exception(ai));
128 
129 	get_current_ta_exidx_stack(&exidx, &exidx_sz, &stack, &stack_size);
130 
131 	memset(&state, 0, sizeof(state));
132 	state.registers[0] = ai->regs->x0;
133 	state.registers[1] = ai->regs->x1;
134 	state.registers[2] = ai->regs->x2;
135 	state.registers[3] = ai->regs->x3;
136 	state.registers[4] = ai->regs->x4;
137 	state.registers[5] = ai->regs->x5;
138 	state.registers[6] = ai->regs->x6;
139 	state.registers[7] = ai->regs->x7;
140 	state.registers[8] = ai->regs->x8;
141 	state.registers[9] = ai->regs->x9;
142 	state.registers[10] = ai->regs->x10;
143 	state.registers[11] = ai->regs->x11;
144 
145 	state.registers[13] = ai->regs->x13;
146 	state.registers[14] = ai->regs->x14;
147 	state.registers[15] = ai->pc;
148 
149 	print_stack_arm32(TRACE_ERROR, &state, exidx, exidx_sz,
150 			  false /*!kernel_stack*/, stack, stack_size);
151 }
152 #endif /* ARM32 */
153 #ifdef ARM64
154 /* Kernel or user mode unwind (64-bit execution state) */
155 static void __print_stack_unwind_arm64(struct abort_info *ai)
156 {
157 	struct unwind_state_arm64 state = { };
158 	bool kernel_stack = false;
159 	uaddr_t stack = 0;
160 	size_t stack_size = 0;
161 
162 	if (abort_is_user_exception(ai)) {
163 		/* User stack */
164 		stack = 0;
165 		stack_size = 0;
166 		kernel_stack = false;
167 	} else {
168 		/* Kernel stack */
169 		stack = thread_stack_start();
170 		stack_size = thread_stack_size();
171 		kernel_stack = true;
172 	}
173 
174 	state.pc = ai->regs->elr;
175 	state.fp = ai->regs->x29;
176 
177 	print_stack_arm64(TRACE_ERROR, &state, kernel_stack, stack, stack_size);
178 }
179 #else
180 static void __print_stack_unwind_arm64(struct abort_info *ai __unused)
181 {
182 
183 }
184 #endif /*ARM64*/
185 #else /* CFG_UNWIND */
186 static void __print_stack_unwind_arm32(struct abort_info *ai __unused)
187 {
188 }
189 
190 static void __print_stack_unwind_arm64(struct abort_info *ai __unused)
191 {
192 }
193 #endif /* CFG_UNWIND */
194 
195 static __maybe_unused const char *abort_type_to_str(uint32_t abort_type)
196 {
197 	if (abort_type == ABORT_TYPE_DATA)
198 		return "data";
199 	if (abort_type == ABORT_TYPE_PREFETCH)
200 		return "prefetch";
201 	return "undef";
202 }
203 
204 static __maybe_unused const char *fault_to_str(uint32_t abort_type,
205 			uint32_t fault_descr)
206 {
207 	/* fault_descr is only valid for data or prefetch abort */
208 	if (abort_type != ABORT_TYPE_DATA && abort_type != ABORT_TYPE_PREFETCH)
209 		return "";
210 
211 	switch (core_mmu_get_fault_type(fault_descr)) {
212 	case CORE_MMU_FAULT_ALIGNMENT:
213 		return " (alignment fault)";
214 	case CORE_MMU_FAULT_TRANSLATION:
215 		return " (translation fault)";
216 	case CORE_MMU_FAULT_READ_PERMISSION:
217 		return " (read permission fault)";
218 	case CORE_MMU_FAULT_WRITE_PERMISSION:
219 		return " (write permission fault)";
220 	default:
221 		return "";
222 	}
223 }
224 
225 static __maybe_unused void
226 __print_abort_info(struct abort_info *ai __maybe_unused,
227 		   const char *ctx __maybe_unused)
228 {
229 	__maybe_unused size_t core_pos = 0;
230 #ifdef ARM32
231 	uint32_t mode = ai->regs->spsr & CPSR_MODE_MASK;
232 	__maybe_unused uint32_t sp = 0;
233 	__maybe_unused uint32_t lr = 0;
234 
235 	if (mode == CPSR_MODE_USR || mode == CPSR_MODE_SYS) {
236 		sp = ai->regs->usr_sp;
237 		lr = ai->regs->usr_lr;
238 		core_pos = thread_get_tsd()->abort_core;
239 	} else {
240 		sp = read_mode_sp(mode);
241 		lr = read_mode_lr(mode);
242 		core_pos = get_core_pos();
243 	}
244 #endif /*ARM32*/
245 #ifdef ARM64
246 	if (abort_is_user_exception(ai))
247 		core_pos = thread_get_tsd()->abort_core;
248 	else
249 		core_pos = get_core_pos();
250 #endif /*ARM64*/
251 
252 	EMSG_RAW("");
253 	EMSG_RAW("%s %s-abort at address 0x%" PRIxVA "%s",
254 		ctx, abort_type_to_str(ai->abort_type), ai->va,
255 		fault_to_str(ai->abort_type, ai->fault_descr));
256 #ifdef ARM32
257 	EMSG_RAW(" fsr 0x%08x  ttbr0 0x%08x  ttbr1 0x%08x  cidr 0x%X",
258 		 ai->fault_descr, read_ttbr0(), read_ttbr1(),
259 		 read_contextidr());
260 	EMSG_RAW(" cpu #%zu          cpsr 0x%08x",
261 		 core_pos, ai->regs->spsr);
262 	EMSG_RAW(" r0 0x%08x      r4 0x%08x    r8 0x%08x   r12 0x%08x",
263 		 ai->regs->r0, ai->regs->r4, ai->regs->r8, ai->regs->ip);
264 	EMSG_RAW(" r1 0x%08x      r5 0x%08x    r9 0x%08x    sp 0x%08x",
265 		 ai->regs->r1, ai->regs->r5, ai->regs->r9, sp);
266 	EMSG_RAW(" r2 0x%08x      r6 0x%08x   r10 0x%08x    lr 0x%08x",
267 		 ai->regs->r2, ai->regs->r6, ai->regs->r10, lr);
268 	EMSG_RAW(" r3 0x%08x      r7 0x%08x   r11 0x%08x    pc 0x%08x",
269 		 ai->regs->r3, ai->regs->r7, ai->regs->r11, ai->pc);
270 #endif /*ARM32*/
271 #ifdef ARM64
272 	EMSG_RAW(" esr 0x%08x  ttbr0 0x%08" PRIx64 "   ttbr1 0x%08" PRIx64
273 		 "   cidr 0x%X", ai->fault_descr, read_ttbr0_el1(),
274 		 read_ttbr1_el1(), read_contextidr_el1());
275 	EMSG_RAW(" cpu #%zu          cpsr 0x%08x",
276 		 core_pos, (uint32_t)ai->regs->spsr);
277 	EMSG_RAW(" x0  %016" PRIx64 " x1  %016" PRIx64,
278 		 ai->regs->x0, ai->regs->x1);
279 	EMSG_RAW(" x2  %016" PRIx64 " x3  %016" PRIx64,
280 		 ai->regs->x2, ai->regs->x3);
281 	EMSG_RAW(" x4  %016" PRIx64 " x5  %016" PRIx64,
282 		 ai->regs->x4, ai->regs->x5);
283 	EMSG_RAW(" x6  %016" PRIx64 " x7  %016" PRIx64,
284 		 ai->regs->x6, ai->regs->x7);
285 	EMSG_RAW(" x8  %016" PRIx64 " x9  %016" PRIx64,
286 		 ai->regs->x8, ai->regs->x9);
287 	EMSG_RAW(" x10 %016" PRIx64 " x11 %016" PRIx64,
288 		 ai->regs->x10, ai->regs->x11);
289 	EMSG_RAW(" x12 %016" PRIx64 " x13 %016" PRIx64,
290 		 ai->regs->x12, ai->regs->x13);
291 	EMSG_RAW(" x14 %016" PRIx64 " x15 %016" PRIx64,
292 		 ai->regs->x14, ai->regs->x15);
293 	EMSG_RAW(" x16 %016" PRIx64 " x17 %016" PRIx64,
294 		 ai->regs->x16, ai->regs->x17);
295 	EMSG_RAW(" x18 %016" PRIx64 " x19 %016" PRIx64,
296 		 ai->regs->x18, ai->regs->x19);
297 	EMSG_RAW(" x20 %016" PRIx64 " x21 %016" PRIx64,
298 		 ai->regs->x20, ai->regs->x21);
299 	EMSG_RAW(" x22 %016" PRIx64 " x23 %016" PRIx64,
300 		 ai->regs->x22, ai->regs->x23);
301 	EMSG_RAW(" x24 %016" PRIx64 " x25 %016" PRIx64,
302 		 ai->regs->x24, ai->regs->x25);
303 	EMSG_RAW(" x26 %016" PRIx64 " x27 %016" PRIx64,
304 		 ai->regs->x26, ai->regs->x27);
305 	EMSG_RAW(" x28 %016" PRIx64 " x29 %016" PRIx64,
306 		 ai->regs->x28, ai->regs->x29);
307 	EMSG_RAW(" x30 %016" PRIx64 " elr %016" PRIx64,
308 		 ai->regs->x30, ai->regs->elr);
309 	EMSG_RAW(" sp_el0 %016" PRIx64, ai->regs->sp_el0);
310 #endif /*ARM64*/
311 }
312 
313 /*
314  * Print abort info and (optionally) stack dump to the console
315  * @ai kernel-mode abort info.
316  * @stack_dump true to show a stack trace
317  */
318 static void __abort_print(struct abort_info *ai, bool stack_dump)
319 {
320 	assert(!abort_is_user_exception(ai));
321 
322 	__print_abort_info(ai, "Core");
323 
324 	if (stack_dump) {
325 #if defined(ARM32)
326 		__print_stack_unwind_arm32(ai);
327 #else
328 		__print_stack_unwind_arm64(ai);
329 #endif
330 	}
331 }
332 
333 void abort_print(struct abort_info *ai)
334 {
335 	__abort_print(ai, false);
336 }
337 
338 void abort_print_error(struct abort_info *ai)
339 {
340 	__abort_print(ai, true);
341 }
342 
343 /* This function must be called from a normal thread */
344 void abort_print_current_ta(void)
345 {
346 	struct thread_specific_data *tsd = thread_get_tsd();
347 	struct abort_info ai = { };
348 	struct tee_ta_session *s = NULL;
349 
350 	if (tee_ta_get_current_session(&s) != TEE_SUCCESS)
351 		panic();
352 
353 	ai.abort_type = tsd->abort_type;
354 	ai.fault_descr = tsd->abort_descr;
355 	ai.va = tsd->abort_va;
356 	ai.pc = tsd->abort_regs.elr;
357 	ai.regs = &tsd->abort_regs;
358 
359 	if (ai.abort_type != ABORT_TYPE_TA_PANIC)
360 		__print_abort_info(&ai, "User TA");
361 	tee_ta_dump_current();
362 
363 	if (to_user_ta_ctx(s->ctx)->is_32bit)
364 		__print_stack_unwind_arm32(&ai);
365 	else
366 		__print_stack_unwind_arm64(&ai);
367 }
368 
369 static void save_abort_info_in_tsd(struct abort_info *ai)
370 {
371 	struct thread_specific_data *tsd = thread_get_tsd();
372 
373 	tsd->abort_type = ai->abort_type;
374 	tsd->abort_descr = ai->fault_descr;
375 	tsd->abort_va = ai->va;
376 	tsd->abort_regs = *ai->regs;
377 	tsd->abort_core = get_core_pos();
378 }
379 
380 #ifdef ARM32
381 static void set_abort_info(uint32_t abort_type, struct thread_abort_regs *regs,
382 		struct abort_info *ai)
383 {
384 	switch (abort_type) {
385 	case ABORT_TYPE_DATA:
386 		ai->fault_descr = read_dfsr();
387 		ai->va = read_dfar();
388 		break;
389 	case ABORT_TYPE_PREFETCH:
390 		ai->fault_descr = read_ifsr();
391 		ai->va = read_ifar();
392 		break;
393 	default:
394 		ai->fault_descr = 0;
395 		ai->va = regs->elr;
396 		break;
397 	}
398 	ai->abort_type = abort_type;
399 	ai->pc = regs->elr;
400 	ai->regs = regs;
401 }
402 #endif /*ARM32*/
403 
404 #ifdef ARM64
405 static void set_abort_info(uint32_t abort_type __unused,
406 		struct thread_abort_regs *regs, struct abort_info *ai)
407 {
408 	ai->fault_descr = read_esr_el1();
409 	switch ((ai->fault_descr >> ESR_EC_SHIFT) & ESR_EC_MASK) {
410 	case ESR_EC_IABT_EL0:
411 	case ESR_EC_IABT_EL1:
412 		ai->abort_type = ABORT_TYPE_PREFETCH;
413 		ai->va = read_far_el1();
414 		break;
415 	case ESR_EC_DABT_EL0:
416 	case ESR_EC_DABT_EL1:
417 	case ESR_EC_SP_ALIGN:
418 		ai->abort_type = ABORT_TYPE_DATA;
419 		ai->va = read_far_el1();
420 		break;
421 	default:
422 		ai->abort_type = ABORT_TYPE_UNDEF;
423 		ai->va = regs->elr;
424 	}
425 	ai->pc = regs->elr;
426 	ai->regs = regs;
427 }
428 #endif /*ARM64*/
429 
430 #ifdef ARM32
431 static void handle_user_ta_panic(struct abort_info *ai)
432 {
433 	/*
434 	 * It was a user exception, stop user execution and return
435 	 * to TEE Core.
436 	 */
437 	ai->regs->r0 = TEE_ERROR_TARGET_DEAD;
438 	ai->regs->r1 = true;
439 	ai->regs->r2 = 0xdeadbeef;
440 	ai->regs->elr = (uint32_t)thread_unwind_user_mode;
441 	ai->regs->spsr &= CPSR_FIA;
442 	ai->regs->spsr &= ~CPSR_MODE_MASK;
443 	ai->regs->spsr |= CPSR_MODE_SVC;
444 	/* Select Thumb or ARM mode */
445 	if (ai->regs->elr & 1)
446 		ai->regs->spsr |= CPSR_T;
447 	else
448 		ai->regs->spsr &= ~CPSR_T;
449 }
450 #endif /*ARM32*/
451 
452 #ifdef ARM64
453 static void handle_user_ta_panic(struct abort_info *ai)
454 {
455 	uint32_t daif;
456 
457 	/*
458 	 * It was a user exception, stop user execution and return
459 	 * to TEE Core.
460 	 */
461 	ai->regs->x0 = TEE_ERROR_TARGET_DEAD;
462 	ai->regs->x1 = true;
463 	ai->regs->x2 = 0xdeadbeef;
464 	ai->regs->elr = (vaddr_t)thread_unwind_user_mode;
465 	ai->regs->sp_el0 = thread_get_saved_thread_sp();
466 
467 	daif = (ai->regs->spsr >> SPSR_32_AIF_SHIFT) & SPSR_32_AIF_MASK;
468 	/* XXX what about DAIF_D? */
469 	ai->regs->spsr = SPSR_64(SPSR_64_MODE_EL1, SPSR_64_MODE_SP_EL0, daif);
470 }
471 #endif /*ARM64*/
472 
473 #ifdef CFG_WITH_VFP
474 static void handle_user_ta_vfp(void)
475 {
476 	struct tee_ta_session *s;
477 
478 	if (tee_ta_get_current_session(&s) != TEE_SUCCESS)
479 		panic();
480 
481 	thread_user_enable_vfp(&to_user_ta_ctx(s->ctx)->vfp);
482 }
483 #endif /*CFG_WITH_VFP*/
484 
485 #ifdef CFG_WITH_USER_TA
486 #ifdef ARM32
487 /* Returns true if the exception originated from user mode */
488 bool abort_is_user_exception(struct abort_info *ai)
489 {
490 	return (ai->regs->spsr & ARM32_CPSR_MODE_MASK) == ARM32_CPSR_MODE_USR;
491 }
492 #endif /*ARM32*/
493 
494 #ifdef ARM64
495 /* Returns true if the exception originated from user mode */
496 bool abort_is_user_exception(struct abort_info *ai)
497 {
498 	uint32_t spsr = ai->regs->spsr;
499 
500 	if (spsr & (SPSR_MODE_RW_32 << SPSR_MODE_RW_SHIFT))
501 		return true;
502 	if (((spsr >> SPSR_64_MODE_EL_SHIFT) & SPSR_64_MODE_EL_MASK) ==
503 	    SPSR_64_MODE_EL0)
504 		return true;
505 	return false;
506 }
507 #endif /*ARM64*/
508 #else /*CFG_WITH_USER_TA*/
509 bool abort_is_user_exception(struct abort_info *ai __unused)
510 {
511 	return false;
512 }
513 #endif /*CFG_WITH_USER_TA*/
514 
515 #if defined(CFG_WITH_VFP) && defined(CFG_WITH_USER_TA)
516 #ifdef ARM32
517 static bool is_vfp_fault(struct abort_info *ai)
518 {
519 	if ((ai->abort_type != ABORT_TYPE_UNDEF) || vfp_is_enabled())
520 		return false;
521 
522 	/*
523 	 * Not entirely accurate, but if it's a truly undefined instruction
524 	 * we'll end up in this function again, except this time
525 	 * vfp_is_enabled() so we'll return false.
526 	 */
527 	return true;
528 }
529 #endif /*ARM32*/
530 
531 #ifdef ARM64
532 static bool is_vfp_fault(struct abort_info *ai)
533 {
534 	switch ((ai->fault_descr >> ESR_EC_SHIFT) & ESR_EC_MASK) {
535 	case ESR_EC_FP_ASIMD:
536 	case ESR_EC_AARCH32_FP:
537 	case ESR_EC_AARCH64_FP:
538 		return true;
539 	default:
540 		return false;
541 	}
542 }
543 #endif /*ARM64*/
544 #else /*CFG_WITH_VFP && CFG_WITH_USER_TA*/
545 static bool is_vfp_fault(struct abort_info *ai __unused)
546 {
547 	return false;
548 }
549 #endif  /*CFG_WITH_VFP && CFG_WITH_USER_TA*/
550 
551 static enum fault_type get_fault_type(struct abort_info *ai)
552 {
553 	if (abort_is_user_exception(ai)) {
554 		if (is_vfp_fault(ai))
555 			return FAULT_TYPE_USER_TA_VFP;
556 #ifndef CFG_WITH_PAGER
557 		return FAULT_TYPE_USER_TA_PANIC;
558 #endif
559 	}
560 
561 	if (thread_is_from_abort_mode()) {
562 		abort_print_error(ai);
563 		panic("[abort] abort in abort handler (trap CPU)");
564 	}
565 
566 	if (ai->abort_type == ABORT_TYPE_UNDEF) {
567 		if (abort_is_user_exception(ai))
568 			return FAULT_TYPE_USER_TA_PANIC;
569 		abort_print_error(ai);
570 		panic("[abort] undefined abort (trap CPU)");
571 	}
572 
573 	switch (core_mmu_get_fault_type(ai->fault_descr)) {
574 	case CORE_MMU_FAULT_ALIGNMENT:
575 		if (abort_is_user_exception(ai))
576 			return FAULT_TYPE_USER_TA_PANIC;
577 		abort_print_error(ai);
578 		panic("[abort] alignement fault!  (trap CPU)");
579 		break;
580 
581 	case CORE_MMU_FAULT_ACCESS_BIT:
582 		if (abort_is_user_exception(ai))
583 			return FAULT_TYPE_USER_TA_PANIC;
584 		abort_print_error(ai);
585 		panic("[abort] access bit fault!  (trap CPU)");
586 		break;
587 
588 	case CORE_MMU_FAULT_DEBUG_EVENT:
589 		if (!abort_is_user_exception(ai))
590 			abort_print(ai);
591 		DMSG("[abort] Ignoring debug event!");
592 		return FAULT_TYPE_IGNORE;
593 
594 	case CORE_MMU_FAULT_TRANSLATION:
595 	case CORE_MMU_FAULT_WRITE_PERMISSION:
596 	case CORE_MMU_FAULT_READ_PERMISSION:
597 		return FAULT_TYPE_PAGEABLE;
598 
599 	case CORE_MMU_FAULT_ASYNC_EXTERNAL:
600 		if (!abort_is_user_exception(ai))
601 			abort_print(ai);
602 		DMSG("[abort] Ignoring async external abort!");
603 		return FAULT_TYPE_IGNORE;
604 
605 	case CORE_MMU_FAULT_OTHER:
606 	default:
607 		if (!abort_is_user_exception(ai))
608 			abort_print(ai);
609 		DMSG("[abort] Unhandled fault!");
610 		return FAULT_TYPE_IGNORE;
611 	}
612 }
613 
614 void abort_handler(uint32_t abort_type, struct thread_abort_regs *regs)
615 {
616 	struct abort_info ai;
617 	bool handled;
618 
619 	set_abort_info(abort_type, regs, &ai);
620 
621 	switch (get_fault_type(&ai)) {
622 	case FAULT_TYPE_IGNORE:
623 		break;
624 	case FAULT_TYPE_USER_TA_PANIC:
625 		DMSG("[abort] abort in User mode (TA will panic)");
626 		save_abort_info_in_tsd(&ai);
627 		vfp_disable();
628 		handle_user_ta_panic(&ai);
629 		break;
630 #ifdef CFG_WITH_VFP
631 	case FAULT_TYPE_USER_TA_VFP:
632 		handle_user_ta_vfp();
633 		break;
634 #endif
635 	case FAULT_TYPE_PAGEABLE:
636 	default:
637 		if (thread_get_id_may_fail() < 0) {
638 			abort_print_error(&ai);
639 			panic("abort outside thread context");
640 		}
641 		thread_kernel_save_vfp();
642 		handled = tee_pager_handle_fault(&ai);
643 		thread_kernel_restore_vfp();
644 		if (!handled) {
645 			if (!abort_is_user_exception(&ai)) {
646 				abort_print_error(&ai);
647 				panic("unhandled pageable abort");
648 			}
649 			DMSG("[abort] abort in User mode (TA will panic)");
650 			save_abort_info_in_tsd(&ai);
651 			vfp_disable();
652 			handle_user_ta_panic(&ai);
653 		}
654 		break;
655 	}
656 }
657